MC14511B_06 [ONSEMI]
BCD−To−Seven Segment Latch/Decoder/Driver; BCD至七段锁存器/解码器/驱动器
| 型号： | MC14511B_06 |
| 厂家： | 
ONSEMI |
| 描述： | BCD−To−Seven Segment Latch/Decoder/Driver |
| 文件： | 总10页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14511B
BCD−To−Seven Segment
Latch/Decoder/Driver
The MC14511B BCD−to−seven segment latch/decoder/driver is
constructed with complementary MOS (CMOS) enhancement mode
devices and NPN bipolar output drivers in a single monolithic structure.
The circuit provides the functions of a 4−bit storage latch, an 8421
BCD−to−seven segment decoder, and an output drive capability. Lamp
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the
display, to turn−off or pulse modulate the brightness of the display, and
to store a BCD code, respectively. It can be used with seven−segment
light−emitting diodes (LED), incandescent, fluorescent, gas discharge,
or liquid crystal readouts either directly or indirectly.
http://onsemi.com
MARKING
DIAGRAMS
16
16
1
MC14511BCP
AWLYYWWG
PDIP−16
P SUFFIX
CASE 648
Applications include instrument (e.g., counter, DVM, etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
1
16
14511BG
AWLYWW
Features
SO−16
D SUFFIX
CASE 751B
• Low Logic Circuit Power Dissipation
• High−Current Sourcing Outputs (Up to 25 mA)
• Latch Storage of Code
1
16
• Blanking Input
14511B
• Lamp Test Provision
AWLYYWWG
• Readout Blanking on all Illegal Input Combinations
• Lamp Intensity Modulation Capability
• Time Share (Multiplexing) Facility
• Supply Voltage Range = 3.0 V to 18 V
SO−16
DW SUFFIX
CASE 751G
1
16
• Capable of Driving Two Low−power TTL Loads, One Low−power
Schottky TTL Load, or Two HTL Loads Over the Rated Temperature
Range
MC14511B
ALYWG
SOEIAJ−16
F SUFFIX
CASE 966
• Chip Complexity: 216 FETs or 54 Equivalent Gates
1
• Triple Diode Protection on all Inputs
• Pb−Free Packages are Available*
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1)
SS
Symbol
Parameter
Value
Unit
V
G
= Pb−Free Package
V
DC Supply Voltage Range
Input Voltage Range, All Inputs
DC Current Drain per Input Pin
−0.5 to +18.0
DD
V
−0.5 to V + 0.5
V
in
DD
ORDERING INFORMATION
I
10
mA
mW
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
P
D
Power Dissipation,
500
per Package (Note 2)
T
Operating Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
25
°C
°C
A
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
T
stg
I
Maximum Output Drive Current
(Source) per Output
mA
OHmax
P
Maximum Continuous Output Power
(Source) per Output (Note 3)
50
mA
OHmax
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/°C From 65°C to 125°C
3. P
= I (V − V
)
OHmax
OH
DD
OH
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
September, 2006 − Rev. 8
MC14511B/D
MC14511B
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields.
However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages
to this high−impedance circuit. A destructive high current mode may occur if V and V are not constrained to the range
in
out
V
SS
v (V or V ) v V
.
in
out
DD
Due to the sourcing capability of this circuit, damage can occur to the device if V is applied, and the outputs are shorted
DD
to V and are at a logical 1 (See Maximum Ratings).
SS
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V or V ).
SS
DD
PIN ASSIGNMENT
B
C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
f
a
LT
BI
LE
D
g
a
b
c
d
e
f
g
b
e
c
d
A
V
SS
DISPLAY
0
1
2
3
4
5
6
7
8
9
TRUTH TABLE
Inputs
Outputs
LE BI LT
D
X
X
C
X
X
B
X
X
A
X
X
a
1
0
b
1
0
c
1
0
d
1
0
e
1
0
f
1
0
g
1
0
Display
X
X
X
0
0
1
8
Blank
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
0
1
1
0
1
1
1
0
1
0
1
0
0
0
0
0
1
1
0
1
2
3
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0
0
1
1
1
1
1
0
1
1
0
0
0
1
0
1
1
1
0
1
1
1
0
4
5
6
7
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
0
0
0
1
1
0
0
1
1
0
0
8
9
Blank
Blank
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Blank
Blank
Blank
Blank
1
1
1
X
X
X
X
*
*
X = Don’t Care
*ꢀDepends upon the BCD code previously applied when LE = 0
http://onsemi.com
2
MC14511B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
− 55°C
25°C
125°C
V
DD
Typ
(Note 4)
Min
Max
Min
Max
Min
Max
Vdc
Characteristic
Output Voltage
Symbol
Unit
“0” Level
“1” Level
V
OL
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
V
= V or 0
in
DD
V
OH
5.0
10
15
4.1
9.1
14.1
−
−
−
4.1
9.1
14.1
4.57
9.58
14.59
−
−
−
4.1
9.1
14.1
−
−
−
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage #
(V = 3.8 or 0.5 Vdc)
“0” Level
“1” Level
V
IL
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
O
(V = 8.8 or 1.0 Vdc)
O
(V = 13.8 or 1.5 Vdc)
O
V
IH
Vdc
Vdc
(V = 0.5 or 3.8 Vdc)
O
5.0
10
15
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
(V = 1.0 or 8.8 Vdc)
O
(V = 1.5 or 13.8 Vdc)
O
Output Drive Voltage
V
OH
(I = 0 mA)
Source
5.0
10
15
4.1
−
3.9
−
3.4
−
−
−
−
−
−
−
4.1
−
3.9
−
3.4
−
4.57
4.24
4.12
3.94
3.70
3.54
−
−
−
−
−
−
4.1
−
3.5
−
3.0
−
−
−
−
−
−
−
OH
(I = 5.0 mA)
OH
(I = 10 mA)
OH
(I = 15 mA)
OH
(I = 20 mA)
OH
(I = 25 mA)
OH
(I = 0 mA)
OH
9.1
−
9.0
−
8.6
−
−
−
−
−
−
−
9.1
−
9.0
−
8.6
−
9.58
9.26
9.17
9.04
8.90
8.70
−
−
−
−
−
−
9.1
−
8.6
−
8.2
−
−
−
−
−
−
−
Vdc
Vdc
(I = 5.0 mA)
OH
(I = 10 mA)
OH
(I = 15 mA)
OH
(I = 20 mA)
OH
(I = 25 mA)
OH
(I = 0 mA)
OH
14.1
−
14
−
13.6
−
−
−
−
−
−
−
14.1
−
14
−
13.6
−
14.59
14.27
14.18
14.07
13.95
13.70
−
−
−
−
−
−
14.1
−
13.6
−
13.2
−
−
−
−
−
−
−
(I = 5.0 mA)
OH
(I = 10 mA)
OH
(I = 15 mA)
OH
(I = 20 mA)
OH
(I = 25 mA)
OH
Output Drive Current
I
OL
mAdc
(V = 0.4 V)
Sink
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
OL
(V = 0.5 V)
OL
(V = 1.5 V)
OL
Input Current
I
15
−
−
0.1
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
mAdc
pF
in
Input Capacitance
C
−
−
−
in
Quiescent Current
I
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
mAdc
DD
(Per Package) V = 0 or V
,
in
DD
I
= 0 mA
out
Total Supply Current (Notes 5 & 6)
(Dynamic plus Quiescent,
Per Package)
I
T
5.0
10
15
I = (1.9 mA/kHz) f + I
mAdc
T
DD
DD
DD
I = (3.8 mA/kHz) f + I
T
I = (5.7 mA/kHz) f + I
T
(C = 50 pF on all outputs, all
L
buffers switching)
4. Noise immunity specified for worst−case input combination.
Noise Margin for both “1” and “0” level =
1.0 Vdc min @ V = 5.0 Vdc
DD
2.0 Vdc min @ V = 10 Vdc
DD
2.5 Vdc min @ V = 15 Vdc
DD
5. The formulas given are for the typical characteristics only at 25°C.
6. To calculate total supply current at loads other than 50 pF:
–3
I (C ) = I (50 pF) + 3.5 x 10 (C – 50) V
f
T
L
T
L
DD
where: I is in mA (per package), C in pF, V in Vdc, and f in kHz is input frequency.
T
L
DD
http://onsemi.com
3
MC14511B
SWITCHING CHARACTERISTICS (Note 7) (C = 50 pF, T = 25°C)
L
A
V
DD
Vdc
Characteristic
Symbol
Min
Typ
Max
Unit
Output Rise Time
t
t
ns
TLH
THL
PLH
t
t
t
= (0.40 ns/pF) C + 20 ns
5.0
10
15
−
−
−
40
30
25
80
60
50
TLH
TLH
TLH
L
= (0.25 ns/pF) C + 17.5 ns
= (0.20 ns/pF) C + 15 ns
L
L
Output Fall Time
ns
ns
t
t
t
= (1.5 ns/pF) C + 50 ns
5.0
10
15
−
−
−
125
75
65
250
150
130
THL
THL
THL
L
= (0.75 ns/pF) C + 37.5 ns
L
L
= (0.55 ns/pF) C + 37.5 ns
Data Propagation Delay Time
t
t
t
t
= (0.40 ns/pF) C + 620 ns
5.0
10
15
−
−
−
640
250
175
1280
500
350
PLH
PLH
PLH
L
L
L
= (0.25 ns/pF) C + 237.5 ns
= (0.20 ns/pF) C + 165 ns
t
t
t
= (1.3 ns/pF) C + 655 ns
L
PHL
PHL
PHL
t
t
5.0
10
15
−
−
−
720
290
200
1440
580
PHL
= (0.60 ns/pF) C + 260 ns
L
= (0.35 ns/pF) C + 182.5 ns
L
400
Blank Propagation Delay Time
ns
ns
PLH
t
t
t
= (0.30 ns/pF) C + 585 ns
5.0
10
15
−
−
−
600
200
150
750
300
220
PLH
PLH
PLH
L
= (0.25 ns/pF) C + 187.5 ns
L
= (0.15 ns/pF) C + 142.5 ns
L
t
t
t
= (0.85 ns/pF) C + 442.5 ns
L
PHL
PHL
PHL
t
t
5.0
10
15
−
−
−
485
200
160
970
400
320
PHL
= (0.45 ns/pF) C + 177.5 ns
L
= (0.35 ns/pF) C + 142.5 ns
L
Lamp Test Propagation Delay Time
PLH
t
t
t
= (0.45 ns/pF) C + 290.5 ns
5.0
10
15
−
−
−
313
125
90
625
250
180
PLH
PLH
PLH
L
= (0.25 ns/pF) C + 112.5 ns
L
= (0.20 ns/pF) C + 80 ns
L
t
t
t
= (1.3 ns/pF) C + 248 ns
L
PHL
PHL
PHL
t
5.0
10
15
−
−
−
313
125
90
625
250
180
PHL
= (0.45 ns/pF) C + 102.5 ns
L
= (0.35 ns/pF) C + 72.5 ns
L
Setup Time
t
5.0
10
15
100
40
−
−
−
−
−
−
ns
ns
ns
su
30
Hold Time
t
5.0
10
15
60
40
30
−
−
−
−
−
−
h
Latch Enable Pulse Width
t
5.0
10
15
520
220
130
260
110
65
−
−
−
WL
7. The formulas given are for the typical characteristics only.
http://onsemi.com
4
MC14511B
Input LE low, and Inputs D, BI and LT high.
f in respect to a system clock.
All outputs connected to respective C loads.
L
20 ns
A, B, AND C
20 ns
V
V
V
V
DD
SS
OH
90%
50%
1
10%
2f
50% DUTY CYCLE
50%
ANY OUTPUT
OL
Figure 1. Dynamic Power Dissipation Signal Waveforms
20 ns
V
V
V
DD
90%
50%
20 ns
INPUT C
20 ns
V
LE
10%
DD
90%
50%
10%
SS
t
h
t
su
V
V
SS
DD
t
t
PHL
PLH
50%
OH
INPUT C
90%
10%
50%
V
V
SS
OUTPUT g
V
OL
OH
OUTPUT g
t
t
THL
TLH
V
OL
(b) Input D low,
Inputs A, B, BI and LT high.
(a) Inputs D and LE low, and
Inputs A, B, BI and LT high.
20 ns
20 ns
V
V
DD
90%
50%
LE
10%
SS
t
WL
(c) Data DCBA strobed into latches.
Figure 2. Dynamic Signal Waveforms
http://onsemi.com
5
MC14511B
CONNECTIONS TO VARIOUS DISPLAY READOUTS
LIGHT EMITTING DIODE (LED) READOUT
V
DD
V
DD
COMMON
ANODE LED
COMMON
CATHODE LED
≈ 1.7 V
≈ 1.7 V
V
SS
V
SS
INCANDESCENT READOUT
FLUORESCENT READOUT
V
DD
V
DD
V
DD
**
DIRECT
(LOW BRIGHTNESS)
FILAMENT
SUPPLY
V
SS
V
SS
V
SS
VOLTAGE BELOW V
OR APPROPRIATE
.
SS
(CAUTION: Maximum working voltage = 18.0 V)
GAS DISCHARGE READOUT
LIQUID CRYSTAL (LCD) READOUT
EXCITATION
(SQUARE WAVE,
APPROPRIATE
VOLTAGE
V
DD
V
SS
TO V )
DD
V
DD
1/4 OF MC14070B
V
SS
V
SS
**A filament pre−warm resistor is recommended to reduce filament
thermal shock and increase the effective cold resistance of the
filament.
Direct DC drive of LCD’s not recommended for life of
LCD readouts.
http://onsemi.com
6
MC14511B
BIꢀ4
13ꢀa
12ꢀb
Aꢀ7
Bꢀ1
11ꢀc
10ꢀd
9ꢀe
15ꢀf
14ꢀg
Cꢀ2
LTꢀ3
Dꢀ6
V
= PIN 16
= PIN 8
DD
LEꢀ5
V
SS
Figure 3. Logic Diagram
ORDERING INFORMATION
Device
†
Package
Shipping
MC14511BCP
PDIP−16
500 / Tape & Ammo Box
500 / Tape & Ammo Box
MC14511BCPG
PDIP−16
(Pb−Free)
MC14511BD
SO−16
48 Units / Rail
48 Units / Rail
MC14511BDG
SO−16
(Pb−Free)
MC14511BDW
SO−16
47 Units / Rail
MC14511BDWR2
MC14511BDWR2G
SO−16 WB
1000 / Tape & Reel
1000 / Tape & Reel
SO−16 WB
(Pb−Free)
MC14511BF
SOEIAJ−16
50 Units / Rail
50 Units / Rail
MC14511BFG
SOEIAJ−16
(Pb−Free)
MC14511BFEL
SOEIAJ−16
2000 / Tape & Reel
2000 / Tape & Reel
MC14511BFELG
SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
7
MC14511B
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
F
C
L
MIN MAX
A
B
C
D
F
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
M
S
0.100 BSC
2.54 BSC
1.27 BSC
K
M
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
H
J
0.21
0.38
3.30
7.74
10
G
2.80
7.50
0
D 16 PL
M
M
0.25 (0.010)
T A
0
10
_
_
_
_
0.020 0.040
0.51
1.01
SO−16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
G
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
R X 45
K
_
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
C
G
J
1.27 BSC
0.050 BSC
−T−
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
K
M
P
R
D
16 PL
7
0
_
_
_
_
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
0.25 (0.010)
T B
A
http://onsemi.com
8
MC14511B
PACKAGE DIMENSIONS
SO−16 WB
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751G−03
ISSUE C
A
D
NOTES:
q
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
16
9
3. DIMENSIONS D AND E DO NOT INLCUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN
EXCESS OF THE B DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS
1
8
DIM MIN
2.35
A1 0.10
MAX
2.65
0.25
0.49
0.32
A
B
16X B
B
C
D
E
e
H
h
L
q
0.35
0.23
M
S
S
10.15 10.45
7.40 7.60
1.27 BSC
10.05 10.55
0.25
T A
B
0.25
0.50
0
0.75
0.90
7
_
_
SEATING
PLANE
14X
e
C
T
SOEIAJ−16
CASE 966−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
16
9
E
Q
1
H
E
M
_
E
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.10
9.90
5.10
−−−
0.002
0.014
0.007
0.390
0.201
A
1
A
1
b
c
b
0.13 (0.005)
D
E
0.10 (0.004)
M
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
E
L
L
E
0
0.70
−−−
10
10
0.035
0.031
M
Q
0
_
_
_
_
0.90
0.78
0.028
−−−
1
Z
http://onsemi.com
9
MC14511B
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC14511B/D
相关型号：
MC14512BAL
4000/14000/40000 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDIP16, 620-09
MOTOROLA
MC14512BALDS
Multiplexer, 4000/14000/40000 Series, 1-Func, 8 Line Input, 1 Line Output, True Output, CMOS, CDIP16, 620-09
MOTOROLA
©2020 ICPDF网 联系我们和版权申明