MC14528BDG [ONSEMI]
Dual Monostable Multivibrator; 双单稳多谐振荡器
| 型号： | MC14528BDG |
| 厂家： | 
ONSEMI |
| 描述： | Dual Monostable Multivibrator |
| 文件： | 总9页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
http://onsemi.com
MARKING
C and R .
X
X
Features
DIAGRAMS
• Separate Reset Available
• Diode Protection on All Inputs
• Triggerable from Leading or Trailing Edge Pulse
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
MC14528BCP
AWLYYWWG
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
1
1
PDIP−16
P SUFFIX
CASE 648
• This part should only be used in new designs where the pulse width
is < 10 ꢀs
Note: For designs requiring a pulse width > 10 ꢀ s, please see
MC14538, which is pin−for−pin compatible
• Pb−Free Packages are Available*
14528BG
AWLYWW
1
SOIC−16
D SUFFIX
CASE 751B
1
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
Rating
Symbol
Value
−0.5 to +18.0
Unit
V
DC Supply Voltage Range
V
DD
Input or Output Voltage Range
(DC or Transient)
V , V
in out
−0.5 to V + 0.5
V
DD
MC14528B
ALYWG
Input or Output Current
(DC or Transient) per Pin
I , I
in out
10
mA
1
SOEIAJ−16
F SUFFIX
CASE 966
Power Dissipation, per Package
(Note 1)
P
500
mW
1
D
Ambient Temperature Range
Storage Temperature Range
T
−55 to +125
−65 to +150
260
°C
°C
°C
A
T
stg
Lead Temperature
(8−Second Soldering)
T
L
A
WL
= Assembly Location
= Wafer Lot
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
DD
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 6
MC14528B/D
MC14528B
PIN ASSIGNMENT
ONE−SHOT SELECTION GUIDE
100 ns
1
ꢀ
s
1
0
ꢀ
s
1
0
0
ꢀ
s
1
m
s
1
0
m
s
1
0
0
m
s
1
s
10 s
V
1
2
3
4
5
6
7
8
16
15
V
V
SS
DD
MC14528B
MC14536B
MC14538B
MC14541B
MC4538A*
C 1/R 1
X
23 HR
5 MIN
X
SS
RESET 1
A1
14 C 2/R 2
X X
13 RESET 2
12 A2
B1
Q1
11 B2
*LIMITED OPERATING VOLTAGE (2−6 V)
Q1
10 Q2
TOTAL OUTPUT PULSE WIDTH RANGE
RECOMMENDED PULSE WIDTH RANGE
V
9
Q2
SS
BLOCK DIAGRAM
C 1
X
C 2
X
R 2
X
R 1
X
V
V
DD
DD
1
2
15
14
6
10
9
4
12
Q1
A2
Q2
Q2
A1
B1
5
11
7
B2
Q1
3
13
RESET 2
RESET 1
V
V
= PIN 16
= PIN 1, PIN 8, PIN 15
DD
SS
R AND C ARE EXTERNAL COMPONENTS
X X
FUNCTION TABLE
Inputs
A
Outputs
Reset
B
Q
Q
H
H
H
L
H
H
L
Not Triggered
Not Triggered
H
H
H
L, H,
L
H
L, H,
Not Triggered
Not Triggered
L
X
X
X
X
L
H
Not Triggered
http://onsemi.com
2
MC14528B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
− 55_C
25_C
Typ
125_C
V
DD
(Note 2)
Vdc
Min
Max
Min
Max
Min
Max
Characteristic
Output Voltage
= V or 0
Symbol
Unit
“0” Level
V
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
OL
V
in
DD
V
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
Vdc
OH
“1” Level
= 0 or V
V
in
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
“0” Level
“1” Level
V
IL
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
Vdc
5.0
10
15
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
(V = 0.5 or 4.5 Vdc)
V
O
IH
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
mAdc
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
I
5.0
5.0
10
–1.2
–0.64
–1.6
−
−
−
−
–1.0
–0.51
–1.3
–1.7
–0.88
–2.25
–8.8
−
−
−
−
–0.7
–0.36
–0.9
−
−
−
−
OH
OH
OH
OH
OH
15
–4.2
–3.4
–2.4
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
mAdc
(V = 0.4 Vdc)
OL
I
(V = 0.5 Vdc)
OL
OL
(V = 1.5 Vdc)
OL
Input Current
Input Capacitance
I
15
−
−
−
0.1
−
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
−
ꢀ
A
d
c
in
C
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
ꢀ Adc
ꢀ Adc
DD
−8
Total Supply Current at an external
load Capacitance (C ) and at ex-
ternal timing capacitance (C ), use
−
I (C , C ) = [(C + 0.36C )V f + 2x10
T L X L X
DD
−3
−2 2
R C (V ) f] x 10
L
X
X
DD
I
T
where: I in ꢀ A (per circuit), C and C in pF, R in megohms,
X
T L X X
the formula. (Note 3)
V
in Vdc, f in kHz is input frequency.
DD
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
http://onsemi.com
3
MC14528B
SWITCHING CHARACTERISTICS (C = 50 pF, T = 25_C) (Note 4)
L
A
C
R
X
V
DD
Typ
X
pF
k
ꢁ
Vdc
(Note 5)
Characteristic
Output Rise and Fall Time
Symbol
Min
Max
Unit
t
,
−
−
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
t
5.0
10
15
−
−
−
100
50
40
200
100
80
TLH THL
L
THL
, t
= (0.75 ns/pF) C + 12.5 ns
TLH THL
L
, t
= (0.55 ns/pF) C + 9.5 ns
TLH THL
L
Turn−Off, Turn−On Delay Time — A or B to Q or Q
t
t
,
15
5.0
10
ns
ns
PLH
t
t
t
t
, t
= (1.7 ns/pF) C + 240 ns
5.0
10
15
−
−
−
325
120
90
650
240
180
PLH PHL
L
PHL
, t
= (0.66 ns/pF) C + 87 ns
PLH PHL
L
, t
= (0.5 ns/pF) C + 65 ns
L
PLH PHL
Turn−Off, Turn−On Delay Time — A or B to Q or Q
,
1000
PLH
t
t
t
, t
= (1.7 ns/pF) C + 620 ns
t
5.0
10
15
−
−
−
705
290
210
−
−
−
PLH PHL
L
PHL
, t
= (0.66 ns/pF) C + 257 ns
PLH PHL
L
, t
= (0.5 ns/pF) C + 185 ns
L
PLH PHL
Input Pulse Width — A or B
t
15
1000
15
5.0
10
5.0
10
15
150
75
55
70
30
30
−
−
−
ns
ns
ns
ꢀ s
%
WH
5.0
10
15
−
−
−
70
30
30
−
−
−
t
WL
Output Pulse Width — Q or Q
(For C < 0.01 ꢀ F use graph for
t
t
5.0
10
5.0
10
15
−
−
−
550
350
300
−
−
−
W
W
X
appropriate V level.)
DD
Output Pulse Width — Q or Q
10,000
10,000
15
5.0
10
15
15
10
15
30
50
55
45
90
95
(For C > 0.01 ꢀ F use formula:
X
t
= 0.2 R C Ln [V – V ]) (Note 6)
W
X X DD SS
Pulse Width Match between Circuits in the same
package
t1 – t2
10
5.0
10
15
−
−
−
6.0
8.0
8.0
25
35
35
Reset Propagation Delay — Reset to Q or Q
5.0
5.0
10
15
−
−
−
325
90
60
600
225
170
ns
t
,
PLH
t
PHL
1000
15
10
5.0
10
5.0
10
15
−
−
−
1000
300
250
−
−
−
ns
ns
ns
Retrigger Time
5.0
10
15
0
0
0
−
−
−
−
−
−
t
rr
1000
5.0
10
15
0
0
0
−
−
−
−
−
−
External Timing Resistance
External Timing Capacitance
R
C
−
−
−
−
−
−
5.0
−
1000
kꢁ
X
No Limits (Note 7)
ꢀ
F
X
4. The formulas given are for the typical characteristics only at 25_C.
5. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
6. If C > 15 ꢀ F, Use Discharge Protection Diode D , per Figure 9.
X
X
7. R is in ꢁ, C is in farads, V and V in volts, PW in seconds.
X
X
DD
SS
out
http://onsemi.com
4
MC14528B
ORDERING INFORMATION
Device
†
Package
Shipping
MC14528BCP
PDIP−16
25 Units / Rail
48 Units / Rail
MC14528BCPG
PDIP−16
(Pb−Free)
MC14528BD
SOIC−16
MC14528BDG
SOIC−16
(Pb−Free)
MC14528BDR2
SOIC−16
2500 / Tape & Reel
50 Units / Rail
MC14528BDR2G
SOIC−16
(Pb−Free)
MC14528BF
SOEIAJ−16
MC14528BFG
SOEIAJ−16
(Pb−Free)
MC14528BFEL
SOEIAJ−16
2000 / Tape & Reel
MC14528BFELG
SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
V
V
DD
DD
16
16
I
OL
A
B
A
B
Q
Q
OPEN
Q
Q
V
OL
V
OH
RESET
8
OPEN
RESET
8
I
OH
V
V
SS
SS
Figure 1. Output Source Current Test Circuit
Figure 2. Output Sink Current Test Circuit
V
DD
0.1 ꢀ F
CERAMIC
500 pF
I
D
R
R ′
X
X
C
C ′
X
X
20 ns
20 ns
V
DD
V
in
90%
A
10%
DUTY CYCLE = 50%
Q
V
in
0 V
B
C
L
RESET
A′
Q
C
L
Q′
C
L
B′
Q′
C
L
RESET′
V
SS
Figure 3. Power Dissipation Test Circuit and Waveforms
http://onsemi.com
5
MC14528B
V
DD
*C = 15 pF
X
*C = 15 pF
INPUT CONNECTIONS
R
R ′
L
X
X
R = 5.0 k
X
ꢁ
Characteristics
, t , t , t
Reset
A
B
C
C ′
X
X
t
t
t
, t
V
V
PG1
V
DD
PLH PHL TLH THL
W
DD
DD
, t
, t
, t
t
V
PG2
PLH PHL TLH THL,
W
SS
A
B
PULSE
GENERATOR
, t
, t
PG3
PG1
PG2
PLH(R) PHL(R)
W
Q
C
L
*Includes capacitance of probes,
wiring, and fixture parasitic.
PG1 =
PG2 =
PG3 =
RESET
A′
Q
PULSE
GENERATOR
C
L
Q′
NOTE: AC test waveforms for
PG1, PG2, and PG3 on
next page.
C
L
B′
Q′
PULSE
GENERATOR
C
L
RESET′
V
SS
Figure 4. AC Test Circuit
V
V
DD
SS
90%
10%
50%
50%
A
B
t
t
THL
TLH
t
WH
t
t
TLH
THL
V
V
DD
SS
90%
10%
50%
t
WL
t
t
TLH
THL
V
V
RESET
DD
SS
90%
10%
50%
t
t
WL
THL
t
W
t
rr
t
t
t
PLH
TLH
PHL
V
V
OH
OL
90%
10%
50%
50%
50%
50%
Q
Q
t
t
THL
TLH
t
t
t
PHL
PHL
PHL
V
V
OH
OL
90%
10%
50%
50%
50%
50%
Figure 5. AC Test Waveforms
1000
V
= 15 V
DD
15 V
10 V
5.0 V
10 V
100
10
5.0 V
R = 100 k
X
ꢁ
15 V
10 V
5.0 V
R = 10 k
X
ꢁ
R = 5.0 k
X
ꢁ
1.0
0.1
15 V
10 V
5.0 V
10
100
1000
10,000
100,000
C , EXTERNAL CAPACITANCE (pF)
X
Figure 6. Pulse Width versus CX
http://onsemi.com
6
MC14528B
TYPICAL APPLICATIONS
C
x
C
R
x
x
R
x
V
DD
V
DD
RISING EDGE
TRIGGER
RISING EDGE
TRIGGER
Q
Q
Q
Q
A
B
A
B
RESET
RESET
V
DD
V
DD
V
DD
C
C
x
R
x
R
x
x
V
V
DD
DD
Q
Q
Q
Q
A
A
FALLING EDGE
TRIGGER
FALLING EDGE
TRIGGER
B
B
RESET
RESET
V
V
DD
DD
Figure 7. Retriggerable
Monostables Circuitry
Figure 8. Non−Retriggerable
Monostables Circuitry
D
X
C
x
V
DD
NC
1, 15
2, 14
R
x
V
DD
NC
NC
Q
A
B
Q
Q
Q
RESET
RESET
V
DD
V
DD
V
V
DD
DD
Figure 9. Use of a Diode to Limit
Power Down Current Surge
Figure 10. Connection of Unused Sections
http://onsemi.com
7
MC14528B
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
F
C
L
MIN MAX
A
B
C
D
F
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
0.100 BSC
2.54 BSC
1.27 BSC
K
M
H
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
J
0.21
0.38
3.30
7.74
10
G
2.80
7.50
0
D 16 PL
M
M
0.25 (0.010)
T A
M
S
0
10
_
_
_
_
0.020 0.040
0.51
1.01
SOIC−16
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
G
DIM MIN
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
0.386
0.150
0.054
0.014
0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
_
_
_
_
M
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T B
A
http://onsemi.com
8
MC14528B
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
16
9
E
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
Q
1
H
E
E
M
_
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
−−−
0.05
0.35
0.10
9.90
5.10
A
A
1
0.002
0.008
0.020
0.011
0.413
0.215
1
b
0.13 (0.005)
b
c
0.014
0.007
0.390
0.201
0.10 (0.004)
M
D
E
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
E
L
L
E
0
10
10
0.035
M
Q
0
0.028
_
_
_
_
0.70
−−−
0.90
0.78
1
Z
−−− 0.031
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
MC14528B/D
相关型号：
MC14528BFL2
4000/14000/40000 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, EIAJ, PLASTIC, SOIC-16
ONSEMI
©2020 ICPDF网 联系我们和版权申明