MC33365P [ONSEMI]
HIGH VOLTAGE OFF-LINE SWITCHING REGULATOR; 高压离线开关稳压器
| 型号： | MC33365P |
| 厂家： | 
ONSEMI |
| 描述： | HIGH VOLTAGE OFF-LINE SWITCHING REGULATOR |
| 文件： | 总12页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document by MC33365/D
HIGH VOLTAGE
OFF–LINE
SWITCHING REGULATOR
The MC33365 is a monolithic high voltage switching regulator that is
specifically designed to operate from a rectified 240 Vac line source. This
integrated circuit features an on–chip 700 V/1.0 A SenseFET power switch,
450 V active off–line startup FET, duty cycle controlled oscillator, current
limiting comparator with a programmable threshold and leading edge
blanking, latching pulse width modulator for double pulse suppression, high
gain error amplifier, and a trimmed internal bandgap reference. Protective
features include cycle–by–cycle current limiting, input undervoltage lockout
with hysteresis, bulk capacitor voltage sensing, and thermal shutdown. This
device is available in a 16–lead dual–in–line package.
SEMICONDUCTOR
TECHNICAL DATA
• On–Chip 700 V, 1.0 A SenseFET Power Switch
• Rectified 240 Vac Line Source Operation
• On–Chip 450 V Active Off–Line Startup FET
• Latching PWM for Double Pulse Suppression
• Cycle–By–Cycle Current Limiting
16
• Input Undervoltage Lockout with Hysteresis
• Bulk Capacitor Voltage Comparator
• Trimmed Internal Bandgap Reference
• Internal Thermal Shutdown
1
P SUFFIX
PLASTIC PACKAGE
CASE 648E
(DIP–16)
Simplified Application
AC Input
Startup Input
1
PIN CONNECTIONS
Regulator
Output
Startup
Power Switch
Drain
Mirror
Startup Input
1
16
V
CC
Reg
3
8
DC Output
UVLO
BOK
V
3
4
5
6
7
8
CC
6
BOK
13
12
R
T
11
16
Gnd
Gnd
PWM Latch
Osc
C
Power Switch
Drain
T
7
Driver
S
R
T
11 BOK
Q
Voltage Feedback
Input
Compensation
C
T
10
9
R
PWM
Regulator Output
LEB
I
pk
Compensation
9
(Top View)
Thermal
ORDERING INFORMATION
Operating
10
EA
Voltage
Feedback
Input
Temperature Range
Device
Package
Gnd
4, 5, 12, 13
MC33365P
T = –25° to +125°C
J
DIP–16
Motorola, Inc. 1999
Rev 1
MC33365
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Switch (Pin 16)
Drain Voltage
Drain Current
V
I
700
1.0
V
A
DS
DS
Startup Input Voltage (Pin 1, Note 1)
Pin 3 = Gnd
Pin 3 ≤ 1000 µF to ground
V
in
V
400
500
Power Supply Voltage (Pin 3)
V
40
V
V
CC
Input Voltage Range
Voltage Feedback Input (Pin 10)
Compensation (Pin 9)
V
–1.0 to V
IR
reg
Bulk OK Input (Pin 11)
R
T
C
T
(Pin 6)
(Pin 7)
Thermal Characteristics
°C/W
P Suffix, Dual–In–Line Case 648E
Thermal Resistance, Junction–to–Air
Thermal Resistance, Junction–to–Case
R
θJA
R
θJC
80
15
Operating Junction Temperature
Storage Temperature
T
–25 to +150
–55 to +150
°C
°C
J
T
stg
NOTE: ESD data available upon request.
ELECTRICAL CHARACTERISTICS (V
= 20 V, R = 10 k, C = 390 pF, C = 1.0 µF, for typical values T = 25°C,
Pin 8 J
CC
T
T
for min/max values T is the operating junction temperature range that applies (Note 2), unless otherwise noted.)
J
Characteristic
Symbol
Min
Typ
Max
Unit
REGULATOR (Pin 8)
Output Voltage (I = 0 mA, T = 25°C)
V
reg
5.5
–
6.5
30
44
–
7.5
500
200
8.0
V
mV
mV
V
O
J
Line Regulation (V
= 20 V to 40 V)
Reg
line
CC
Load Regulation (I = 0 mA to 10 mA)
O
Reg
–
load
Total Output Variation over Line, Load, and Temperature
V
reg
5.3
OSCILLATOR (Pin 7)
Frequency
f
kHz
OSC
C
= 390 pF
T
T = 25°C (V
T = T
= 20 V)
260
255
285
–
310
315
J
CC
to T
(V
= 20 V to 40 V)
= 20 V to 40 V)
J low
= 2.0 nF
high CC
C
T
T = 25°C (V
= 20 V)
60
59
67.5
–
75
76
J
CC
to T
low
T = T
(V
J
high CC
Frequency Change with Voltage (V
= 20 V to 40 V)
∆f /∆V
OSC
–
0.1
2.0
kHz
CC
ERROR AMPLIFIER (Pins 9, 10)
Voltage Feedback Input Threshold
V
2.52
–
2.6
0.6
20
2.68
5.0
V
mV
nA
dB
MHz
V
FB
Line Regulation (V
CC
= 20 V to 40 V, T = 25°C)
Reg
I
J
line
Input Bias Current (V
= 2.6 V, T = 0 – 125°C)
–
500
94
FB
J
IB
Open Loop Voltage Gain (T = 25°C)
A
VOL
70
0.85
82
J
Gain Bandwidth Product (f = 100 kHz, T = 25°C)
GBW
1.0
1.15
J
Output Voltage Swing
High State (I
Low State (I
= 100 µA, V
< 2.0 V)
FB
> 3.0 V)
V
OH
OL
4.0
–
5.3
0.2
–
0.35
Source
Sink
= 100 µA, V
V
FB
NOTES: 1. Maximum power dissipation limits must be observed.
2. Tested junction temperature range for the MC33363B:
T
= –25°C
T
= +125°C
low
high
2
MOTOROLA ANALOG IC DEVICE DATA
MC33365
ELECTRICAL CHARACTERISTICS (continued) (V
CC
= 20 V, R = 10 k, C = 390 pF, C = 1.0 µF, for typical values T = 25°C,
Pin 8 J
T
T
for min/max values T is the operating junction temperature range that applies (Note 2), unless otherwise noted.)
J
Characteristic
Symbol
Min
Typ
Max
Unit
BULK OK (Pin 11)
Input Threshold Voltage
V
1.18
–
1.25
100
–
1.32
500
53
V
th
Input Bias Current (V
< V , T = 0 – 125°C)
I
IB
nA
µA
BK
th
J
Source Current (Turn on after V
> V , T = 25°C – 125°C)
th
I
39
BK
J
SC
PWM COMPARATOR (Pins 7, 9)
Duty Cycle
%
Maximum (V
Minimum (V
= 0 V)
= 2.7 V)
DC
DC
(min)
48
–
50
0
52
0
FB
FB
(max)
POWER SWITCH (Pin 16)
Drain–Source On–State Resistance (I = 200 mA)
R
Ω
D
DS(on)
T = 25°C
–
–
15
–
17
39
J
T = T
to T
high
J
low
Drain–Source Off–State Leakage Current
= 650 V
I
µA
D(off)
V
DS
–
–
–
0.2
50
50
100
–
Rise Time
t
r
ns
ns
Fall Time
t
f
–
OVERCURRENT COMPARATOR (Pin 16)
Current Limit Threshold (R = 10 k)
T
I
0.5
0.72
0.9
A
lim
STARTUP CONTROL (Pin 1)
Peak Startup Current (V = 400 V) (Note 3)
I
mA
in
start
V
CC
V
CC
= 0 V
–
–
2.0
2.0
4.0
4.0
= (V
– 0.2 V)
th(on)
Off–State Leakage Current (V = 50 V, V
in
= 20 V)
I
–
40
200
µA
CC
D(off)
UNDERVOLTAGE LOCKOUT (Pin 3)
Startup Threshold (V
CC
Increasing)
V
11
15.2
9.5
18
V
V
th(on)
Minimum Operating Voltage After Turn–On
V
7.5
11.5
CC(min)
TOTAL DEVICE (Pin 3)
Power Supply Current
I
mA
CC
Startup (V
Operating
= 10 V, Pin 1 Open)
–
–
0.25
3.2
0.5
5.0
CC
NOTES: 3. The device can only guarantee to start up at high temperature below +115°C.
Figure 2. Power Switch Peak Drain Current
versus Timing Resistor
Figure 1. Oscillator Frequency
versus Timing Resistor
1.0 M
1.0
0.8
C
C
= 100 pF
= 200 pF
V
C
T
= 20 V
T
V
T
= 20 V
CC
T
CC
= 25
= 1.0
µF
°C
500 k
A
= 25
°C
T
A
0.6
C
C
= 500 pF
= 1.0 nF
200 k
100 k
50 k
T
0.4
0.3
T
C
= 2.0 nF
T
0.2
C
C
= 5.0 nF
= 10 nF
0.15
T
20 k
10 k
Inductor supply voltage and inductance value are
adjusted so that I turn–off is achieved at 5.0 s.
µ
pk
15
R , TIMING RESISTOR (kΩ)
T
0.1
7.0
7.0
10
15
20
30
50
70
10
20
30
40
50
70
R , TIMING RESISTOR (k
Ω)
T
T
3
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Figure 4. Maximum Output Duty Cycle
versus Timing Resistor Ratio
Figure 3. Oscillator Charge/Discharge
Current versus Timing Resistor
0.8
0.5
70
60
50
V
C
T
= 20 V
= 2.0 nF
R
/R Ratio
T
CC
T
D
V
= 20 V
CC
= 25°C
Discharge Resistor
Pin 6 to Gnd
T
A
= 25°C
A
0.3
0.2
0.15
40
30
R
/R Ratio
T
C
Charge Resistor
0.1
Pin 6 to V
reg
0.08
7.0
10
15
20
30
50
70
1.0
2.0
3.0
5.0
7.0
10
R , TIMING RESISTOR (k
Ω)
TIMING RESISTOR RATIO
T
Figure 5. Error Amp Open Loop Gain and
Phase versus Frequency
Figure 6. Error Amp Output Saturation
Voltage versus Load Current
100
0
0
–1.0
– 2.0
V
V
= 20 V
= 1.0 to 4.0 V
= 5.0 MΩ
CC
O
L
L
Source Saturation
(Load to Ground)
V
ref
80
60
30
60
R
C
T
Gain
= 2.0 pF
= 25
°C
A
Phase
40
20
90
2.0
1.0
120
150
Sink Saturation
V
= 20 V
CC
= 25°C
(Load to V
)
ref
T
A
0
Gnd
–20
180
0
10
100
1.0 k
10 k
100 k
1.0 M
10 M
0
0.2
0.4
0.6
0.8
1.0
f, FREQUENCY (Hz)
I
, OUTPUT LOAD CURRENT (mA)
O
Figure 7. Error Amplifier Small Signal
Transient Response
Figure 8. Error Amplifier Large Signal
Transient Response
V
= 20 V
= –1.0
= 10 pF
V
= 20 V
CC
CC
A
A = –1.0
V
V
C
C
= 10 pF
1.80 V
1.75 V
3.00 V
1.75 V
0.50 V
L
L
T
= 25
°C
T = 25°C
A
A
1.70 V
1.0
µs/DIV
1.0 µs/DIV
4
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Figure 10. Peak Startup Current
versus Power Supply Voltage
Figure 9. Regulator Output Voltage
Change versus Source Current
0
2.0
V
= 400 V
V
R
C
= 20 V
= 10 k
Pin 1
= 25°C
CC
T
T
A
= 1.0 µF
= 25°C
Pin 8
–20
T
A
–40
–60
–80
1.0
Pulse tested with an on–time of 20 µs to 300 µs
at < 1.0% duty cycle. The on–time is adjusted at
Pin 1 for a maximum peak current out of Pin 3.
0
0
4.0
8.0
12
16
20
0
2.0
4.0
V , POWER SUPPLY VOLTAGE (V)
CC
6.0
8.0
10
12
14
I
, REGULATOR SOURCE CURRENT (mA)
reg
Figure 11. Power Switch Drain–Source
On–Resistance versus Temperature
Figure 12. Power Switch
Drain–Source Capacitance versus Voltage
32
24
16
160
120
80
I
= 200 mA
V
= 20 V
D
CC
= 25°C
T
A
40
0
8.0
0
Pulse tested at 5.0 ms with < 1.0% duty cycle
so that T is as close to T as possible.
J
A
C
measured at 1.0 MHz with 50 mVpp.
OSS
–50
–25
0
25
50
75
100
C)
125
150
1.0
10
100
1000
T , AMBIENT TEMPERATURE (
°
V
, DRAIN–SOURCE VOLTAGE (V)
A
DS
Figure 14. DW and P Suffix Transient
Thermal Resistance
Figure 13. Supply Current versus Supply Voltage
3.2
2.4
1.6
0.8
0
100
C
= 390 pF
T
L = 12.7 mm of 2.0 oz. copper.
Refer to Figure 15.
C
= 2.0 nF
T
10
R
= 10 k
T
Pin 1 = Open
Pin 4, 5, 10, 11,
12, 13 = Gnd
T
= 25°C
A
1.0
0
10
20
, SUPPLY VOLTAGE (V)
30
40
0.01
0.1
1.0
t, TIME (s)
10
100
V
CC
5
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Figure 15. P Suffix (DIP–16) Thermal Resistance and
Maximum Power Dissipation versus P.C.B. Copper Length
100
5.0
Printed circuit board heatsink example
2.0 oz
L
80
4.0
Copper
R
L
θ
JA
3.0 mm
60
40
20
3.0
2.0
1.0
0
Graphs represent symmetrical layout
P
for T = 70°C
A
D(max)
0
0
10
20
30
40
50
L, LENGTH OF COPPER (mm)
PIN FUNCTION DESCRIPTION
Pin
Function
Description
1
Startup Input
This pin connects directly to the rectified ac line voltage source. Internally Pin 1 is tied to the drain
of a high voltage startup MOSFET. During startup, the MOSFET supplies internal bias, and charges
an external capacitor that connects from the V
pin to ground.
CC
2
3
–
This pin has been omitted for increased spacing between the rectified ac line voltage on Pin 1 and
the V potential on Pin 3.
CC
V
This is the positive supply voltage input. During startup, power is supplied to this input from Pin 1.
When V reaches the UVLO upper threshold, the startup MOSFET turns off and power is supplied
CC
CC
from an auxiliary transformer winding.
4, 5, 12, 13
Ground
These pins are the control circuit grounds. They are part of the IC lead frame and provide a thermal
path from the die to the printed circuit board.
6
7
R
C
Resistor R connects from this pin to ground. The value selected will program the Current Limit
T
T
T
Comparator threshold and affect the Oscillator frequency.
Capacitor C connects from this pin to ground. The value selected, in conjunction with resistor R ,
T
T
programs the Oscillator frequency.
8
Regulator Output
Compensation
This 6.5 V output is available for biasing external circuitry. It requires an external bypass capacitor
of at least 1.0 µF for stability.
9
This pin is the Error Amplifier output and is made available for loop compensation. It can be used as
an input to directly control the PWM Comparator.
10
Voltage Feedback
Input
This is the inverting input of the Error Amplifier. It has a 2.6 V threshold and normally connects
through a resistor divider to the converter output, or to a voltage that represents the converter
output.
11
14, 15
16
Bulk OK Input
–
This is the non–inverting input of the bulk capacitor voltage comparator. It has an input threshold
voltage of 1.25V. This pin is connected through a resistor divider to the bulk capacitor line voltage.
These pins have been omitted for increased spacing between the high voltages present on the
Power Switch Drain, and the ground potential on Pins 12 and 13.
Power Switch
Drain
This pin is designed to directly drive the converter transformer and is capable of switching a
maximum of 700 V and 1.0 A.
6
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Figure 16. Representative Block Diagram
AC Input
Startup Input
1
Startup
Control
Current
Mirror
V
Regulator Output
CC
Band Gap
Regulator
6.5 V
8
3
UVLO
DC Output
I
2.25 I
14.5 V/
9.5 V
6
BOK
11
R
T
4 I
1.25 V
Oscillator
16
C
7
T
PWM Latch
Power Switch
Drain
Driver
S
Q
R
PWM
Comparator
Leading Edge
Blanking
8.1
Thermal
Compensation
9
Current Limit
Comparator
Shutdown
405
2.6 V
Error
Amplifier
270
µ
A
10
Voltage
Feedback Input
Gnd
4, 5, 12, 13
Figure 17. Timing Diagram
2.6 V
Capacitor C
T
0.6 V
Compensation
Oscillator Output
PWM
Comparator
Output
PWM Latch
Q Output
Current Limit
Propagation
Delay
Power Switch
Gate Drive
Current
Limit
Threshold
Leading Edge
Blanking Input
(Power Switch
Drain Current)
Normal PWM Operating Range
Output Overload
7
MOTOROLA ANALOG IC DEVICE DATA
MC33365
OPERATING DESCRIPTION
Introduction
The formula for the charge/discharge current along with
the oscillator frequency are given below. The frequency
The MC33365 represents a new higher level of integration
by providing all the active high voltage power, control, and
protection circuitry required for implementation of a flyback or
forward converter on a single monolithic chip. This device is
designed for direct operation from a rectified 240 Vac line
source and requires a minimum number of external
components to implement a complete converter. A
description of each of the functional blocks is given below,
and the representative block and timing diagrams are shown
in Figures 16 and 17.
formula is a first order approximation and is accurate for C
T
values greater than 500 pF. For smaller values of C , refer to
T
Figure 1. Note that resistor R also programs the Current
T
Limit Comparator threshold.
I
5.4
chg dscg
I
f
R
chg dscg
4C
T
T
Oscillator and Current Mirror
PWM Comparator and Latch
The oscillator frequency is controlled by the values
selected for the timing components R and C . Resistor R
T
programs the oscillator charge/discharge current via the
The pulse width modulator consists of a comparator with
the oscillator ramp voltage applied to the non–inverting input,
while the error amplifier output is applied into the inverting
input. The Oscillator applies a set pulse to the PWM Latch
T
T
Current Mirror 4 I output, Figure 3. Capacitor C is charged
T
and discharged by an equal magnitude internal current
source and sink. This generates a symmetrical 50 percent
duty cycle waveform at Pin 7, with a peak and valley
threshold of 2.6 V and 0.6 V respectively. During the
while C is discharging, and upon reaching the valley
T
voltage, Power Switch conduction is initiated. When C
T
charges to a voltage that exceeds the error amplifier output,
the PWM Latch is reset, thus terminating Power Switch
conduction for the duration of the oscillator ramp–up period.
This PWM Comparator/Latch combination prevents multiple
output pulses during a given oscillator clock cycle. The timing
diagram shown in Figure 17 illustrates the Power Switch duty
cycle behavior versus the Compensation voltage.
discharge of C , the oscillator generates an internal blanking
T
pulse that holds the inverting input of the AND gate Driver
high. This causes the Power Switch gate drive to be held in a
low state, thus producing a well controlled amount of output
deadtime. The amount of deadtime is relatively constant with
respect to the oscillator frequency when operating below
1.0 MHz. The maximum Power Switch duty cycle at Pin 16
can be modified from the internal 50% limit by providing an
Current Limit Comparator and Power Switch
The MC33365 uses cycle–by–cycle current limiting as a
means of protecting the output switch transistor from
overstress. Each on–cycle is treated as a separate situation.
Current limiting is implemented by monitoring the output
switch current buildup during conduction, and upon sensing
an overcurrent condition, immediately turning off the switch
for the duration of the oscillator ramp–up period.
The Power Switch is constructed as a SenseFET allowing
a virtually lossless method of monitoring the drain current. It
consists of a total of 1462 cells, of which 36 are connected to
a 8.1 Ω ground–referenced sense resistor. The Current
Sense Comparator detects if the voltage across the sense
resistor exceeds the reference level that is present at the
inverting input. If exceeded, the comparator quickly resets
the PWM Latch, thus protecting the Power Switch. The
current limit reference level is generated by the 2.25 I output
of the Current Mirror. This current causes a reference voltage
to appear across the 405 Ω resistor. This voltage level, as
well as the Oscillator charge/discharge current are both set
additional charge or discharge current path to C , Figure 18.
T
In order to increase the maximum duty cycle, a discharge
current resistor R is connected from Pin 7 to ground. To
D
decrease the maximum duty cycle, a charge current resistor
R
is connected from Pin 7 to the Regulator Output. Figure 4
C
shows an obtainable range of maximum output duty cycle
versus the ratio of either R or R with respect to R .
C
D
T
Figure 18. Maximum Duty Cycle Modification
Current
Mirror
Regulator Output
8
1.0
2.25 I
I
R
R
Current
C
D
6
by resistor R . Therefore when selecting the values for R
T
T
Limit
and C , R must be chosen first to set the Power Switch peak
Reference
R
T
T
T
drain current, while C is chosen second to set the desired
T
4 I
Oscillator frequency. A graph of the Power Switch peak drain
Oscillator
current versus R is shown in Figure 2 with the related
Blanking
Pulse
T
C
7
T
formula below.
R
– 1.077
T
PWM
Comparator
I
8.8
1000
pk
8
MOTOROLA ANALOG IC DEVICE DATA
MC33365
The Power Switch is designed to directly drive the converter
Startup Control
transformer and is capable of switching a maximum of 700 V
and 1.0 A. Proper device voltage snubbing and heatsinking
are required for reliable operation.
An internal Startup Control circuit with a high voltage
enhancement mode MOSFET is included within the
MC33365. This circuitry allows for increased converter
efficiency by eliminating the external startup resistor, and its
associated power dissipation, commonly used in most
off–line converters that utilize a UC3842 type of controller.
Rectified ac line voltage is applied to the Startup Input, Pin 1.
This causes the MOSFET to enhance and supply internal
A Leading Edge Blanking circuit was placed in the current
sensing signal path. This circuit prevents a premature reset
of the PWM Latch. The premature reset is generated each
time the Power Switch is driven into conduction. It appears as
a narrow voltage spike across the current sense resistor, and
is due to the MOSFET gate to source capacitance,
transformer interwinding capacitance, and output rectifier
recovery time. The Leading Edge Blanking circuit has a
dynamic behavior in that it masks the current signal until the
Power Switch turn–on transition is completed. The current
limit propagation delay time is typically 262 ns. This time is
measured from when an overcurrent appears at the Power
Switch drain, to the beginning of turn–off.
bias as well as charge current to the V
that connects from Pin 3 to ground. When V
CC
bypass capacitor
reaches the
CC
UVLO upper threshold of 15.2 V, the IC commences
operation and the startup MOSFET is turned off. Operating
bias is now derived from the auxiliary transformer winding,
and all of the device power is efficiently converted down from
the rectified ac line.
The startup MOSFET will provide a steady current of
1.7 mA, Figure 10, as V
increases or shorted to ground.
CC
The startup MOSFET is rated at a maximum of 400 V with
shorted to ground, and 500 V when charging a V
Error Amplifier
An fully compensated Error Amplifier with access to the
inverting input and output is provided for primary side voltage
sensing, Figure 16. It features a typical dc voltage gain of 82
dB, and a unity gain bandwidth of 1.0 MHz with 78 degrees of
phase margin, Figure 5. The noninverting input is internally
biased at 2.6 V ±3.1% and is not pinned out. The Error
Amplifier output is pinned out for external loop compensation
and as a means for directly driving the PWM Comparator.
The output was designed with a limited sink current capability
of 270 µA, allowing it to be easily overridden with a pull–up
resistor. This is desirable in applications that require
secondary side voltage sensing.
V
CC
CC
capacitor of 1000 µF or less.
Regulator
A low current 6.5 V regulated output is available for
biasing the Error Amplifier and any additional control system
circuitry. It is capable of up to 10 mA and has short–circuit
protection. This output requires an external bypass capacitor
of at least 1.0 µF for stability.
Thermal Shutdown and Package
Internal thermal circuitry is provided to protect the Power
Switch in the event that the maximum junction temperature is
exceeded. When activated, typically at 150°C, the Latch is
forced into a ‘reset’ state, disabling the Power Switch. The
Latch is allowed to ‘set’ when the Power Switch temperature
falls below 140°C. This feature is provided to prevent
catastrophic failures from accidental device overheating. It is
not intended to be used as a substitute for proper
heatsinking.
The MC33365 is contained in a heatsinkable plastic
dual–in–line package in which the die is mounted on a
special heat tab copper alloy lead frame. This tab consists of
the four center ground pins that are specifically designed to
improve thermal conduction from the die to the circuit board.
Figure 15 shows a simple and effective method of utilizing the
printed circuit board medium as a heat dissipater by
soldering these pins to an adequate area of copper foil. This
permits the use of standard layout and mounting practices
while having the ability to halve the junction to air thermal
resistance. The examples are for a symmetrical layout on a
single–sided board with two ounce per square foot of copper.
Bulk Capacitor Voltage Comparator
The Bulk Capacitor Voltage Comparator is included to
sense the brown–out condition of the bulk capacitor line
voltage. The non–inverting input, Pin 11, is connected to the
voltage divider to sense the line voltage. The inverting input is
connected internally to a threshold voltage of 1.25V. As the
line voltage drops below 120V (Pin 11 drops below 1.25V),
the reset signal is activiated from the PWM Latch to turn off
the Power Switch. To prevent erratic switching as the
threshold is crossed, hysteresis at Pin 11 is provided.
Undervoltage Lockout
An Undervoltage Lockout comparator has been
incorporated to guarantee that the integrated circuit has
sufficient voltage to be fully functional before the output stage
is enabled. The UVLO comparator monitors the V
voltage
CC
at Pin 3 and when it exceeds 14.5 V, the reset signal is
removed from the PWM Latch allowing operation of the
Power Switch. To prevent erratic switching as the threshold is
crossed, 5.0 V of hysteresis is provided.
9
MOTOROLA ANALOG IC DEVICE DATA
MC33365
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 648E–01
(DIP–16)
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION A AND B DOES NOT INCLUDE MOLD
PROTRUSION.
5. MOLD FLASH OR PROTRUSIONS SHALL NOT
EXCEED 0.25 (0.010).
R
ISSUE O
16
1
9
8
–B–
6. ROUNDED CORNER OPTIONAL.
M
INCHES
MILLIMETERS
L
P
DIM
A
B
C
D
F
G
H
J
K
L
M
P
MIN
MAX
0.760
0.260
0.175
0.021
0.070
MIN
18.80
6.23
3.69
0.39
1.27
MAX
19.30
6.60
4.44
0.53
1.77
F
0.740
0.245
0.145
0.015
0.050
J
C
–T–
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
SEATING
PLANE
S
0.008
0.015
0.140
0.305
10
0.21
0.38
3.55
7.74
10
0.120
0.295
0
3.05
7.50
0
K
H
G
0.200 BSC
0.300 BSC
0.015 0.035
5.08 BSC
7.62 BSC
0.39 0.88
D 13 PL
R
S
M
S
S
0.25 (0.010)
T
B
A
10
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
11
MOTOROLA ANALOG IC DEVICE DATA
MC33365
Mfax is a trademark of Motorola, Inc.
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MC33365/D
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