MC74AC299 [ONSEMI]
8-INPUT UNIVERSAL SHIFT/STORAGE REGISTER WITH COMMON PARALLEL I/O PINS; 与常见的并行I / O引脚8输入通用移位/存储寄存器
| 型号： | MC74AC299 |
| 厂家： | 
ONSEMI |
| 描述： | 8-INPUT UNIVERSAL SHIFT/STORAGE REGISTER WITH COMMON PARALLEL I/O PINS |
| 文件： | 总10页 (文件大小：222K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
8-INPUT UNIVERSAL
SHIFT/STORAGE REGISTER
WITH COMMON
PARALLEL I/O PINS
The MC74AC299/74ACT299 is an 8-bit universal shift/storage register
with 3-state outputs. Four modes of operation are possible: hold (store), shift left,
shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed
to reduce the total number of package pins. Additional outputs are provided for
flip-flops Q , Q to allow easy serial cascading. A separate active LOW Master
0
7
Reset is used to reset the register.
• Common Parallel I/O for Reduced Pin Count
• Additional Serial Inputs and Outputs for Expansion
• Four Operating Modes: Shift Left, Shift Right, Load and Store
• 3-State Outputs for Bus-Oriented Applications
• Outputs Source/Sink 24 mA
N SUFFIX
CASE 738-03
PLASTIC
• ′ACT299 Has TTL Compatible Inputs
V
CC
S
1
DS
7
Q
7
I/O
7
I/O
5
I/O
3
I/O
1
CP DS
0
20
19
18
17
16
15
14
12
13
11
DW SUFFIX
CASE 751D-04
PLASTIC
1
2
OE
3
OE
4
I/O
5
I/O
6
I/O
7
I/O
9
MR GND
8
10
S
0
Q
0
1
2
6
4
2
0
PIN NAMES
CP
Clock Pulse Input
LOGIC SYMBOL
DS
DS
Serial Data Input for Right Shift
Serial Data Input for Left Shift
Mode Select Inputs
Asynchronous Master Reset
3-State Output Enable Inputs
Parallel Data Inputs or
0
7
S , S
0
1
MR
S
0
DS
0
DS
7
OE OE
1,
2
7
S
1
I/O –I/O
0
Q
7
3-State Parallel Outputs
CP
OE
Q , Q
0
Serial Outputs
7
MR
Q
I/O I/O I/O I/O I/O I/O I/O I/O
0 0 1 2 3 4 5 6 7
FACT DATA
5-1
MC74AC299 MC74ACT299
LOGIC DIAGRAM
DS
Q
7
7
D Q
C
D
I/O
7
CP
D Q
C
D
I/O
6
CP
D
Q
Q
Q
Q
Q
Q
I/O
5
C
D
CP
D
C
I/O
4
D
CP
D
C
I/O
3
D
CP
D
C
I/O
2
D
CP
D
C
I/O
1
D
CP
D
C
I/O
0
D
S
S
0
1
OE
MR
OE
2
1
DS
CP
Q
0
0
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
FACT DATA
5-2
MC74AC299 MC74ACT299
FUNCTIONAL DESCRIPTION
The MC74AC299/74ACT299 contains eight edge-triggered
D-type flip-flops and the interstage logic necessary to perform
synchronous shift left, shift right, parallel load and hold
operations. The type of operation is determined by S and S ,
asshownintheTruthTable.Allflip-flopoutputsarebroughtout
through 3-state buffers to separate I/O pins that also serve as
TRUTH TABLE
Inputs
Response
MR
S
1
S
0
CP
X
0
1
L
X
X
Asynchronous Reset; Q –Q = LOW
0
n
7
H
H
H
H
H
L
H
L
H
H
L
Parallel Load; I/O
Q
n
data inputs in the parallel load mode. Q and Q are also
0
7
Shift Rights; DS
Q , Q
Q , etc.
1
6
0
0
0
brought out on other pins for expansion in serial shifting of
longer words.
Shift Left; DS
Hold
Q , Q
7 7
Q , etc.
7
L
X
A LOW signal on MR overrides the Select and CP inputs
and resets the flip-flops. All other state changes are initiated
by the rising edge of the clock. Inputs can change when the
clock is in either state provided only that the recommended
setup and hold times, relative to the rising edge of CP, are
observed.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
A HIGH signal on either OE or OE disables the 3-state
1
2
buffers and puts the I/O pins in the high impedance state. In
this condition the shift, hold, load and reset operations can still
occur. The 3-state buffers are also disabled by HIGH signals
on both S and S in preparation for a parallel load operation.
0
1
MAXIMUM RATINGS*
Symbol
Parameter
Value
–0.5 to +7.0
Unit
V
V
V
DC Supply Voltage (Referenced to GND)
CC
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
–0.5 to V
+0.5
+0.5
V
in
CC
CC
V
out
–0.5 to V
V
I
I
I
±20
mA
mA
mA
°C
in
DC Output Sink/Source Current, per Pin
±50
±50
out
CC
DC V
or GND Current per Output Pin
CC
T
stg
Storage Temperature
–65 to +150
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
Max
6.0
Unit
V
′AC
V
Supply Voltage
CC
′ACT
5.5
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
150
40
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
ns/V
t , t
r f
25
10
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
r f
ns/V
8.0
T
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current — High
140
85
°C
°C
J
T
A
–40
25
I
–24
24
mA
mA
OH
OL
I
Output Current — Low
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
FACT DATA
5-3
MC74AC299 MC74ACT299
DC CHARACTERISTICS
Symbol
74AC
= +25°C
74AC
T
A
=
V
(V)
CC
Parameter
Unit
Conditions
T
A
–40°C to +85°C
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
– 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V
CC
= 0.1 V
OUT
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
Maximum Low Level
Input Voltage
IL
or V
– 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= –50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL
IH
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
–12 mA
–24 mA
–24 mA
V
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
I
24 mA
24 mA
OL
I
IN
Maximum Input
Leakage Current
5.5
5.5
±0.1
±0.6
±1.0
±6.0
µA
µA
V = V , GND
CC
I
I
Maximum 3-State
Current
V (OE) = V , V
IL IH
OZT
I
V = V , GND
I
O
CC
= V , GND
CC
V
I
I
I
5.5
5.5
75
mA
mA
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
–75
V
V
= 3.85 V Min
or GND
Maximum Quiescent
Supply Current
5.5
8.0
80
µA
= V
IN
CC
* All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
Note: I and I
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
IN
CC
FACT DATA
5-4
MC74AC299 MC74ACT299
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74AC
74AC
T
= –40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
Symbol
Parameter
to +85°C
C
Unit
= 50 pF
L
Min
Typ
Max
Min
Max
Maximum Input
Frequency
3.3
5.0
90
130
80
105
f
t
t
t
t
t
t
t
t
t
t
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-3
3-6
3-6
3-6
3-6
3-6
3-6
3-7
3-8
3-7
3-8
max
Propagation Delay
3.3
5.0
8.5
5.5
20.5
14
7.0
4.5
22
15
PLH
PHL
PLH
PHL
PHL
PHL
PZH
PZL
PHZ
PLZ
CP to Q
0 or
Q
7
Propagation Delay
CP to Q
3.3
5.0
8.5
5.5
21.5
14.5
7.0
5.0
23
16
Q
0 or
Propagation Delay
CP to I/O
7
3.3
5.0
9.0
6.0
20.5
14.5
7.5
5.0
22.5
16
n
Propagation Delay
CP to I/O
3.3
5.0
10
6.5
23
16
8.5
6.0
24.5
17.5
n
Propagation Delay
MR to Q or Q
3.3
5.0
9.0
5.5
22.5
15.5
7.5
5.0
25.0
17.0
0
7
Propagation Delay
MR to I/O
3.3
5.0
9.0
5.5
21.5
15.0
7.5
5.0
24.0
16.5
n
Output Enable Time
OE to I/O
3.3
5.0
7.0
4.5
18
12.5
6.0
4.0
19.5
13.5
n
Output Enable Time
OE to I/O
3.3
5.0
7.0
5.0
18
12.5
6.0
4.0
20.5
14
n
Output Disable Time
OE to I/O
3.3
5.0
6.5
3.5
18.5
14
5.5
3.0
19.5
15
n
Output Disable Time
OE to I/O
3.3
5.0
5.5
3.5
17
12.5
4.5
2.0
19
13.5
n
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
FACT DATA
5-5
MC74AC299 MC74ACT299
AC OPERATING REQUIREMENTS
74AC
74AC
T
= –40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
Symbol
Parameter
to +85°C
= 50 pF
Unit
C
L
Typ
Guaranteed Minimum
Setup Time, HIGH or LOW
or S to CP
3.3
5.0
8.0
5.0
8.5
5.5
t
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-9
3-9
3-9
3-9
3-6
3-6
3-6
3-9
3-9
s
S
0
1
Hold Time, HIGH or LOW
or S to CP
3.3
5.0
0.5
1.0
0.5
1.0
h
s
S
0
1
Setup Time, HIGH or LOW
I/O to CP
n
3.3
5.0
5.5
3.5
6.0
4.0
Hold Time, HIGH or LOW
I/O to CP
n
3.3
5.0
0
1.0
0
1.0
h
s
Setup Time, HIGH or LOW
3.3
5.0
6.5
4.0
7.0
4.5
DS or DS to CP
0
7
Hold Time, HIGH or LOW
DS or DS to CP
3.3
5.0
0
1.0
0.5
1.0
h
w
w
0
7
3.3
5.0
4.5
3.5
5.0
3.5
CP Pulse Width, LOW
MR Pulse Width, LOW
3.3
5.0
4.5
3.5
5.0
3.5
Recovery TIme
MR to CP
3.3
5.0
1.5
1.5
1.5
1.5
rec
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
FACT DATA
5-6
MC74AC299 MC74ACT299
DC CHARACTERISTICS
Symbol
74ACT
= +25°C
74ACT
T
A
=
V
(V)
CC
Parameter
Unit
Conditions
T
A
–40°C to +85°C
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
– 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V
CC
= 0.1 V
OUT
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
Maximum Low Level
Input Voltage
IL
or V
– 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= –50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL
IH
4.5
5.5
3.86
4.86
3.76
4.76
V
V
V
–24 mA
–24 mA
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
4.5
5.5
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
5.5
±0.1
±0.6
±1.0
±6.0
µA
µA
V = V , GND
CC
I
I
Maximum 3-State
V (OE) = V , V
IL IH
OZT
I
V = V , GND
I
O
CC
V
= V , GND
CC
– 2.1 V
CC
∆I
CCT
Additional Max. I /Input
CC
5.5
5.5
5.5
0.6
1.5
75
mA
mA
mA
V = V
I
I
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OLD
I
–75
V
OHD
CC
OHD
= V
I
Maximum Quiescent
Supply Current
5.5
8.0
80
µA
V
IN
or GND
CC
* All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
FACT DATA
5-7
MC74AC299 MC74ACT299
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74ACT
74ACT
= –40°C
T
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
Symbol
Parameter
to +85°C
Unit
L
C
= 50 pF
L
Min
Typ
Max
Min
Max
Maximum Input
Frequency
f
t
t
t
t
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
120
110
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-3
3-6
3-6
3-6
3-6
3-6
3-6
3-7
3-8
3-7
3-8
max
Propagation Delay
4.0
4.0
4.5
5.0
4.0
4.0
2.5
2.0
2.0
2.5
12.5
13.5
12.5
15
3.0
3.5
4.5
4.5
4.0
3.5
1.5
1.5
2.0
2.0
14
15
PLH
PHL
PLH
PHL
PHL
PHL
PZH
PZL
PHZ
PLZ
CP to Q
0 or
Q
7
Propagation Delay
CP to Q
Q
0 or
Propagation Delay
CP to I/O
7
13.5
16.5
18
n
Propagation Delay
CP to I/O
n
Propagation Delay
MR to Q
15
Q
0 or
Propagation Delay
MR to I/O
7
14.5
12
17.5
13
n
Output Enable Time
OE to I/O
n
Output Enable Time
OE to I/O
12
13.5
13.5
12.5
n
Output Disable Time
OE to I/O
12.5
11.5
n
Output Disable Time
OE to I/O
n
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
FACT DATA
5-8
MC74AC299 MC74ACT299
AC OPERATING REQUIREMENTS
74ACT
74ACT
= –40°C
T
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
Symbol
Parameter
to +85°C
= 50 pF
Unit
L
C
L
Typ
Guaranteed Minimum
Setup Time, HIGH or LOW
or S to CP
t
t
t
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
1.0
4.0
1.0
4.5
1.0
4.0
3.5
1.5
5.5
1.0
4.5
1.0
5.0
1.0
4.5
3.5
1.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-9
3-9
3-9
3-9
3-6
3-6
3-9
3-9
3-9
s
S
0
1
Hold Time, HIGH or LOW
or S to CP
h
s
S
0
1
Setup Time, HIGH or LOW
I/O to CP
n
Hold Time, HIGH or LOW
h
s
I/O to CP
n
Setup Time, HIGH or LOW
DS or DS to CP
0
7
Hold Time, HIGH or LOW
DS or DS to CP
h
w
w
0
7
CP Pulse Width
HIGH or LOW
MR Pulse Width, LOW
Recovery Time
MR to CP
rec
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
Test Conditions
C
C
Input Capacitance
Power Dissipation Capacitance
4.5
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
170
PD
CC
FACT DATA
5-9
MC74AC299 MC74ACT299
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 738–03
ISSUE E
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
20
1
11
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
10
L
C
INCHES
DIM MIN MAX
1.070 25.66 27.17
MILLIMETERS
MIN MAX
A
B
C
D
E
F
1.010
0.240
0.150
0.015
0.050 BSC
0.050
0.260
0.180
0.022
6.10
3.81
0.39
1.27 BSC
1.27
6.60
4.57
0.55
–T–
SEATING
PLANE
K
M
0.070
1.77
N
E
G
0.100 BSC
2.54 BSC
J
0.008
0.110
0.300 BSC
0.015
0.140
0.21
2.80
7.62 BSC
0
0.51
0.38
3.55
G
F
K
L
M
N
J 20 PL
D 20 PL
M
M
0.25 (0.010)
T B
0
15
0.040
15
1.01
0.020
M
M
0.25 (0.010)
T A
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
20
11
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
10X P
–B–
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
M
M
0.010 (0.25)
B
1
10
J
MILLIMETERS
DIM MIN MAX
INCHES
20X D
MIN
MAX
0.510
0.299
0.104
0.019
0.035
A
B
C
D
F
12.65
7.40
2.35
0.35
0.50
12.95 0.499
7.60 0.292
2.65 0.093
0.49 0.014
0.90 0.020
M
S
S
0.010 (0.25) T A
B
F
R X 45
G
J
K
M
P
1.27 BSC
0.050 BSC
0.25
0.10
0
0.32 0.010
0.25 0.004
0.012
0.009
7
C
7
0
10.05
0.25
10.55 0.395
0.75 0.010
0.415
0.029
SEATING
PLANE
–T–
R
M
18X G
K
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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MC74AC299/D
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