MC74LCX257DTG [ONSEMI]
Low-Voltage CMOS Quad 2-Input Multiplexer;
| 型号： | MC74LCX257DTG |
| 厂家： | 
ONSEMI |
| 描述： | Low-Voltage CMOS Quad 2-Input Multiplexer 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74LCX257
Low-Voltage CMOS Quad
2-Input Multiplexer
With 5.0 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
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MARKING
The MC74LCX257 is a high performance, quad 2−input
multiplexer with 3−state outputs operating from a 2.3 to 3.6 V supply.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
DIAGRAMS
16
switching noise performance. A V specification of 5.5 V allows
I
SOIC−16
D SUFFIX
CASE 751B
MC74LCX257 inputs to be safely driven from 5.0 V devices.
Four bits of data from two sources can be selected using the Select
input. The four outputs present the selected data in the true
(non−inverted) form. The outputs may be switched to a high
impedance state by placing a logic HIGH on the Output Enable (OE)
input. Current drive capability is 24 mA at the outputs.
LCX257G
AWLYWW
16
1
1
16
LCX
257
TSSOP−16
DT SUFFIX
CASE 948F
Features
16
ALYWG
• Designed for 2.3 to 3.6 V V Operation
• 5.0 V Tolerant − Interface Capability with 5.0 V TTL Logic
• Supports Live Insertion and Withdrawal
CC
1
G
1
• I
Specification Guarantees High Impedance When V = 0 V
CC
• LVTTL Compatible
OFF
A
WL, L
Y
= Assembly Location
= Wafer Lot
• LVCMOS Compatible
= Year
WW, W = Work Week
G or G
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500 mA
= Pb−Free Package
(Note: Microdot may be in either location)
• ESD Performance:
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
♦ Human Body Model >2000 V
♦ Machine Model >200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
October, 2012 − Rev. 7
MC74LCX257/D
MC74LCX257
I0c I1c
Zc
I0d
I1d
2
V
OE
Zd
CC
4
I0a
Za
Zb
Zc
Zd
16
15
14
13
12
11
10
9
3
I1a
5
7
I0b
6
I1b
14
12
9
I0c
1
2
3
4
5
6
7
8
I1a
I1b
13
I0a
S
Za I0b
Zb GND
I1c
Figure 1. Pinout: 16−Lead Plastic Package
11
I0d
(Top View)
10
I1d
15
OE
1
S
Figure 2. Logic Diagram
PIN NAMES
Pins
Function
Source 0 Data Inputs
Source 1 Data Inputs
Output Enable Input
Select Input
l0n
l1n
OE
S
Zn
Outputs
TRUTH TABLE
Inputs
Outputs
OE
H
L
S
X
H
H
L
l0n
X
l1n
X
Zn
Z
X
L
L
L
X
H
X
H
L
L
L
L
L
H
X
H
H = High Voltage Level
L
X
Z
=
=
=
Low Voltage Level
High or Low Voltage Level and Transitions are Acceptable
High Impedance State
For ICC reasons, DO NOT FLOAT Inputs
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2
MC74LCX257
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Units
V
V
CC
DC Supply Voltage
−0.5 to +7.0
V
I
DC Input Voltage
−0.5 ≤ V ≤ +7.0
V
I
V
O
DC Output Voltage
−0.5 ≤ V ≤ +7.0
Output in 3−State
V
I
−0.5 ≤ V ≤ V + 0.5
Output in HIGH or LOW State (Note 1)
V
O
CC
I
DC Input Diode Current
DC Output Diode Current
−50
V < GND
mA
mA
mA
mA
mA
mA
°C
IK
I
I
−50
+50
50
V < GND
O
OK
V
O
> V
CC
I
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Moisture Sensitivity
O
I
100
100
CC
I
GND
T
−65 to +150
STG
MSL
Level 1
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I absolute maximum rating must be observed.
O
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Type
Max
Units
V
CC
Supply Voltage
Operating
Data Retention Only
V
2.0
1.5
2.5, 3.3
2.5, 3.3
3.6
3.6
V
Input Voltage
0
5.5
V
V
I
V
O
Output Voltage
(HIGH or LOW State)
(3−State)
0
0
V
CC
5.5
I
HIGH Level Output Current
mA
mA
OH
V
CC
V
CC
V
CC
= 3.0 V − 3.6 V
= 2.7 V − 3.0 V
= 2.3 V − 2.7 V
−24
−12
−8
I
LOW Level Output Current
OL
V
CC
V
CC
V
CC
= 3.0 V − 3.6 V
= 2.7 V − 3.0 V
= 2.3 V − 2.7 V
+24
+12
+8
T
Operating Free−Air Temperature
−40
+85
10
°C
A
Dt/DV
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V, V = 3.0 V
0
ns/V
IN
CC
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LCX257DR2G
SOIC−16
(Pb−Free)
2500 Tape & Reel
96 Units / Rail
MC74LCX257DTG
TSSOP−16
(Pb−Free)
MC74LCX257DTR2G
TSSOP−16
(Pb−Free)
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
MC74LCX257
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol
Characteristic
Condition
Min
1.7
2.0
Max
Units
V
IH
HIGH Level Input Voltage (Note 2)
2.3 V ≤ V ≤ 2.7 V
V
CC
2.7 V ≤ V ≤ 3.6 V
CC
V
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
2.3 V ≤ V ≤ 2.7 V
0.7
0.8
V
V
IL
CC
2.7 V ≤ V ≤ 3.6 V
CC
V
OH
2.3 V ≤ V ≤ 3.6 V; I = −100 mA
V
CC
− 0.2
CC
OH
V
= 2.3 V; I = −8 mA
1.8
2.2
2.4
2.2
CC
OH
V
CC
V
CC
V
CC
= 2.7 V; I = −12 mA
OH
= 3.0 V; I = −18 mA
OH
= 3.0 V; I = −24 mA
OH
V
LOW Level Output Voltage
2.3 V ≤ V ≤ 3.6 V; I = 100 mA
0.2
0.6
0.4
0.4
0.55
5
V
OL
CC
OL
V
CC
= 2.3 V; I = 8 mA
OL
V
CC
V
CC
V
CC
= 2.7 V; I = 12 mA
OL
= 3.0 V; I = 16 mA
OL
= 3.0 V; I = 24 mA
OL
I
3−State Output Current
V
CC
= 3.6 V, V = V or V ,
OUT
mA
OZ
IN
IH
IL
V
= 0 to 5.5 V
I
Power Off Leakage Current
Input Leakage Current
V
= 0, V = 5.5 V or V = 5.5 V
OUT
10
5
mA
mA
mA
mA
OFF
CC
IN
I
IN
V
V
= 3.6 V, V = 5.5 V or GND
IN
CC
CC
I
Quiescent Supply Current
= 3.6 V, V = 5.5 V or GND
10
500
CC
IN
DI
Increase in I per Input
2.3 ≤ V ≤ 3.6 V; V = V − 0.6 V
CC IH CC
CC
CC
2. These values of V are used to test DC electrical characteristics only.
I
AC CHARACTERISTICS t = t = 2.5 ns; R = 500 W
R
F
L
Limits
= −40°C to +85°C
T
A
V
CC
= 3.3 V 0.3 V
V
CC
= 2.7 V
V = 2.5 V 0.2 V
CC
C = 50 pF
L
C = 50 pF
L
C = 30 pF
L
Symbol
Parameter
Waveform
Min
Max
Min
Max
Min
Max
Units
t
t
Propagation Delay
In to Zn
1
1.5
1.5
6.0
6.0
1.5
1.5
6.5
6.5
1.5
1.5
7.2
7.2
ns
PLH
PHL
t
t
Propagation Delay
S to Zn
1, 2
3
1.5
1.5
7.0
7.0
1.5
1.5
8.5
8.5
1.5
1.5
9.1
9.1
ns
ns
ns
ns
PLH
PHL
t
Output Enable Time to
High and Low Level
1.5
1.5
7.0
7.0
1.5
1.5
8.5
8.5
1.5
1.5
9.1
9.1
PZH
t
PZL
t
Output Disable Time from
High and Low Level
3
1.5
1.5
5.5
5.5
1.5
1.5
6.0
6.0
1.5
1.5
6.6
6.6
PHZ
t
PLZ
t
t
Output−to−Output Skew
(Note 3)
1.0
1.0
OSHL
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
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4
MC74LCX257
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Symbol
Characteristic
Condition
Min
Typ
Max
Units
V
OLP
Dynamic LOW Peak Voltage
(Note 4)
V
CC
V
CC
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
0.8
0.6
V
L
IH
IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
L
IH
IL
V
OLV
Dynamic LOW Valley Voltage
(Note 4)
V
CC
V
CC
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
−0.8
−0.6
V
L
IH
IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
L
IH
IL
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3 V, V = 0 V or V
Typical
Units
pF
C
V
V
7
8
IN
I/O
PD
CC
I
CC
CC
C
C
Input/Output Capacitance
= 3.3 V, V = 0 V or V
pF
CC
I
Power Dissipation Capacitance
10 MHz, V = 3.3 V, V = 0 V or V
25
pF
CC
I
CC
V
CC
V
CC
Vmi
Vmi
Vmi
Vmi
In, S
S
0 V
V
0 V
t
t
t
t
PHL
PLH
PHL
PLH
V
OH
OH
Vmo
Vmo
Vmo
Vmo
Zn
Zn
V
OL
V
OL
WAVEFORM 1 − NON−INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
WAVEFORM 2 − INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
t
R
t
R
F
W
F
W
V
CC
Vmi
Vmi
OE
0 V
t
t
t
t
PZH
PHZ
V
V
V
CC
OH
− 0.3
Vmo
Vmo
Zn
≈ 0 V
PZL
PLZ
≈ 3.0V
Zn
V
OL
+ 0.3 V
GND
WAVEFORM 3 − OUTPUT ENABLE AND DISABLE TIMES
t
R
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
F W
Vcc
2.7 V
1.5 V
1.5 V
3.3 V 0.3 V
1.5 V
2.5 V 0.2 V
Vcc/2
Symbol
Vmi
Vmo
1.5 V
Vcc/2
V
HZ
V
OL
+ 0.3 V
V
OL
+ 0.3 V
V
OL
+ 0.15 V
V
LZ
V
OH
− 0.3 V
V
OH
− 0.3 V
V
OH
− 0.15 V
Figure 3. AC Waveforms
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5
MC74LCX257
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
0.386
G
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
7
0
_
_
_
_
M
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T
B
A
SOLDERING FOOTPRINT
8X
6.40
16X
1.12
1
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
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6
MC74LCX257
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE B
16X KREF
NOTES:
M
S
S
0.10 (0.004)
T
U
V
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
S
U
0.15 (0.006) T
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
K
K1
16
9
2X L/2
J1
SECTION N−N
B
−U−
L
J
PIN 1
IDENT.
N
8
0.25 (0.010)
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T
U
MILLIMETERS
MAX
INCHES
MIN MAX
A
−V−
DIM MIN
A
B
C
D
N
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
1.20
0.15 0.002 0.006
0.75 0.020 0.030
F
−−− 0.047
DETAIL E
F
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28 0.007 0.011
−W−
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
C
0.10 (0.004)
6.40 BSC
0.252 BSC
H
DETAIL E
SEATING
PLANE
−T−
M
0
8
0
8
_
_
_
_
D
G
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
01.36X6
16X
1.26
DIMENSIONS: MILLIMETERS
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7
MC74LCX257
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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MC74LCX257/D
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