MC74LVX245M [ONSEMI]
LOW-VOLTAGE CMOS; 低电压CMOS
| 型号： | MC74LVX245M |
| 厂家： | 
ONSEMI |
| 描述： | LOW-VOLTAGE CMOS |
| 文件： | 总7页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC74LVX245 is an advanced high speed CMOS octal bus
transceiver.
It is intended for two–way asynchronous communication between data
buses. The direction of data transmission is determined by the level of the
T/R input. The output enable pin (OE) can be used to disable the device,
so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge.
LOW–VOLTAGE CMOS
• High Speed: t
= 4.7ns (Typ) at V
= 3.3V
PD
• Low Power Dissipation: I
CC
= 4µA (Max) at T = 25°C
CC
A
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: V
= 0.8V (Max)
OLP
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
APPLICATION NOTES
1. Do not force a signal on an I/O pin when it is an active output, damage may
occur.
2. All floating (high impedence) input or I/O pins must be fixed by means of
pull up or pull down resistors or bus terminator ICs.
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
3. AparasiticdiodeisformedbetweenthebusandV
terminals. Therefore,
the LVX245 cannot be used to interface 5V to 3V systems directly.
CC
V
OE
19
B0
18
B1
17
B2
16
B3
15
B4
14
B5
13
B6
12
B7
11
CC
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
20
PIN NAMES
Pins
Function
OE
T/R
A0–A7
Output Enable Input
Transmit/Receive Input
Side A 3–State Inputs or 3–State
Outputs
Side B 3–State Inputs or 3–State
Outputs
1
2
3
4
5
6
7
9
8
10
T/R
A0
A1
A2
A3
A4
A5
A6
A7
GND
Figure 1. 20–Lead Pinout (Top View)
B0–B7
6/97
Motorola, Inc. 1997
REV 0
MC74LVX245
OE 19
T/R 1
2
3
4
5
6
7
8
9
A0
A1
A2
A3
A4
A5
A6
A7
18
17
16
15
14
13
12
11
B0
B1
B2
B3
B4
B5
B6
B7
Figure 2. Logic Diagram
INPUTS
OPERATING MODE
Non–Inverting
OE
T/R
L
L
L
H
X
B Data to A Bus
A Data to B Bus
Z
H
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level
and Transitions are Acceptable; For I reasons, Do Not Float Inputs
CC
MOTOROLA
2
MC74LVX245
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage
–0.5 to +7.0
–0.5 to +7.0
CC
DC Input Voltage (T/R, OE)
DC Output Voltage
V
in
–0.5 to V
+0.5
V
I/O
CC
I
I
I
I
Input Diode Current
–20
mA
mA
mA
mA
mW
C
IK
Output Diode Current
DC Output Current, per Pin
±20
±25
OK
out
CC
DC Supply Current, V
Power Dissipation
and GND Pins
±75
CC
P
180
D
T
Storage Temperature
–65 to +150
stg
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
3.6
Unit
V
V
CC
DC Supply Voltage
V
V
DC Input Voltage (T/R, OE)
DC Output Voltage
5.5
V
in
0
V
CC
V
I/O
T
Operating Temperature, All Package Types
Input Rise and Fall Time
–40
0
+85
100
C
A
∆t/∆V
ns/V
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T = – 40 to 85°C
A
V
CC
V
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
V
IH
High–Level Input Voltage
2.0
3.0
3.6
1.5
2.0
2.4
1.5
2.0
2.4
V
V
V
V
Low–Level Input Voltage
2.0
3.0
3.6
0.5
0.8
0.8
0.5
0.8
0.8
V
V
V
IL
High–Level Output Voltage
I
I
I
= –50µA
= –50µA
= –4mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0
1.9
2.9
2.48
OH
OL
OH
OH
OH
(V = V or V
in IH
)
IL
Low–Level Output Voltage
I
I
I
= 50µA
= 50µA
= 4mA
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.44
OL
OL
OL
(V = V or V
in IH
)
IL
I
I
I
Input Leakage Current
V
= 5.5V or GND
3.6
3.6
3.6
±0.1
±0.25
4.0
±1.0
±2.5
40.0
µA
µA
µA
in
in
(T/R, OE)
Maximum Three–State
Leakage Current
V
= V or V
OZ
CC
in
IL
= V
IH
or GND
V
out
CC
or GND
Quiescent Supply Current
V
in
= V
CC
3
MOTOROLA
MC74LVX245
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= 25°C
T = – 40 to 85°C
A
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
t
t
,
Propagation Delay
Input to Output
V
V
V
= 2.7V
C
C
= 15pF
= 50pF
6.1
8.6
10.7
14.2
1.0
1.0
13.5
17.0
ns
PLH
PHL
CC
CC
CC
L
L
= 3.3 ± 0.3V
= 2.7V
C
C
= 15pF
= 50pF
4.7
7.2
6.6
10.1
1.0
1.0
8.0
11.5
L
L
t
t
,
Output Enable Time to
High and Low Level
C
C
= 15pF
= 50pF
9.0
11.5
16.9
20.4
1.0
1.0
20.5
24.0
ns
ns
ns
PZL
PZH
L
L
R
= 1kΩ
L
V
R
= 3.3 ± 0.3V
= 1kΩ
C
C
= 15pF
= 50pF
7.1
9.6
11.0
14.5
1.0
1.0
13.0
16.5
CC
L
L
L
t
t
,
Output Disable Time From
High and Low Level
V
R
= 2.7V
= 1kΩ
C
= 50pF
11.5
18.0
1.0
21.0
PLZ
PHZ
CC
L
L
V
R
= 3.3 ± 0.3V
= 1kΩ
C
= 50pF
9.6
12.8
1.0
14.5
CC
L
L
t
t
Output–to–Output Skew
(Note 1.)
V
CC
V
CC
= 2.7V
= 3.3 ±0.3V
C
C
= 50pF
= 50pF
1.5
1.5
1.5
1.5
OSHL
OSLH
L
L
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t
guaranteed by design.
) or LOW–to–HIGH (t
OSHL
); parameter
OSLH
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
T = – 40 to 85°C
A
Symbol
Parameter
Input Capacitance (T/R, OE)
Unit
pF
Min
Typ
4
Max
Min
Max
C
10
10
in
C
C
Maximum Three–State I/O Capacitance
Power Dissipation Capacitance (Note 2.)
8
pF
I/O
PD
21
pF
2. C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Averageoperatingcurrentcanbeobtainedbytheequation:I
=C
V
f
+I
/8(perbit).C isusedtodeterminetheno–load
CC(OPR)
PD CC in CC
PD
2
dynamic power consumption; P = C
V
f
+ I
in CC
V
CC
.
D
PD
CC
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V
= 3.3V, Measured in SOIC Package)
r
f
L
CC
T
A
= 25°C
Symbol
Characteristic
Unit
V
Typ
Max
V
OLP
Quiet Output Maximum Dynamic V
0.5
0.8
–0.8
2.0
OL
V
OLV
Quiet Output Minimum Dynamic V
–0.5
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
0.8
V
MOTOROLA
4
MC74LVX245
SWITCHING WAVEFORMS
V
CC
T/R
50%
GND
V
CC
V
Input
CC
50% V
OE
50% V
CC
CC
t
50%
A or B
GND
t
GND
PZL
PLZ
HIGH
t
t
PHL
PLH
IMPEDANCE
50% V
Output
B or A
CC
A or B
A or B
50% V
CC
V
+0.3V
OL
t
t
PHZ
PZH
V
–0.3V
OH
50% V
CC
HIGH
IMPEDANCE
Figure 3.
Figure 4.
TEST CIRCUITS
TEST POINT
TEST POINT
1 k
OUTPUT
CONNECT TO V
WHEN
.
PZL
CC
AND t
Ω
OUTPUT
TESTING t
PLZ
CONNECT TO GND WHEN
TESTING t AND t
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
.
PZH
PHZ
C *
C *
L
L
* Includes all probe and jig capacitance
* Includes all probe and jig capacitance
Figure 5. Propagation Delay Test Circuit
Figure 6. Three–State Test Circuit
5
MOTOROLA
MC74LVX245
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
–A–
ANSI Y14.5M, 1982.
20
11
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
10X P
–B–
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
M
M
0.010 (0.25)
B
1
10
MILLIMETERS
INCHES
20X D
0.010 (0.25)
DIM
A
B
C
D
MIN
12.65
7.40
2.35
0.35
0.50
MAX
12.95
7.60
2.65
0.49
0.90
MIN
MAX
0.510
0.299
0.104
0.019
0.035
J
0.499
0.292
0.093
0.014
0.020
M
S
S
T
A
B
F
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
0.25
0.10
0
0.32
0.25
7
0.010
0.004
0
0.012
0.009
7
R X 45
10.05
0.25
10.55
0.75
0.395
0.010
0.415
0.029
C
SEATING
PLANE
–T–
M
18X G
K
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X K REF
0.10 (0.004)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
T
U
V
S
0.15 (0.006)
T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
K
K1
20
11
2X L/2
J J1
B
L
–U–
PIN 1
IDENT
SECTION N–N
1
10
0.25 (0.010)
N
S
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
0.15 (0.006)
T U
M
A
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
6.40
4.30
–––
0.05
0.50
MAX
6.60
4.50
1.20
0.15
0.75
MIN
MAX
0.260
0.177
0.047
0.006
0.030
–V–
0.252
0.169
–––
0.002
0.020
N
F
F
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
DETAIL E
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
–W–
C
6.40 BSC
0.252 BSC
G
D
M
0
8
0
8
H
DETAIL E
0.100 (0.004)
–T– SEATING
PLANE
MOTOROLA
6
MC74LVX245
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
NOTES:
1
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2
3
CONTROLLING DIMENSION: MILLIMETER.
DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
20
11
Q
1
4
5
TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
M
THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
1
10
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
e
A
DIM
A
1
b
c
D
E
e
MIN
–––
MAX
2.05
0.20
0.50
0.27
12.80
5.45
MIN
MAX
0.081
0.008
0.020
0.011
0.504
0.215
c
–––
0.002
0.014
0.007
0.486
0.201
A
0.05
0.35
0.18
12.35
5.10
A
b
1
1.27 BSC
0.050 BSC
M
0.10 (0.004)
0.13 (0.005)
H
7.40
0.50
1.10
0
8.20
0.85
1.50
10
0.291
0.020
0.043
0
0.323
0.033
0.059
10
E
L
L
M
E
Q
Z
0.70
–––
0.90
0.81
0.028
–––
0.035
0.032
1
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
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MC74LVX245/D
◊
相关型号：
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ONSEMI
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LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, LEAD FREE, EIAJ, SO-20
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