MC74VHC1GT02DFT1 [ONSEMI]
2-Input NOR Gate/CMOS Logic Level Shifter; 2输入或非门/ CMOS逻辑电平转换器
| 型号： | MC74VHC1GT02DFT1 |
| 厂家： | 
ONSEMI |
| 描述： | 2-Input NOR Gate/CMOS Logic Level Shifter |
| 文件： | 总8页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
with LSTTL–Compatible Inputs
The MC74VHC1GT02 is a single gate 2–input NOR fabricated with
silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
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The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and
the output has a full 5V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic–level translator from
3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to
3.0V CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT02 input structure provides protection when
voltages up to 7V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT02 to be used to interface 5V circuits to 3V
SC–88A / SOT–353
DF SUFFIX
CASE 419A
MARKING DIAGRAM
d
VJ
circuits. The output structures also provide protection when V
= 0V.
CC
These input and output structures help prevent device destruction
caused by supply voltage – input/output voltage mismatch, battery
backup, hot insertion, etc.
Pin 1
d = Date Code
• High Speed: t
= 4.7ns (Typ) at V
= 5V
PD
• Low Power Dissipation: I
CC
= 2µA (Max) at T = 25°C
CC
A
PIN ASSIGNMENT
• TTL–Compatible Inputs: V = 0.8V; V = 2.0V
1
2
3
4
5
IN B
IN A
GND
IL
IH
• CMOS–CompatibleOutputs: V
> 0.8V ; V < 0.1V @Load
OH
CC OL CC
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
OUT Y
VCC
• ESD Performance: HBM > 2000V
ORDERING INFORMATION
IN B
IN A
GND
VCC
1
2
3
5
4
Seedetailedorderingandshippinginformationinthepackage
dimensions section on page 4 of this data sheet.
OUT Y
FUNCTION TABLE
Figure 1. 5–Lead SOT–353 Pinout (Top View)
Inputs
Output
Y
A
B
LOGIC SYMBOL
L
L
L
H
L
H
L
L
L
IN A
≥ 1
OUT Y
IN B
H
H
H
Semiconductor Components Industries, LLC, 1999
1
Publication Order Number:
December, 1999 – Rev. 2
MC74VHC1GT02/D
MC74VHC1GT02
MAXIMUM RATINGS*
Characteristics
Symbol
Value
Unit
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
CC
–0.5 to +7.0
–0.5 to +7.0
–0.5 to 7.0
V
IN
V
V
= 0
V
OUT
V
CC
High or Low State
–0.5 to V
CC
+ 0.5
Input Diode Current
I
–20
mA
mA
mA
mA
mW
°C
IK
Output Diode Current
DC Output Current, per Pin
(V
OUT
< GND; V
OUT
> V
)
I
+20
+25
CC
OK
I
OUT
DC Supply Current, V
and GND
I
+50
CC
CC
Power dissipation in still air, SC–88A †
Lead temperature, 1 mm from case for 10 s
Storage temperature
P
200
D
T
260
L
T
stg
–65 to +150
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
†Derating — SC–88A Package: –5 mW/ C from 65 to 125 C
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
4.5
0.0
Max
5.5
5.5
5.5
Unit
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
CC
V
IN
V
V
= 0
V
OUT
0.0
0.0
V
CC
High or Low State
V
CC
Operating Temperature Range
Input Rise and Fall Time
T
–55
+85
°C
A
V
CC
CC
= 3.3V ± 0.3V
= 5.0V ± 0.5V
t , t
r
0
0
100
20
ns/V
f
V
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2
MC74VHC1GT02
DC ELECTRICAL CHARACTERISTICS
V
CC
T
A
= 25°C
T
A
≤ 85°C
T ≤ 125°C
A
Symbol
Parameter
Test Conditions
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
V
IH
Minimum High–Level
Input Voltage
3.0
4.5
5.5
1.2
2.0
2.0
1.2
2.0
2.0
1.2
2.0
2.0
V
V
IL
Maximum Low–Level
Input Voltage
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
V
I
= V or V
= –50µA
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
V
V
V
OH
Minimum High–Level
Output Voltage
IN
OH
IH
IL
IL
V
IN
= V or V
IH
IL
V
= V or V
IH
= –4mA
= –8mA
IN
OH
OH
I
I
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
I
= V or V
IH
3.0
4.5
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
OL
Maximum Low–Level
Output Voltage
IN
OL
IL
IL
= 50µA
V
IN
= V or V
IH
IL
V
= V or V
IH
= 4mA
= 8mA
IN
OL
OL
I
I
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
I
I
I
Maximum Input
Leakage Current
V
= 5.5V or GND
0 to
5.5
±0.1
±1.0
±1.0
µA
µA
mA
µA
IN
IN
Maximum Quiescent
Supply Current
V
IN
= V
or GND
CC
5.5
5.5
0.0
2.0
20
40
CC
Quiescent Supply
Current
Per Input: V = 3.4V
OtherInput: V
CC
1.35
0.5
1.50
5.0
1.65
10
CCT
OPD
IN
or GND
Output Leakage
Current
V
OUT
= 5.5V
AC ELECTRICAL CHARACTERISTICS (C
= 50 pF, Input t = t = 3.0ns)
load
r
f
T
A
= 25°C
T
A
≤ 85°C
T ≤ 125°C
A
Symbol
Parameter
Maximum
Propogation Delay,
Input A or B to Y
Test Conditions
Unit
Min
Typ
Max
Min
Max
Min
Max
t
t
,
V
V
= 3.0 ± 0.3V
C
C
= 15 pF
= 50 pF
4.5
5.8
10.0
13.5
11.0
15.0
13.0
17.5
ns
PLH
PHL
CC
L
L
= 5.0 ± 0.5V
C
C
= 15 pF
= 50 pF
3.0
3.8
6.7
7.7
7.5
8.5
8.5
9.5
CC
L
L
C
Maximum Input
Capacitance
5.5
10
10
10
pF
pF
IN
Typical @ 25°C, V
= 5.0V
CC
C
Power Dissipation Capacitance (Note 1.)
11
PD
1. C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Averageoperatingcurrentcanbeobtainedbytheequation:I
power consumption; P = C
=C isusedtodeterminetheno–loaddynamic
V
f
+I .C
CC(OPR)
CC
PD CC in CC PD
2
V
CC
f + I
in CC
V
.
D
PD
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3
MC74VHC1GT02
TEST POINT
OUTPUT
3.0V
GND
A or B
50%
DEVICE
UNDER
TEST
t
t
PHL
PLH
C *
L
V
OH
Y
50% V
CC
V
OL
*Includes all probe and jig capacitance
Figure 2. Switching Waveforms
DEVICE ORDERING INFORMATION
Figure 3. Test Circuit
Device Nomenclature
Temp
Range
Identifier
Tape &
Reel
Suffix
Circuit
Tech–
nology
Input
Type Function
Device
Package
Suffix
Package
Type
Tape and Reel
Size
Device Order Number Indicator
SC–88A/
SOT–353
MC74VHC1GT02DFT1
MC
74
VHC1G
T
02
DF
T1
7–Inch/3000 Unit
PACKAGE DIMENSIONS
SC–88A / SOT–353
DF SUFFIX
5–LEAD PACKAGE
CASE 419A–01
ISSUE B
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MM.
V
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
A
B
C
D
G
H
J
K
N
S
0.071 0.087
0.045 0.053
0.031 0.043
0.004 0.012
0.026 BSC
5
4
3
–B–
S
0.65 BSC
–––
0.004
–––
0.10
0.10
0.20 REF
2.00
0.30
0.10
0.25
0.30
1
2
0.004 0.010
0.004 0.012
0.008 REF
0.079 0.087
0.012 0.016
2.20
0.40
V
M
M
D 5 PL
0.2 (0.008)
B
0.5 mm (min)
N
J
C
K
H
1.9 mm
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4
MC74VHC1GT02
10 PITCHES
CUMULATIVE
TOLERANCE ON
TAPE
P
0
K
t
±0.2 mm
(±0.008”)
P
2
D
TOP
COVER
TAPE
E
A
SEE NOTE 2
+
0
F
W
+
+
K
SEE
B
1
0
B
0
D
1
NOTE 2
P
FOR COMPONENTS
2.0 mm × 1.2 mm
AND LARGER
EMBOSSMENT
USER DIRECTION OF FEED
CENTER LINES
OF CAVITY
FOR MACHINE REFERENCE
ONLY
INCLUDING DRAFT AND RADII
CONCENTRIC AROUND B
0
*TOP COVER
TAPE THICKNESS (t )
1
0.10 mm
(0.004”) MAX.
R MIN.
TAPE AND COMPONENTS
SHALL PASS AROUND RADIUS “R”
WITHOUT DAMAGE
EMBOSSED
CARRIER
BENDING RADIUS
EMBOSSMENT
100 mm
(3.937”)
MAXIMUM COMPONENT ROTATION
10°
1 mm MAX
TYPICAL
COMPONENT CAVITY
CENTER LINE
TAPE
1 mm
(0.039”) MAX
250 mm
(9.843”)
TYPICAL
COMPONENT
CENTER LINE
CAMBER (TOP VIEW)
ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm
Figure 4. Carrier Tape Specifications
EMBOSSED CARRIER DIMENSIONS (See Notes 1 and 2)
Tape
Size
B
1
Max
D
D
E
F
K
P
P
0
P
2
R
T
W
1
8 mm 4.35 mm 1.5 +0.1/
1.0 mm
Min
(0.039”)
1.75
3.5
2.4 mm
(0.094”)
4.0
4.0
2.0
25 mm
(0.98”)
0.3
8.0
(0.171”)
–0.0 mm
(0.059
±0.1 mm ±0.5 mm
±0.10 mm
(0.157
±0.1 mm
(0.156
±0.1 mm
(0.079
±0.05 mm
(0.01
±0.3 mm
(0.315
(0.069
±0.004”)
(1.38
±0.002”)
+0.004/
–0.0”)
±0.004”)
±0.004”)
±0.002”)
+0.0038/
–0.0002”)
±0.012”)
1. Metric Dimensions Govern–English are in parentheses for reference only.
2. A , B , and K are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0
0
0
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
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5
MC74VHC1GT02
t MAX
13.0 mm ±0.2 mm
(0.512” ±0.008”)
1.5 mm MIN
(0.06”)
20.2 mm MIN
(0.795”)
50 mm MIN
(1.969”)
A
FULL RADIUS
G
Figure 5. Reel Dimensions
REEL DIMENSIONS
Tape
Size
A Max
G
t Max
8 mm
330 mm
(13”)
8.400 mm, +1.5 mm, –0.0
(0.33”, +0.059”, –0.00)
14.4 mm
(0.56”)
DIRECTION OF FEED
BARCODE LABEL
POCKET
HOLE
Figure 6. Reel Winding Direction
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6
MC74VHC1GT02
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
TAPE LEADER
NO COMPONENTS
400 mm MIN
COMPONENTS
CAVITY TOP TAPE
TAPE
DIRECTION OF FEED
Figure 7. Tape Ends for Finished Goods
SC–88A/SOT–353 (5 Pin)
“T1” PIN ONE TOWARDS
SPROCKET HOLE
DEVICE
User Direction of Feed
Figure 8. Reel Configuration
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7
MC74VHC1GT02
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MC74VHC1GT02/D
相关型号：
MC74VHC1GT02DFT1G
IC AHC/VHC SERIES, 2-INPUT NOR GATE, PDSO5, SC-88A, SC-70, SOT-353, 5 PIN, Gate
ONSEMI
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