NB7NPQ702M [ONSEMI]
3.3V USB 3.1 Dual Channel Re-driver;
| 型号： | NB7NPQ702M |
| 厂家： | 
ONSEMI |
| 描述： | 3.3V USB 3.1 Dual Channel Re-driver |
| 文件： | 总10页 (文件大小：353K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NB7NPQ702M
3.3 V USB 3.1 Dual Channel
Re-driver
Description
The NB7NPQ702M is a 3.3 V dual channel re−driver for USB 3.1
Gen 1 and USB 3.1 Gen 2 applications that supports both 5 Gbps and
10 Gbps data rates. Signal integrity degrades from PCB traces,
transmission cables, and inter−symbol interference (ISI). The
NB7NPQ702M compensates for these losses by engaging varying
levels of equalization at the input receiver. The output transmitter
circuitry provides user selectable de−emphasis settings to create the
best eye openings for the outgoing data signals.
The NB7NPQ702M features an intelligent LFPS circuit. This
senses the low frequency signals and automatically disables driver
de−emphasis to meet full USB 3.1 Gen 1 and USB 3.1 Gen 2
compliances.
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MARKING
DIAGRAM
NB7N
702M
ALYWG
G
1
UQFN16
CASE 523AF
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
After power up, the NB7NPQ702M periodically checks both of the
TX output pairs for a receiver connection. When the receiver is
detected the RX termination becomes enabled and the NB7NPQ702M
is set to perform the re−driver function.
(Note: Microdot may be in either location)
The NB7NPQ702M comes in a small 3 x 3 mm UQFN16 package
and is specified to operate across the entire industrial temperature
range, –40°C to 85°C.
ORDERING INFORMATION
†
Device
Package
Shipping
Features
NB7NPQ702MMUTXG UQFN16
(Pb−Free)
3000 /
Tape & Reel
• 3.3 V 5% Power Supply
• Device Supports USB 3.1 Gen 1 and USB 3.1 Gen 2 Data Rates
• Automatic LFPS De−Emphasis Control
• Automatic Receiver Termination Detection
• Integrated Input and Output Termination
• Selectable Equalization and De−Emphasis
• Hot−Plug Capable
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
• ESD Protection 4 kV HBM
• Operating Temperature Range: –40°C to 85°C
• Small 3 x 3 x 0.5 mm UQFN16 Package
• This is a Pb−Free Device
Typical Applications
• USB3.1 Type−C Signal Routing
• Mobile Phone and Tablet
• Computer and Laptop
• Docking Station and Dongle
• Active Cable, Back Planes
• Gaming Console, Smart T.V.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
January, 2017 − Rev. 0
NB7NPQ702M/D
NB7NPQ702M
NB7NPQ702M
Figure 1. Logic Diagram of NB7NPQ702M
Figure 2. UQFN16 Package Pinout
(Top View)
Table 1. PIN DESCRIPTION
Pin
Number
Pin Name
A_RX-
A_RX+
B_TX−
B_TX+
VCC
Type
Description
1
2
3
4
5
DIFF IN
Channel A Differential input pair for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
DIFF OUT
Power
Channel B Differential output for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
3.3−V power supply. VCC pins must be externally connected to power supply to guarantee
proper operation.
6
7
8
DE_B
EQ_B
GND
LVCMOS IN Sets the output de−emphasis gain on Channel B. 3−state input with integrated 250 kW pull−up
and pull−down resistors.
LVCMOS IN Sets the receiver equalizer gain on Channel B. 3−state input with integrated 250 kW pull−up
and pull−down resistors.
GND
Reference Ground. GND pins must be externally connected to power supply to guarantee
proper operation.
9
B_RX+
B_RX−
A_TX+
A_TX-
VCC
DIFF IN
Channel B Differential input pair for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
10
11
12
13
DIFF OUT
Power
Channel A Differential output for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
3.3−V power supply. VCC pins must be externally connected to power supply to guarantee
proper operation.
14
15
16
EP
DE_A
EQ_A
GND
GND
LVCMOS IN Sets the output de−emphasis gain on Channel A. 3−state input with integrated 250 kW pull−up
and pull−down resistors.
LVCMOS IN Sets the receiver equalizer gain on Channel A. 3−state input with integrated 250 kW pull−up
and pull−down resistors.
GND
GND
Reference Ground. GND pins must be externally connected to power supply to guarantee
proper operation.
Exposed pad (EP). EP on the package bottom is thermally connected to the die for improved
heat transfer out of the package. The pad is not electrically connected to the die, but is recom-
mended to be soldered to GND on the PC Board.
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2
NB7NPQ702M
DEVICE CONFIGURATION
Table 2. CONTROL PIN EFFECTS (Typical Values)
Pin
Description
Logic State
Low
Equalization Gain
EQ
Equalization Amount
3 dB
Mid
6 dB
High
9 dB
Pin
Description
Logic State
Low
De−emphasis Ratio (Note 1)
DE
De−Emphasis Amount
0 dB
Mid
−3.5 dB
−5.5 dB
High
1. dB Decrease = 20 log * (VTX−DE / VTX−DIFF−PP)
Table 3. ATTRIBUTES
Parameter
ESD Protection
Human Body Model
Charged Device Model
> 4 kV
> 1.5 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 2)
Flammability Rating
Level 1
UL 94 V−O @ 0.125 in
1828
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
2. For additional information, see Application Note AND8003/D.
Table 4. ABSOLUTE MAXIMUM RATINGS
Over operating free−air temperature range (unless otherwise noted)
Parameter
Description
Min
−0.5
−0.5
−0.5
−65
Max
4.6
Unit
V
Supply Voltage (Note 3)
V
CC
Voltage range at any input or
output terminal
Differential I/O
LVCMOS inputs
1.89
V
V
+ 0.5
V
CC
Storage Temperature Range, T
150
125
85
°C
°C
°C
°C/W
SG
Maximum Junction Temperature, T
J
Operating Ambient Temperature Range, T
−40
A
Junction−to−Ambient Thermal Resistance @ 500 lfm,
(Note 4)
34
q
JA
Wave Solder, Pb−Free, T
265
°C
SOL
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
3. All voltage values are with respect to the GND terminals.
4. JEDEC standard multilayer board − 2S2P (2 signal, 2 power).
Table 5. RECOMMENDED OPERATING CONDITIONS
Over operating free−air temperature range (unless otherwise noted)
Parameter
Description
Min
3.135
−40
Nom
Max
3.465
+85
Unit
V
V
CC
Main power supply
3.3
T
A
Operating free−air temperature
AC coupling capacitor
°C
nF
C
75
100
265
AC
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
NB7NPQ702M
Table 6. POWER SUPPLY CHARACTERISTICS
Parameter
Typ
(Note 5)
Test Conditions
Min
Max
Unit
Active
Link in U0 with Super Speed Plus data transmission
150
mA
DE = low 0 dB, EQ = low 3 dB
Idle State
Link has some activity, not in U0
DE = mid −3.5 dB, EQ = mid 6dB
105
mA
mA
mA
I
CC
U2/U3
Link in U2 or U3 power saving state
DE = mid −3.5 dB, EQ = mid 6 dB
12.9
12.7
No USB Connection
No connection state, termination disabled
DE = mid −3.5 dB, EQ = mid 6 dB
5. TYP values use V = 3.3 V, T = 25°C.
CC
A
Table 7. LVCMOS CONTROL PIN CHARACTERISTICS
Parameter
Test Conditions
Min
Typ
Max
Unit
3−State LVCMOS Inputs (EQ, DE)
V
High−level input voltage
Mid−level input voltage
Low−level input voltage
Floating voltage
0.8 * V
0.4 * V
V
V
V
IH
CC
CC
V
V
IM
V
V
/ 2 0.6 *
0.2 *
CC
CC
CC
CC
V
V
GND
V
IL
V
V
= High impedance
= 3.465 V
/ 2
V
F
IN
CC
R
R
Internal pull−up resistance
Internal pull−down resistance
High−level input current
Low−level input current
250
250
kW
kW
mA
mA
PU
PD
IH
I
V
V
20
IN
I
IL
= GND, V = 3.465 V
−20
IN
CC
Table 8. RECEIVER AC/DC CHARACTERISTICS Over operating free−air temperature range (unless otherwise noted)
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Input differential voltage swing
AC−coupled, peak−to−peak
250
1200
mV
PP
RX−DIFF−pp
V
Common−mode voltage bias in the
receiver (DC)
V
0.25
−
V
RX−CM
CC
Z
Differential input impedance (DC)
Present after an USB device is
detected on TX+/TX−
80
20
25
100
120
30
W
RX−DIFF
Z
Common−mode input
impedance (DC)
Present after an USB device is
detected on TX+/TX−
25
W
RX−CM
Z
Common−mode input impedance
with termination disabled (DC)
Present when no USB device is
detected on TX+
190
kW
RX−HIGH−IMP
V
Low Frequency Periodic Signaling
(LFPS) Detect Threshold
Output voltage is considered
squelched below this threshold
voltage.
300
mV
PP
TH−LFPS−pp
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4
NB7NPQ702M
Table 9. TRANSMITTER AC/DC CHARACTERISTICS Over operating free−air temperature range (unless otherwise noted)
Parameter
Test Conditions
Min
Typ
Max
Unit
mV
V
Output differential voltage swing
50 W to V , DE = Low 0 dB,
1000
TX−DIFF−PP
CC
PP
EQ = Low 3 dB
C
TX input capacitance to GND
At 2.5 GHz
1.25
100
pF
TX
Z
Differential output impedance (DC)
Present after an USB device is
detected on TX+/TX−
80
20
120
30
W
TX−DIFF
Z
Common−mode output impedance
(DC)
Present after an USB device is
detected on TX+/TX−
W
TX−CM
I
TX short circuit current
TX+ or TX− shorted to GND
60
mA
V
TX−SC
V
Common−mode voltage bias in the
transmitter (DC)
V
−0.6
V
CC
TX−CM
CC
V
AC common−mode peak−to−peak volt- Within U0 and within LFPS
age swing in active mode
100
10
mV
TX−CM−ACpp
PP
V
Differential voltage swing during
electrical idle
Tested with a high−pass filter
0
mV
TX−IDLE−DIFF−ACpp
PP
V
Voltage change to allow receiver
detect
Positive voltage to sense receiver
termination
600
mV
TX−RXDET
t , t
Output rise, fall time
20% − 80% of differential
voltage measured 1 inch from
the output pin
45
ps
ps
ps
ns
R
F
t
Output rise, Fall time mismatch
Differential propagation delay
Idle entry and exit times
20% − 80% of differential
voltage measured 1 inch from
the output pin
5
RF−MM
t
, t
De−emphasis = −3.5 dB,
propagation delay between
50% level at input and output
150
30
diff−LH diff−HL
t
,
idleEntry
t
idleExit
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5
NB7NPQ702M
Table 10. TIMING AND JITTER CHARACTERISTICS
Parameter
Test Conditions
Min
Typ
Max
Unit
TIMING
t
Time from power applied until RX
termination is enabled
Apply 0 V to V , connect USB ter-
mination to TX , apply 3.3 V to
10
ms
READY
CC
V
CC
, and measure when Z
RX−DIFF
is enabled
JITTER FOR 5 Gbps
UI
(Note 8)
Total jitter (Notes 6, 7)
Deterministic jitter (Note 7)
Random jitter (Note 7)
0.038
0.018
0.003
T
JTX−EYE
UI
(Note 8)
D
R
EQ = Low 3 dB, DE = Low 0 dB
JTX
JTX
UI
(Note 8)
JITTER FOR 10 Gbps
Total jitter (Notes 6, 7)
UI
(Note 8)
0.084
0.047
0.006
T
JTX−EYE
UI
(Note 8)
Deterministic jitter (Note 7)
Random jitter (Note 7)
D
R
EQ = Low 3 dB, DE = Low 0 dB
JTX
JTX
UI
(Note 8)
−12
6. Includes RJ at 10
.
7. Measured at the ends of reference channel with a K28.5 pattern, VID = 1000 mVpp, −3.5 dB de−emphasis from source.
8. 5 Gbps, UI = 200 ps for 10 Gbps, UI = 100 ps
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6
NB7NPQ702M
Pattern Gen.
Oscilloscope
50 W
RX
TX
DUT
X” FR−4
Soldered
Figure 3. Equalization Measurement Setup
Figure 4. 5 Gbps Signal with 24 inches of FR4 Before Input to NB7NPQ702M and After Using High EQ Setting
Figure 5. 10 Gbps Signal with 12 inches of FR4 Before Input to NB7NPQ702M and After with EQ Floating (Mid)
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7
NB7NPQ702M
Oscilloscope
Pattern Gen.
50W
RX
TX
DUT
X” FR−4
Soldered
Figure 6. De−Emphasis Measurement Setup
Figure 7. 5 Gbps Signal After 24 inches of FR4 at Output with High DE Setting to NB7NPQ702M
Figure 8. 10 Gbps Signal After 9 inches of FR4 at Output with Mid DE Setting to NB7NPQ702M
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8
NB7NPQ702M
PARAMETER MEASUREMENT DIAGRAMS
Rx−
Rx+
Tx−
Tx+
Figure 9. Transmitter Differential Voltage
dB Decrease = 20 log * (VTX−DE / VTX−DIFF−PP)
Figure 10. Propagation Delay
V
OH
V
OL
Figure 11. Output Rise and Fall Times
APPLICATION GUIDELINES
LFPS Compliance Testing
between host and peripheral devices. LFPS signaling
consists of bursts of frequencies ranging between 10 to
50 MHz and can have specific burst lengths or repeat rates.
As part of USB 3.1 compliance test, the host or peripheral
must transmit a LFPS signal that adheres to the spec
parameters. When using a real−time oscilloscope to capture
this data, the scope’s trigger must be below 0 V when making
single−ended measurements. Although the differential
signal is identical to that which is expected by the USB 3.1
system, the AC common mode voltage for LFPS may fall
below 0 V during short bursts of switching signal, which is
still within the spec’s limit.
Ping.LFPS for TX Compliance
During the transmitter compliance, the system under test
must transmit certain compliance patterns as defined by the
USB−IF. In order to toggle through these patterns for various
tests, the receiver must receive a ping. LFPS signal from
either the test suite or a separate pattern generator. The
standard signal comprises of a single burst period of 100ns
at 20 MHz. In order to pass this signal through
NB7NPQ702M, the duration of the burst must be extended
to at least 200 ns.
LFPS Functionality
USB 3.1 links use Low Frequency Periodic Signaling
(LFPS) to implement functions like exiting low−power
modes, performing warm resets and providing link training
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9
NB7NPQ702M
PACKAGE DIMENSIONS
UQFN16 3x3, 0.5P
CASE 523AF
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
B
A
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
PIN ONE
REFERENCE
DETAIL A
OPTIONAL CONSTRUCTION
2X SCALE
MILLIMETERS
E
DIM MIN
MAX
0.55
0.05
A
A1
A3
b
0.45
0.00
0.127 REF
0.20 0.30
3.00 BSC
2X
0.10
C
DETAIL B
OPTIONAL CONSTRUCTION
4X SCALE
2X
D
D2
E
1.60
3.00 BSC
1.80
0.10
C
TOP VIEW
E2
e
1.60
0.50 BSC
1.80
A
DETAIL B
K
L
0.20
0.30
−−−
0.50
0.05
0.05
C
C
A3
C
17X
SOLDERING FOOTPRINT*
A1
NOTE 4
SEATING
PLANE
0.50
PITCH
SIDE VIEW
D2
DETAIL A
16X
0.60
5
K
2X
1.55
2X
3.30
e/2
e
9
E2
1
1
16X
0.29
13
16X L
DIMENSIONS: MILLIMETERS
16X
b
0.10
0.05
C
A
B
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
C
NOTE 3
BOTTOM VIEW
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◊
NB7NPQ702M/D
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