NCL30488B1DR2G [ONSEMI]
Single Stage CC/CV PSR Controller;
| 型号： | NCL30488B1DR2G |
| 厂家： | 
ONSEMI |
| 描述： | Single Stage CC/CV PSR Controller |
| 文件： | 总28页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Power Factor Corrected
LED Driver with Primary
Side CC/CV
SOIC−7
CASE 751U
Product Preview
MARKING DIAGRAM
NCL30488B
8
The NCL30488B is a power factor corrected flyback controller
targeting isolated constant current LED drivers. The controller
operates in a quasi−resonant mode to provide high efficiency. Thanks
to a novel control method, the device is able to tightly regulate a
constant LED current from the primary side. This removes the need
for secondary side feedback circuitry, its biasing and for an
optocoupler.
The device is highly integrated with a minimum number of external
components. A robust suite of safety protection is built in to simplify
the design.
L30488XX
ALYWX
G
1
L30488
XX
A
= Specific Device Code
= Version
= Assembly Location
= Wafer Lot
= Assembly Start Week
= Pb−Free Package
L
YW
G
Features
• High Voltage Startup
• Quasi−resonant Peak Current−mode Control Operation
• Primary Side Feedback
PIN CONNECTIONS
• CC / CV Accurate Control V up to 320 V rms
in
COMP
ZCD
CS
HV
1
2
3
4
8
• Tight LED Constant Current Regulation of 2% Typical
• Digital Power Factor Correction
• Cycle by Cycle Peak Current Limit
VCC
DRV
6
5
• Wide Operating V Range
CC
• −40 to + 125°C
• Standby Mode
GND
• Robust Protection Features
♦ Brown−Out
♦ OVP on V
CC
♦ Constant Voltage / LED Open Circuit Protection
♦ Winding Short Circuit Protection
♦ Secondary Diode Short Protection
♦ Output Short Circuit Protection
♦ Thermal Shutdown
ORDERING INFORMATION
See detailed ordering and shipping information on page 26 of
this data sheet.
♦ Line over Voltage Protection
• This is a Pb−Free Device
Typical Applications
• Integral LED Bulbs
• LED Power Driver Supplies
• LED Light Engines
This document contains information on a product under development. onsemi reserves
the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2021
1
Publication Order Number:
December, 2021 − Rev. P1
NCL30488B/D
NCL30488B
.
.
.
NCL30488
1
2
3
4
7
6
5
Figure 1. Typical Application Schematic for NCL30488B
PIN FUNCTION DESCRIPTION NCL30488B
Pin N5
1
Pin Name
Function
Pin Description
COMP
OTA output for CV loop
This pin receives a compensation network (capacitors and resistors) to stabilize the
CV loop
2
ZCD
Zero crossing Detection
This pin connects to the auxiliary winding and is used to detect the core reset event.
This pin also senses the auxiliary winding voltage for accurate output voltage control.
V
sensing
aux
3
4
5
6
7
8
CS
GND
DRV
VCC
NC
Current sense
−
This pin monitors the primary peak current.
The controller ground
Driver output
The driver’s output to an external MOSFET
This pin is connected to an external auxiliary voltage.
Supplies the controller
creepage
HV
High Voltage sensing
This pin connects after the diode bridge to provide the startup current and internal
high voltage sensing function.
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2
NCL30488B
INTERNAL CIRCUIT ARCHITECTURE
STOP
VCC
L_OVP
Aux_SCP
UVLO
Fault
Management
COMP
ZCD
CS
VCC Management
OFF
Fast_OVP
Standby
VCV
Thermal
Shutdown
VCC
OVP
HV
Startup
VCC_OVP
Constant Voltage
Control
CS_short
Slow_OVP
Fast_OVP
Slow_OVP
VREFX VVS
HV
BO_NOK
L_OVP
VHVdiv
Brown−out
Line OVP
Zero crossing detection Logic
Z(CD blanking, Time−Out, ...)
Valley Selection
Frequency foldback
Aux . Winding Short Circuit Prot.
Aux_SCP
Q_drv
Line
feed−forward
Q_drv
VHVdiv
S
R
Q
Q
VHVdiv
Standby
DRV
Driver
and
Clamp
VREFX
CS_reset
Leading
Edge
Blanking
Power factor and
Constant−current control
STOP
Ipk_max
Maximum
on−time
Max. Peak
Current Limit
STOP
Winding /
Output diode
SCP
WOD_SCP
CS Short
Protection
CS_short
GND
Figure 2. Internal Circuit Architecture NCL30488B
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3
NCL30488B
MAXIMUM RATINGS TABLE
Symbol
Rating
Value
Unit
V
Maximum Power Supply Voltage, VCC Pin, Continuous Voltage
Maximum Current for VCC Pin
−0.3 to 30
Internally limited
V
mA
CC(MAX)
CC(MAX)
I
V
Maximum Driver Pin Voltage, DRV Pin, Continuous Voltage
Maximum Current for DRV Pin
−0.3, V
(Note 1)
V
mA
DRV(MAX)
DRV(MAX)
DRV
I
−300, +500
V
Maximum Voltage on HV Pin
Maximum Current for HV Pin (dc Current Self−limited if Operated within the Allowed Range)
−0.3, +700
V
mA
HV(MAX)
HV(MAX)
I
20
V
Maximum Voltage on Low Power Pins (Except Pins DRV and VCC)
Current Range for Low Power Pins (Except Pins DRV and VCC)
−0.3, 5.5 (Note 2)
−2, +5
V
mA
MAX
MAX
I
R
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
200
°C/W
°C
q
J−A
T
150
J(MAX)
Operating Temperature Range
−40 to +125
°C
Storage Temperature Range
−60 to +150
°C
ESD Capability, HBM Model Except HV Pin (Note 3)
ESD Capability, HBM Model HV Pin
ESD Capability, CDM Model (Note 3)
4
1.5
1
kV
kV
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. V
is the DRV clamp voltage V
when V is higher than V
. V
is V otherwise.
DRV
DRV(high)
CC
DRV(high) DRV CC
2. This level is low enough to guarantee not to exceed the internal ESD diode and 5.5 V ZENER diode. More positive and negative voltages
can be applied if the pin current stays within the −2 mA / 5 mA range.
3. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per Mil−Std−883, Method 3015.
Charged Device Model 1000 V per JEDEC Standard JESD22−C101D.
4. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V, V
= 0 V, V = 0 V. For
CS
J
CC
ZCD
min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
HIGH VOLTAGE SECTION
High Voltage Current Source
High Voltage Current Source
V
V
= V
– 200 mV
I
3.4
−
4.6
300
0.8
15
6.2
−
mA
mA
CC
CC(on)
HV(start2)
I
HV(start1)
= 0 V
CC
V
CC
Level for I
to I
Transition
V
CC(TH)
−
−
V
HV(start1)
HV(start2)
Minimum Startup Voltage
HV Source Leakage Current
V
V
= 0 V
V
−
−
V
CC
HV(MIN)
HV(leak)
= 450 V
I
−
4.5
−
10
−
mA
HV
Maximum Input Voltage (rms) for Correct Operation of
the PFC Loop
V
320
V rms
HV(OL)
SUPPLY SECTION
Supply Voltage
V
Startup Threshold
V
CC
V
CC
V
CC
increasing
decreasing
decreasing
V
V
16
9.3
7.6
4
18
10.2
−
20
10.7
−
CC(on)
CC(off)
Minimum Operating Voltage
Hysteresis V
– V
V
CC(on)
CC(off)
CC(HYS)
CC(reset)
Internal Logic Reset
V
5
6
Over Voltage Protection
VCC OVP Threshold
V
25
26.5
28
V
CC(OVP)
V
V
Noise Filter (Note 5)
CC(reset) N
t
−
−
5
20
−
−
ms
CC(off)
VCC(off)
oise Filter (Note 5)
t
VCC(reset)
Supply Current
mA
Device Disabled/Fault
V
> V
I
I
I
I
1.1
–
1.4
3.3
3.6
1.7
1.7
3.9
4.3
2
CC
sw
CC(off)
CC1
CC2
CC3
CC4
Device Enabled/No Output Load on Pin 5
F
= 65 kHz
Device Switching (F = 65 kHz)
C
= 470 pF, F = 65 kHz
−
sw
sw
DRV
sw
Device switching (F = 700 Hz)
V
COMP
≤ 0.9 V
−
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4
NCL30488B
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V, V
= 0 V, V = 0 V. For
CS
J
CC
ZCD
min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V) (continued)
J
J
CC
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
CURRENT SENSE
Maximum Internal Current Limit
V
1.28
240
−
1.40
300
50
1.50
360
150
V
ILIM
LEB
ILIM
Leading Edge Blanking Duration for V
t
ns
ns
ILIM
Propagation Delay from Current Detection to Gate
Off−state
t
Maximum On−time OPN1
Maximum On−time OPN2
t
t
10.5
16
14.0
20
17.5
24
ms
ms
ms
ms
V
on(MAX)1
on(MAX)2
Maximum On−time V
Maximum On−time V
< 0.15 V (OPN1)
< 0.15 V (OPN2)
t
5.3
8
7.0
10
8.7
12
REFX
REFX
on(MAX)12
on(MAX)22
t
Threshold for Immediate Fault Protection Activation
(140% of V
V
1.9
2.0
2.1
CS(stop)
)
ILIM
Leading Edge Blanking Duration for V
t
−
170
500
60
−
ns
mA
CS(stop)
BCS
Current Source for CS to GND Short Detection
I
400
20
600
90
CS(short)
Current Sense Threshold for CS to GND Short Detection
V
CS
rising
V
mV
mV
CS(low)
Maximum Peak Current in Standby Mode
V
CS(SBY)
Option 1
Option 2
Option 3
342
297
252
380
330
280
418
363
308
GATE DRIVE
Drive Resistance
DRV Sink
DRV Source
W
R
SNK
R
SRC
−
−
13
30
−
−
Drive Current Capability
DRV Sink (Note GBD)
DRV Source (Note GBD)
mA
I
−
−
500
300
−
−
SNK
SRC
I
Rise Time (10% to 90%)
Fall Time (90 % to 10%)
DRV Low Voltage
C
C
= 470 pF
= 470 pF
t
–
–
8
30
20
–
−
−
−
ns
ns
V
DRV
DRV
CC
r
t
f
V
= V
+0.2 V
V
CC(off)
DRV(low)
C
DRV
= 470 pF, R
= 33 kW
= 33 kW
DRV
DRV High Voltage
V
= V
V
10
12
14
V
CC
DRV
CC(MAX)
DRV(high)
C
= 470 pF, R
DRV
ZERO VOLTAGE DETECTION CIRCUIT
Upper ZCD Threshold Voltage
V
V
V
rising
falling
falling
V
−
35
−
90
55
0.7
−
150
−
mV
mV
V
ZCD
ZCD
ZCD
ZCD(rising)
V
ZCD(falling)
Lower ZCD Threshold Voltage
Threshold to Force V
ZCD Hysteresis
Maximum During Startup
V
−
REFX
ZCD(start)
ZCD(HYS)
ZCD(DEM)
V
15
−
−
mV
ns
ns
ms
ms
ms
ms
ms
ms
Propagation Delay from Valley Detection to DRV High
Equivalent Time Constant for ZCD Input (GBD)
Blanking Delay After On−time (Option 1)
Blanking Delay After On−time (Option 2)
Blanking Delay at Light Load (Option 1)
Blanking Delay at Light Load (Option 2)
Timeout after Last DEMAG Transition
V
ZCD
decreasing
t
−
150
−
t
−
20
1.5
1.0
0.8
0.6
6.5
50
PAR
V
REFX
V
REFX
V
REFX
V
REFX
> 0.35 V
> 0.35 V
< 0.25 V
< 0.25 V
t
t
t
t
1.1
0.75
0.6
0.45
5
1.9
1.25
1.0
0.75
8
ZCD(blank1)
ZCD(blank1)
ZCD(blank2)
ZCD(blank2)
t
TIMO
Time−out after Last DEMAG Transition V
(Note 5)
< V
t
TIMOstart
−
−
ZCD
ZCD(start)
Pulling−down Resistor
V
ZCD
= V
R
ZCD(pd)
−
200
−
kW
ZCD(falling)
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5
NCL30488B
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V, V
= 0 V, V = 0 V. For
CS
J
CC
ZCD
min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V) (continued)
J
J
CC
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
CONSTANT CURRENT CONTROL
Reference Voltage
T = 25°C − 85°C
V
V
327.9 334.2 341.2
324.1 334.2 346.0
mV
mV
mV
j
REF/3
Reference Voltage
T = −40°C to 125°C
j
REF/3
Current Sense Lower Threshold for Detection of the
Leakage Inductance Reset Time
V
CS
falling
V
20
50
100
CS(low)
Blanking Time for Leakage Inductance Reset Detection
t
−
120
−
ns
CS(low)
POWER FACTOR CORRECTION
Clamping Value for V
T = 0°C to 125°C
V
REF(PFC)CLP
2.06
−
2.2
240
230
2.34
−
V
REF(PFC)
J
Line Range Detector for PFC Loop
Line Range Detector for PFC Loop
CONSTANT VOLTAGE SECTION
V
HV
HV
increases
decreases
V
V dc
V dc
HL(PFC)
V
V
−
−
LL(PFC)
Internal Voltage Reference for Constant Voltage
Regulation
V
3.41
3.52
3.63
V
REF(CV)
CV Error Amplifier Gain
G
40
−
50
60
60
−
mS
mA
V
EA
Error Amplifier Current Capability
V
= V
(no dimming)
I
EA
REFX
REF
COMP Pin Lower Clamp Voltage
V
−
0.6
−
CV(clampL)
CV(clampH)
CV(clampH)
COMP Pin Higher Clamp Voltage
T = 0°C to 125°C
J
V
4.05
4.01
4.12
4.12
4.25
4.25
V
COMP Pin Higher Clamp Voltage
T = −40°C to 125°C
J
V
V
Internal ZCD Voltage below which the CV OTA is Boosted
Threshold for Releasing the Boost
Error Amplifier Current Capability During Boost Phase
V
* 85%
* 90%
V
2.796 2.975 3.154
V
REF(CV)
REF(CV)
boost(CV)
V
V
2.96
3.15
140
3.34
V
boost(CV)RST
I
−
−
mA
V
EAboost
st
ZCD OVP 1 Level (Slow OVP) Option 1
V
V
* 115%
* 105%
V
OVP1
3.783 4.025 4.267
REF(CV)
ZCD Voltage at which Slow OVP is Exit (Option 1)
Switching Period During Slow OVP
ZCD Fast OVP Option 1
V
−
−
3.675
1.5
−
−
V
REF(CV)
OVP1rst
T
ms
V
sw(OVP1)
V
ref(CV)
* 125% + 150 mV
V
4.253 4.525 4.797
OVP2
OVP2_CNT
Number of Switching Cycles before Fast OVP
Confirmation
T
−
4
−
Duration for Disabling DRV Pulses During ZCD Fast OVP
T
−
−
4
−
−
s
recovery
COMP Pin Voltage below which Standby Mode is
Entered (Note 5)
V
V
decreasing
increasing
V
0.895
V
COMP
CMP(SBY)
COMP Standby Comparator Hysteresis (Note 5)
COMP Pin Internal Pullup Resistor (SSR Option)
LINE FEED FORWARD
V
−
−
18
15
−
−
mV
COMP
CMP(SBY)HYS
R
kW
pullup
V
HV
to I
Conversion Ratio
K
LFF
0.189 0.21 0.231 mA/V
CS(offset)
Offset Current Maximum Value
Line Feed−forward Current
V
> (450 V or 500 V)
I
76
35
95
40
114
45
mA
mA
HV
offset(MAX)
DRV high, V = 200 V
I
FF
HV
VALLEY LOCKOUT SECTION
Threshold for Line Range Detection V Increasing
V
increases
decreases
V
HL
228
218
15
240
230
25
252
242
35
V
V
HV
> 80% V
HV
HV
st
nd
(1 to 2 Valley Transition for V
)
REFX
REF
st
rd
(Prog. Option: 1 to 3 Valley Transition)
Threshold for Line Range Detection V Decreasing
V
V
LL
HV
nd
st
(2 to 1 Valley Transition for V
> 80% V
)
REFX
REF
rd
st
(Prog. Option: 3 to 1 Valley Transition)
Blanking Time for Line Range Detection
t
ms
HL(blank)
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6
NCL30488B
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V, V
= 0 V, V = 0 V. For
CS
J
CC
ZCD
min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V) (continued)
J
J
CC
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
VALLEY LOCKOUT SECTION
Valley Thresholds
V
st
nd
nd
rd
1
to 2 Valley Transition at LL and 2 to 3 Valley HL,
V
V
V
V
V
V
V
V
decreases
increases
decreases
increases
decreases
increases
decreases
increases
V
V
V
V
V
V
V
V
−
−
−
−
−
−
−
−
0.80
0.90
0.65
0.75
0.50
0.60
0.35
0.45
−
−
−
−
−
−
−
−
REF
REF
REF
REF
REF
REF
REF
REF
VLY1−2/2−3
VLY2−1/3−2
VLY2−3/3−4
VLY3−2/4−3
VLY3−4/4−5
VLY4−3/5−4
VLY4−5/5−6
VLY5−4/6−5
rd
th
V
Decr. (Prog. Option: 3 to 4 Valley HL)
REF
nd
st
rd
nd
2
to 1 Valley Transition at LL and 3 to 2 Valley HL,
th
rd
V
Incr. (Prog. Option: 4 to 3 Valley HL)
REF
nd
rd
rd
th
2
to 3 Valley Transition at LL and 3 to 4 Valley HL,
th
th
V
Decr. (Prog. Option: 4 to 5 Valley HL)
REF
rd
nd
th
rd
3
to 2 Valley Transition at LL and 4 to 3 Valley HL,
th
th
V
Incr. (Prog. Option: 5 to 4 Valley HL)
REF
rd
th
th
th
3
to 4 Valley Transition at LL and 4 to 5 Valley HL,
th
th
V
Decr. (Prog. Option: 5 to 6 Valley HL)
REF
th
th
th
th
4
to 3 Valley Transition at LL and 5 to 4 Valley HL,
th
th
V
Incr. (Prog. Option: 6 to 5 Valley HL)
REF
th
th
th
th
4
to 5 Valley Transition at LL and 5 to 6 Valley HL,
th
th
V
Decr. (Prog. Option: 6 to 7 Valley HL)
REF
th
th
th
th
5
to 4 Valley Transition at LL and 6 to 5 Valley HL,
th
th
V
REF
V
REF
V
REF
Incr. (Prog. Option: 7 to 6 Valley HL)
Value at which the FF Mode is Activated
Value at which the FF Mode is Removed
V
V
decreases
increases
V
V
−
−
0.25
0.35
−
−
V
V
REF
FFstart
REF
FFstop
FREQUENCY FOLDBACK
Added Deadc time (Note 5)
V
REFX
V
REFX
V
REFX
V
REFX
V
REFX
V
REFX
= 0.25 V
= 0.08 V
< 3 mV
< 11.2 mV
= 0
t
−
−
−
−
−
−
2
−
−
−
−
−
−
ms
ms
ms
ms
ms
ms
FF1LL
Added Dead Time (Note 5)
t
35
FFchg
Dead−time Clamp (Option 1) (Note 5)
Dead−time Clamp (Option 2) (Note 5)
Minimum Added Dead−time in Standby (Note 5)
t
687
250
640
1.8
FFend1
FFend2
t
t
DT(min)SBY
Maximum Added Dead−time in Standby (Option 2)
(Note 5)
= 0, V
< 0.7 V
t
DT(max)SBY2
COMP
V
Threshold below which Valley Synchronization in
V
REFX
V
REFX
decreasing
increasing
V
REFXsyncD
0.14
0.15
0.16
V
V
REFX
Frequency Foldback is Turned Off (Note 5)
V
Threshold above which Valley Synchronization in
V
0.165 0.18 0.195
REFX
REFXsyncI
Frequency Foldback is Turned On (Note 5)
FAULT PROTECTION
Thermal Shutdown (Note 5)
Device switching (F
65 kHz)
around
T
SHDN
130
150
170
°C
SW
Thermal Shutdown Hysteresis
T
−
20
–
°C
SHDN(HYS)
Threshold Voltage for Output Short Circuit or Aux.
Winding Short Circuit Detection
V
0.6
0.65
0.7
V
ZCD(short)
Short Circuit Detection Timer
V
ZCD
< V
t
OVLD
70
3
90
4
110
5
ms
s
ZCD(short)
Auto−recovery Timer
t
recovery
Line OVP Threshold
V
V
increasing
decreasing
V
457
430
210
469
443
340
485
465
470
V dc
V dc
ms
HV
HV(OVP)
HV Pin Voltage at which Line OVP is Reset
Blanking Time for Line OVP Reset
BROWN−OUT AND LINE SENSING
Brown−Out ON level (IC Start Pulsing)
Brown−Out ON Level (IC Start Pulsing) Option 2
Brown−Out OFF Level (IC Stops Pulsing)
Brown−Out OFF Level (IC Stops Pulsing) Option 2
V
HV(OVP)RST
HV
T
LOVP(blank)
V
HV
V
HV
V
HV
V
HV
V
HV
increasing
increasing
decreasing
decreasing
V
101.5
129.7
92
108
138
99
114.5 V dc
146.3 V dc
HVBO(on)
V
HVBO(on)2
V
106
137
−
V dc
V dc
V
HVBO(off)
V
121
−
129
55
HVBO(off)2
HV Pin Voltage above which the Sampling of ZCD is
Enabled Low Line
decreasing, low line
V
sampENLL
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7
NCL30488B
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V, V
= 0 V, V = 0 V. For
CS
J
CC
ZCD
min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V) (continued)
J
J
CC
Parameter
BROWN−OUT AND LINE SENSING
Test Condition
Symbol
Min
Typ
Max
Unit
HV Pin Voltage above which the Sampling of ZCD is
Enabled Highline
V
V
decreasing, highline
increasing
V
−
105
−
V
HV
sampENHL
ZCD Sampling Enable Comparator Hysteresis
BO Comparators Delay
V
−
−
5
−
−
V
HV
sampHYS
BO(delay)
BO(blank)
t
t
30
25
ms
ms
Brown−Out Blanking Time
15
35
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Guaranteed by design.
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8
NCL30488B
TYPICAL CHARACTERISTICS
4,9
4,8
4,7
4,6
4,5
4,4
4,3
4,2
4,1
4
296
291
286
281
276
271
266
−50
−25
0
25
50
75
100
100
100
125
125
125
−50
−25
0
25
50
75
100
100
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. IHV(start2) vs. Temperature
Figure 4. IHV(start1) vs. Temperature
18,31
18,3
10,218
10,213
10,208
10,203
10,198
10,193
10,188
10,183
10,178
10,173
10,168
18,29
18,28
18,27
18,26
18,25
18,24
18,23
18,22
−50
−25
0
25
50
75
−50
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. VCC(on) vs. Temperature
Figure 6. VCC(off) vs. Temperature
1,47
1,45
1,43
1,41
1,39
1,37
1,35
1,33
26,91
26,89
26,87
26,85
26,83
26,81
26,79
−50
−25
0
25
50
75
−50
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. VCC(OVP) vs. Temperature
Figure 8. ICC1 vs. Temperature
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NCL30488B
TYPICAL CHARACTERISTICS (continued)
1,0505
1,0495
1,0485
1,0475
1,0465
1,0455
1,0445
1,0435
1,0425
1,0415
1,765
1,755
1,745
1,735
1,725
1,715
1,705
1,695
1,685
−50
−25
0
25
50
75
100
100
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. ICC4 vs. Temperature
Figure 10. tFF1LL vs. Temperature
358
357
356
355
354
353
352
351
350
2,214
2,209
2,204
2,199
2,194
2,189
2,184
2,179
2,174
2,169
2,164
−50
−25
0
25
50
75
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. VHV(OL) vs. Temperature
Figure 12. VREF(PFC)CLP vs. Temperature
1,3755
1,3735
1,3715
1,3695
1,3675
1,3655
1,3635
54,2
53,7
53,2
52,7
52,2
51,7
51,2
50,7
50,2
−50
−25
0
25
50
75
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. VILIM vs. Temperature
Figure 14. VCS(low)F vs. Temperature
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10
NCL30488B
TYPICAL CHARACTERISTICS (continued)
2,005
2,004
2,003
2,002
2,001
2
379
378,5
378
377,5
377
1,999
1,998
1,997
1,996
1,995
376,5
376
−50
−25
0
25
50
75
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 15. VCS(stop) vs. Temperature
Figure 16. VCS(SBY)_opn1 vs. Temperature
280,2
330,6
329,6
328,6
327,6
326,6
325,6
279,7
279,2
278,7
278,2
277,7
277,2
276,7
276,2
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. VCS(SBY)_opn2 vs. Temperature
Figure 18. VCS(SBY)_opn3 vs. Temperature
14,1
20,1
14,05
14
20,05
20
13,95
13,9
13,85
13,8
19,95
19,9
19,85
19,8
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. ton(MAX)1 vs. Temperature
Figure 20. ton(MAX)2 vs. Temperature
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11
NCL30488B
TYPICAL CHARACTERISTICS (continued)
183
182
181
180
179
178
177
176
310
308
306
304
302
300
298
296
294
292
−50
−25
0
25
50
75
100
100
100
125
125
125
−50
−25
0
25
50
75
100
100
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 21. tLEB vs. Temperature
Figure 22. tBCS vs. Temperature
49
47
45
43
41
39
37
11
10
9
8
7
6
5
4
3
−50
−50
−25
0
25
50
75
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 23. tILIM vs. Temperature
Figure 24. RSNK vs. Temperature
37
35
33
31
29
27
25
23
21
19
22
17
12
7
2
−50
−25
0
25
50
75
−50
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 25. RSRC vs. Temperature
Figure 26. tr vs. Temperature
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12
NCL30488B
TYPICAL CHARACTERISTICS (continued)
86,2
86,1
86
22
20
18
16
14
12
85,9
85,8
85,7
−50
−25
0
25
50
75
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 27. tf vs. Temperature
Figure 28. VZCD(rising) vs. Temperature
0,6685
0,6675
0,6665
0,6655
0,6645
0,6635
0,6625
0,6615
0,6605
57,4
56,9
56,4
55,9
55,4
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 29. VZCD(falling) vs. Temperature
Figure 30. VZCD(short) vs. Temperature
121
116
111
106
101
96
1,63
1,62
1,61
1,6
1,59
1,58
1,57
1,56
91
86
81
76
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 31. tZCD(DEM) vs. Temperature
Figure 32. tZCD(blank1)OPN1 vs. Temperature
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13
NCL30488B
TYPICAL CHARACTERISTICS (continued)
0,876
0,871
0,866
0,861
0,856
0,851
0,846
0,841
0,836
1,084
1,079
1,074
1,069
1,064
1,059
1,054
1,049
1,044
−50
−25
0
25
50
75
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 33. tZCD(blank1)OPN2 vs. Temperature
Figure 34. tZCD(blank1)OPN1 vs. Temperature
6,895
0,584
6,875
6,855
6,835
6,815
6,795
0,579
0,574
0,569
0,564
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 35. tZCD(blank2)OPN2 vs. Temperature
Figure 36. tTIMO vs. Temperature
341
3,528
3,523
3,518
3,513
3,508
3,503
3,498
3,493
3,488
340,5
340
339,5
339
338,5
338
337,5
337
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 38. VREF(CV) vs. Temperature
Figure 37. VREF/3 vs. Temperature
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NCL30488B
TYPICAL CHARACTERISTICS (continued)
4,121
4,116
4,111
4,106
4,101
4,096
615,5
613,5
611,5
609,5
607,5
605,5
603,5
−50
−25
0
25
50
75
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 39. VCV(clampL) vs. Temperature
Figure 40. VCV(clampH) vs. Temperature
15,52
15,47
15,42
15,37
15,32
15,27
15,22
15,17
15,12
4,058
4,048
4,038
4,028
4,018
4,008
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 41. Rpullup vs. Temperature
Figure 42. VOVP1 vs. Temperature
0,2074
0,2064
0,2054
0,2044
0,2034
0,2024
4,529
4,524
4,519
4,514
4,509
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 44. KLFF vs. Temperature
Figure 43. VOVP2 vs. Temperature
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15
NCL30488B
TYPICAL CHARACTERISTICS (continued)
41,6
41,4
41,2
41
102,7
102,2
101,7
101,2
100,7
100,2
99,7
40,8
40,6
40,4
40,2
40
99,2
−50
−25
0
25
50
75
100
125
125
125
−50
−25
0
25
50
75
100
125
125
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 45. Ioffset(MAX) vs. Temperature
Figure 46. IFF vs. Temperature
470,2
469,7
469,2
468,7
468,2
467,7
467,2
466,7
466,2
465,7
465,2
443,9
443,4
442,9
442,4
441,9
441,4
440,9
440,4
439,9
439,4
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 47. VHV(OVP) vs. Temperature
Figure 48. VHV(OVP)RST vs. Temperature
108,15
108,05
107,95
107,85
107,75
107,65
107,55
107,45
107,35
107,25
99,15
99,05
98,95
98,85
98,75
98,65
98,55
98,45
98,35
98,25
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 50. VHVBO(off)1 vs. Temperature
Figure 49. VHVBO(on)1 vs. Temperature
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NCL30488B
TYPICAL CHARACTERISTICS (continued)
127,4
127,2
127
138,45
138,25
138,05
137,85
137,65
137,45
126,8
126,6
126,4
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 51. VHVBO(on)2 vs. Temperature
Figure 52. VHVBO(off)2 vs. Temperature
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NCL30488B
Application Information
The NCL30488B implements
• Cycle−by−cycle peak current limit: when the current
sense voltage exceeds the internal threshold V , the
a
current−mode
ILIM
architecture operating in quasi−resonant mode. Thanks to
proprietary circuitry, the controller is able to accurately
regulate the secondary side current and voltage of the
fly−back converter without using any opto−coupler or
measuring directly the secondary side current or voltage.
The controller provides near unity power factor correction
MOSFET is turned off for the rest of the switching cycle.
• Winding Short−Circuit Protection: an additional
comparator senses the CS signal and stops the controller
if V reaches 1.5 x V
(after a reduced LEB of t ).
CS
ILIM
BCS
This additional comparator is enabled only during the
main LEB duration t , for noise immunity reason.
LEB
• Quasi−Resonance
Current−Mode
Operation:
• Output Under Voltage Protection: If a too low voltage is
applied on ZCD pin for 90 ms time interval, the
controllers assume that the output or the ZCD pin is
shorted to ground and shutdown. After waiting 4 seconds,
the IC restarts switching.
• Thermal Shutdown: an internal circuitry disables the gate
drive when the junction temperature exceeds 150°C
(typically). The circuit resumes operation once the
temperature drops below approximately 140°C.
• Standby Mode: In order to decrease the power
consumption of the SMPS if no load conditions, the
controller features a standby mode, where its own
consumption is decreased.
implementing quasi−resonance operation in peak
current−mode control, the NCL30488B optimizes the
efficiency by switching in the valley of the MOSFET
drain−source voltage. Thanks to an internal algorithm
control, the controller locks−out in a selected valley and
remains locked until the input voltage or the output
current set point significantly changes.
• Primary Side Constant Current Control: thanks to a
proprietary circuit, the controller is able to take into
account the effect of the leakage inductance of the
transformer and allows an accurate control of the
secondary side current regardless of the input voltage and
output load variation.
• Primary Side Constant Voltage Regulation: By
monitoring the auxiliary winding voltage, it is possible to
regulate accurately the output voltage. The output voltage
regulation is typically within 2%.
• Load Transient Compensation: Since PFC has low loop
bandwidth, abrupt changes in the load may cause
excessive over or under−shoot. The slow Over Voltage
Protection contains the output voltage when it tends to
become excessive. In addition, the NCL30488B speeds
up the constant voltage regulation loop when the output
voltage goes below 85% of its regulation level.
POWER FACTOR AND CONSTANT CURRENT
CONTROL
The NCL30488B embeds an analog/digital block to
control the power factor and regulate the output current by
monitoring the ZCD, CS and HV pin voltages (signals
V
ZCD
, V
, V ). This circuit generates the current
HV_DIV CS
setpoint signal and compares it to the current sense signal to
turn the MOSFET off. The HV pin provides the sinusoidal
reference necessary for shaping the input current. The
obtained current reference is further modulated so that when
averaged over a half line period, it is equal to the output
current reference (V
). The modulation and averaging
REFX
• Power Factor Correction: A proprietary concept allows
achieving high power factor correction and low THD
while keeping accurate constant current and constant
voltage control.
process is made internally by a digital circuit. If the HV pin
properly conveys the sinusoidal shape, power factor will be
close to 1. Also, the Total Harmonic Distortion (THD) will
be low especially if the output voltage ripple is small.
• Line Feed−forward: allows compensating the variation of
the output current caused by the propagation delay.
• V Over Voltage Protection: if the V pin voltage
VREF
(eq. 1)
IOUT
+
2NspRsense
CC
CC
exceeds an internal limit, the controller shuts down and
waits 4 seconds before restarting pulsing.
Where:
• N is the secondary to primary transformer turns ratio:
sp
• Fast Over Voltage Protection: If the voltage of ZCD pin
exceeds 130% of its regulation level, the controller shuts
down and waits 4 s before trying to restart.
• Brown−Out: the controller includes a brown−out circuit
which safely stops the controller in case the input voltage
is too low. The device will automatically restart if the line
recovers.
N
• R
• V
= N / N
S P
sp
is the current sense resistor
sense
is the output current reference: V
= V
if
REFX
REFX
REF
no dimming
The output current reference (V
controller operates in constant voltage mode.
) is V
unless the
REFX
REF
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18
NCL30488B
PRIMARY SIDE CONSTANT VOLTAGE CONTROL
The auxiliary winding voltage is sampled internally
through the ZCD pin.
A type 2 compensator is needed at the CV OTA output to
stabilize the loop. The COMP pin voltage modify the the
output current internal reference in order to regulate the
output voltage.
A precise internal voltage reference V
voltage target for the CV loop.
sets the
REF(CV)
When V
When V
≥ 4 V, V
= V
.
COMP
COMP
REFX
< 0.9 V, V
REF
The sampled voltage is applied to the negative input of the
constant voltage (CV) operational transconductance
= 0 V.
REFX
amplifier (OTA) and compared to V
.
REFCV
Gm
R
ZCD
ZCDU
V
ZCDsamp
ZCD & signal
sampling
COMP
.
R1
C1
R
OTA
ZCDL
VREF(CV)
C2
Aux.
Figure 53. Constant Voltage Feedback Circuit
Secondary Side Regulation Compatible
The NCL30488B is able to support secondary−side
regulation as well. The controller features an option to
When the power supply is first connected to the mains
outlet, the internal current source is biased and charges up
the V capacitor. When the voltage on this V capacitor
CC
CC
provide a pullup resistor R
on COMP pin instead of the
reaches the V
level, the current source turns off. At this
pullup
CC(on)
CV OTA output. This allows connecting directly an
optocoupler collector and properly biases it. The internal
time, the controller is only supplied by the V capacitor,
CC
and the auxiliary supply should take over before V
CC
voltage biasing R
is around 5 V.
collapses below V
.
pullup
CC(off)
In secondary side regulation, the slow and fast OVP on
ZCD pin are still active thus providing an additional over
voltage protection. In this case, the ZCD pin resistors should
The HV startup circuitry is made of two startup current
levels, I and I . This helps to protect the
HV(start1)
HV(start2)
controller against short−circuit between V and GND. At
CC
be calculated to trigger V
interest.
at the output voltage of
power−up, as long as V is below V
, the source
OVP2
CC
CC(TH)
delivers I
(around 300 mA typical). Then, when
HV(start1)
V
CC
reaches V , the source smoothly transitions to
CC(TH)
I
and delivers its nominal value. As a result, in case
HV(start2)
CV OTA Boost
of short−circuit between V and GND occurring at high
CC
VDD
line (V = 305 V rms), the maximum power dissipation will
be 431 x 300 m = 130 mW instead of 1.5 W if there was only
one startup current level.
To speed−up the output voltage rise, the following is
implemented:
in
Rpullup
COMP
−
+
• The digital OTA output is increased until V
VREF(CV)
REF(PFC)
. Again, this is to speed−up the
signal reaches V
REFX
control signal rise to their steady state value.
• At the beginning of each operating phase of a V cycle,
CC
Figure 54. COMP Pin Configuration for Secondary
Side Regulation
the digital OTA output is set to 0. Actually, the digital
OTA output is set to 0 in the case of a cold start−up or in
the case of a start−up sequence following an operation
STARTUP PHASE (HV STARTUP)
It is generally requested that the LED driver starts to emit
light in less than 1 s and possibly within 300 ms. It is
challenging since the start−up consists of the time to charge
interruption due to a fault. On the other hand, if the V
CC
hiccups just because the system fails to start−up in one
cycle, the digital OTA output is not reset to ease the
V
CC
the V capacitor and that necessary to charge the output
CC
second (or more) attempt. But, the digital OTA stops
integrating if V < V . The compensator output
capacitor until sufficient current flows into the LED string.
This second phase can be particularly long in dimming cases
where the secondary current is a portion of the nominal one.
The NCL30488B features a high voltage startup circuit
that allows charging VCC pin capacitor very fast.
CC
CC(off)
then restarts from its setpoint before the UVLO, thus
avoiding any output current overshoot if a resistor is
inserted in series with HV pin.
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19
NCL30488B
The application note AND90120 gives more details about
strategies to decrease the power dissipation of the HV
startup circuit.
• If the load is shorted, the circuit will operate in hiccup
mode with V oscillating between V and V
CC
CC(off)
CC(on)
until the output under voltage protection (UVP) trips.
UVP is triggered if the ZCD pin voltage does not exceed
Cycle−by−Cycle Current Limit
When the current sense voltage exceeds the internal
V
within a 90 ms operation of time. This
ZCD(short)
indicates that the ZCD pin is shorted to ground or that an
excessive load prevents the output voltage from rising.
threshold V , the MOSFET is turned off for the rest of the
ILIM
switching cycle.
HV Startup Power Dissipation
Winding and Output Diode Short−Circuit Protection
In parallel to the cycle−by−cycle sensing of the CS pin,
At high line (305 V rms and above) the power dissipated
by the HV startup in case of fault becomes high. Indeed, in
case of fault, the NCL30488B is directly supplied by the HV
rail. The current flowing through the HV startup will heat the
controller. It is highly recommended adding enough copper
another comparator with a reduced LEB (t ) and a
BCS
threshold of (V
= 140% x V
) monitors the CS pin
CS(stop)
ILIM
to detect a winding or an output diode short circuit. The
controller shuts down if it detects 4 consecutives pulses
around the controller to decrease the R
of the controller.
qJA
during which the CS pin voltage exceeds V
CS(stop).
2
Adding a minimum pad area of 215 mm of 35 mm copper
(1 oz) drops the R to around 120°C/W (no air flow, R
The controller goes into auto−recovery mode.
qJA
qJA
measured at ADIM pin)
The PCB layout shown in Figure 55 is a layout example
to achieve low R
Valley Lockout
Quasi−Square wave resonant systems have a wide
switching frequency excursion. The switching frequency
increases when the output load decreases or when the input
voltage increases. The switching frequency of such systems
must be limited.
.
qJA
The NCL30488B changes valley as V
decreases and
REFX
as the input voltage increases and as the output current
setpoint is varied during dimming. This limits the frequency
excursion.
By default, when the output current is not dimmed, the
controller operates in the first valley at low line and in the
second valley at high line.
(prog. option to have the operating valley incremented by
1 at high line for better I control at 305 V rms.)
out
Figure 55. PCD Layout Example
Table 1. VALLEY SELECTION
V
Voltage for Valley Change
HV_DIV
V
REFX
value at which the Controller
V
REFX
Value at Which the Controller
0
−−LL−−
2.3 V
−−HL−−
5 V
Changes Valley (I
Decreasing)
Changes Valley(I
Increasing)
out
out
st
nd rd
100%
100%
90%
1
2
3
4
5
6
(3 )
80%
65%
50%
35%
nd
rd th
2
(4 )
75%
60%
45%
rd
th th
3
(5 )
th
th th
4
(6 )
th
th th
5
(7 )
25%
0%
35%
0%
FF mode
FF mode
0
−−LL−−
2.3 V
−−HL−−
5 V
Internal V
Voltage for Valley Change
HV_DIV
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20
NCL30488B
Zero Crossing Detection Block
the valleys. To avoid such a situation, NCL30488B features
a Time−Out circuit that generates pulses if the voltage on
ZCD pin stays below the 55 mV threshold for 6.5 ms.
The Time−out also acts as a substitute clock for the valley
detection and simulates a missing valley in case of too
damped free oscillations.
The ZCD pin allows detecting when the drain−source
voltage of the power MOSFET reaches a valley.
A valley is detected when the ZCD pin voltage crosses
below the 55 mV internal threshold.
At startup or in case of extremely damped free
oscillations, the ZCD comparator may not be able to detect
VZCD
VZCD(th)
low
3
high
14
12
I
decreases or V
in
out
high
increases
ZCD comp
high
low
15
low
TimeOut
16
2nd , 3rd
high
VVIN
increases
Clock
low
17
Figure 56. Valley Detection and Time−out Chronograms
If the ZCD pin or the auxiliary winding happen to be
shorted the time−out function would normally make the
controller keep switching and hence lead to improper
regulation of the LED current.
The Under Voltage Protection (UVP) is implemented to
avoid these scenarios: a secondary timer starts counting
10 Hz, depending on power stage phase shift). Because the
loop is slow, the output voltage can reach high value during
startup or during an output load step. It is necessary to limit
the output voltage excursion. For this, the NCL30488B
features a slow OVP and a fast OVP on ZCD pin.
Slow OVP
when the ZCD voltage is below the V
threshold. If
ZCD(short)
If ZCD voltage exceeds V
for 4 consecutive
OVP1
this timer reaches 90 ms, the controller detects a fault and
enters the auto−recovery fault mode.
switching cycles, the controller stops switching during
1.4 ms. The PFC loop is not reset. After 1.4 ms, the
controller initiates a new DRV pulse to refresh ZCD
Minimum Off−time at Startup
At startup, the output voltage reflected on the auxiliary
winding is low. Thus, the voltage on the ZCD pin is very low
and the ZCD comparator might be unable to detect the
valleys. In this condition, setting the DRV latch with the
6.5−ms time−out leads to a continuous conduction mode
operation (CCM).
sampling voltage. If V
is still too high (V
> 115%
ZCD
ZCD
V
), the controller continues to switch with a 1.4 ms
REF(CV)
period. The controller resumes its normal operation when
< 105% V
V
ZCD
.
REF(CV)
During slow OVP, the peak current setpoint is COMP pin
voltage scaled down by a fixed ratio.
To avoid CCM pulses during startup, a minimum off time
Fast OVP
If ZCD voltage exceeds V
4 consecutive switching cycles (slow OVP not triggered) or
for 2 switching cycles if the slow OVP has already been
triggered, the controller detects a fault and starts the
auto−recovery fault mode (cf: Fault Management Section)
(typ. 50 ms) is forced when V
< V
during 8 ms.
ZCD
ZCD(short)
(130% of V
) for
REF(CV)
OVP2
This minimum off time is also present when the controller
restart after a fault, if V < V
.
ZCD(short)
ZCD
ZCD Over Voltage Protection
Because of the power factor correction, it is necessary to
set the crossover frequency of the CV loop very low (target
www.onsemi.com
21
NCL30488B
HV
v DD
v VS
CS
RLFF
I CS(offset)
K LFF
R sense
Q_drv
+
25 ms
BO_NOK
Blanking
−
1 V / 0.9 V
Figure 57. Line Feed−Forward and Brown−out Schematic
Line Feedforward
if a voltage higher than V
is applied to the HV pin
HVBO(on)
The line voltage is sensed by the HV pin and converted
into a current. By adding an external resistor in series
between the sense resistor and the CS pin, a voltage offset
proportional to the line voltage is added to the CS signal. The
offset is applied only during the MOSFET on−time in order
to not influence the detection of the leakage inductance
reset.
and shuts−down if the HV pin voltage decreases and stays
below V for 25 ms typical.
An option with higher brown−out levels is also available
HVBO(off)
(see ordering table and electricals parameters)
Line OVP
In order to protect the power supply in case of too high
input voltage, the NCL30488B features a line over voltage
The offset is always applied even at light load in order to
improve the current regulation at low output load.
protection. When the voltage on HV pin exceeds V
HV(OVP)
the controller stops switching; V hiccups.
CC
Brown−out
When V becomes lower than V
for more
HV
HV(OVP)RST
In order to protect the supply against a very low input
voltage, the controller features a brown−out circuit with a
fixed ON/OFF threshold. The controller is allowed to start
than 340 ms, the controller initiates a clean startup sequence
and re−starts switching.
www.onsemi.com
22
NCL30488B
VHV
VHV(OVP)
VHV(OVP)RST
t LOVP(blank)
VCC
VCC(on)
VCC(off)
VDRV
Iout
Figure 58. Line OVP Chronograms
Standby Mode
dead−time (DT) to keep the output voltage regulated (pink
In order to decrease the power drawn from the mains in no
load conditions, the NCL30488B implements a standby
mode. In this mode, the current consumption of the
curve in Figure 59).
The regulation of V is based on COMP pin voltage
varying between 700 mV to 913 mV.
Standby mode is entered if V
out
controller is reduced to I
.
< 895 mV, V
COMP
CC4
COMP
In standby mode, the peak current is frozen to a fixed value
(25% or below of V ) and the controller
adjust the switching frequency, more specifically the
decreasing and exit if V
(See AND90120 for more details concerning the standby
mode)
> 913 mV, V
increasing.
COMP
COMP
V
CS(STBY)
ILIMIT
DT (ms)
t
, 1800
DT(max)SBY2
Standby mode curve
t
, 687
FFend1
t , 640
DT(min)SBY
560
Simplified FF curve for 675 ms DT clamp
t
, 35
FFchg
t
, 2
FF1LL
700
895
CMP(SBY)
913
1.758
VCOMP (V)
V
0 5.848
250
FFstart
VREFX (mV)
V
Figure 59. Dead−time Setpoint as a Function of VCOMP
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23
NCL30488B
Standby mode is entered if V
< 895 mV, V
This creates sudden variation of the on−time and creates
COMP
COMP
decreasing and exit if V
> 913 mV, V
increasing.
an input current spike (EMI filter inductance responds to
rate of change of current).
COMP
COMP
Variable Maximum On−time
Varying the maximum on−time with V
helps
REFX
Around line zero−crossing, the primary inductor slope is
too low to reach the peak current setpoint imposed by the CC
control. The DRV pulse is terminated by the max. on−time.
decreasing this spike over the output load range. Figure 60
and Figure 61 shows the maximum on−time curve as a
function of V
.
REFX
T
(ms)
on,MAX
20
18
16
14
12
10
7
0.15
0.18 0.25
0.5
0.6
0.8
0.9
1
V
REFX
(V)
0.35
0.45
0.65
0.75
Figure 60. Variable Maximum On−time, 20−ms Option
T
(ms)
on,MAX
20
18
16
14
12
11
10
9
8
7
0.15
0.18 0.25 0.35
0.5
0.6
0.65
0.8
0.9
1
V
REFX
(V)
0.45
0.75
Figure 61. Variable Maximum On−time, 14−ms Option
www.onsemi.com
24
NCL30488B
Protections
The circuit incorporates a large variety of protections to
make the LED driver very rugged.
V
and enters auto−recovery mode. This feature
CC(OVP)
protects the circuit if output LEDs happen to be
Among them, we can list:
disconnected.
• Fault of the GND connection
• ZCD fast OVP
If the GND pin is properly connected, the supply current
If ZCD voltage exceeds V
for 4 consecutive
ZCD(OVP2)
drawn from the positive terminal of the V capacitor,
flows out of the GND pin to return to the negative terminal
switching cycles (slow OVP not triggered) or for 2
switching cycles if the slow OVP has already been
triggered, the controller detects a fault and enters
auto−recovery mode (4 s operation interruption between
active bursts).
CC
of the V capacitor. If the GND pin is not connected, the
CC
circuit ESD diodes offer another return path. The
accidental non connection of the GND pin can hence be
detected by detecting that one of this ESD diode is
conducting. Practically, the ESD diode of CS pin is
monitored. If such a fault is detected for 200 ms, the circuit
stops generating DRV pin.
• Die Over Temperature (TSD)
The circuit stops operating if the junction temperature
(T ) exceeds 150°C typically. The controller remains off
J
until T goes below nearly 130°C.
J
• Output short circuit situation (Output Under Voltage
• Brown−Out Protection (BO)
Protection)
The circuit prevents operation when the line voltage is too
low to avoid an excessive stress of the LED driver.
Operation resumes as soon as the line voltage is high
Overload is detected by monitoring the ZCD pin voltage:
if it remains below V
for 90 ms, an output short
ZCD(short)
circuit is detected and the circuit stops generating pulses
for 4 s. When this 4 s delay has elapsed, the circuit
attempts to restart.
enough and V is higher than V
.
CC
CC(on)
• CS pin short to ground
The CS pin is checked at start−up (cold start−up or after
• ZCD pin incorrect connection:
a brown−out event). A current source (I
) is applied
cs(short)
♦ If the ZCD pin grounded, the circuit will detect an
output short circuit situation when 90 ms delay has
elapsed.
to the pin and no DRV pulse is generated until the CS pin
exceeds V . I and V are 500 mA and
cs(low) cs(short)
cs(low)
60 mV typically (V rising). The typical minimum
CS
♦ A 200 kW resistor pulls down the ZCD pin so that
the output short circuit detection trips if the ZCD pin
is not connected (floating).
impedance to be placed on the CS pin for operation is then
120 W. In practice, it is recommended to place more than
250W to take into account possible parametric deviations.
Also, along the circuit operation, the CS pin could happen
to be grounded. If it is grounded, the MOSFET
conduction time is limited by the 20 ms maximum
on−time. If such an event occurs, a new pin impedance
test is made.
• Winding or Output Diode Short Circuit protection
The circuit detects this failure when 4 consecutive DRV
pulses occur within which the CS pin voltage exceeds
(V
= 140% x V
). In this case, the controller
ILIM
CS(stop)
enters auto−recovery mode (4−s operation interruption
between active bursts).
• Line overvoltage protection
• V Over Voltage Protection
(see Line OVP section)
CC
The circuit stops generating pulses if the V exceeds
CC
www.onsemi.com
25
NCL30488B
ORDERING TABLE OPTION
Valley
Transition
from LL to HL
Line Range
Detector
Dead−time Clamp
V
REF
Max. On−time
ZCD Blanking
Standby Mode
st
st
OPN #
NCL30488_ _
1.4 ms 200 mV 333 mV
1
to
1
to
On
Off
On
Off
250 ms 687 ms
14 ms
20 ms
1 ms
1.5 ms
nd
rd
2
3
NCL30488B1
NCL30488B2
NCL30488B4
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Frozen Peak Current During Standby
Mode V
COMP Pin R
pullup
(CV OTA output disconnected)
Line OVP
Brown−out Levels
On: 108 V On: 138 V
CS(SBY)
OPN #
On
Off
380 mV
330 mV
280 mV
On
Off
Off: 98 V
Off: 129 V
NCL30488_ _
NCL30488B1
NCL30488B2
NCL30488B4
x
x
x
x
x
x
x
x
x
x
x
x
ORDERING INFORMATION
Device
†
Marking
Package Type
Shipping
NCL30488B1
L30486B2
SOIC7 – P7 COMP VHV PBFH
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
(Pb−Free)
NCL30488B2
NCL30488B4
L30488B3
L30488B4
SOIC7 – P7 COMP VHV PBFH
(Pb−Free)
SOIC7 – P7 COMP VHV PBFH
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
26
NCL30488B
PACKAGE DIMENSIONS
SOIC−7
CASE 751U−01
ISSUE E
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B ARE DATUMS AND T
IS A DATUM SURFACE.
4. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
5. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
S
M
M
B
−B−
0.25 (0.010)
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
G
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189 0.197
4.00 0.150 0.157
1.75 0.053 0.069
0.51 0.013 0.020
0.050 BSC
0.25 0.004 0.010
0.25 0.007 0.010
1.27 0.016 0.050
C
R X 45
_
1.27 BSC
J
0.10
0.19
0.40
0
−T−
SEATING
PLANE
K
8
0
8
_
_
_
_
M
H
D 7 PL
0.25
5.80
0.50 0.010 0.020
6.20 0.228 0.244
M
S
S
0.25 (0.010)
T
B
A
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
27
NCL30488B
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
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