NCP176BMX280TCG [ONSEMI]
LDO 稳压器，500 mA，超低漏，高 PSRR，带启用;
| 型号： | NCP176BMX280TCG |
| 厂家： | 
ONSEMI |
| 描述： | LDO 稳压器，500 mA，超低漏，高 PSRR，带启用 光电二极管 输出元件 稳压器 调节器 |
| 文件： | 总11页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP176
Fast Transient Response
Low Voltage 500 mA LDO
The NCP176 is CMOS LDO regulator featuring 500 mA output
current. The input voltage is as low as 1.4 V and the output voltage can
be set from 0.7 V.
www.onsemi.com
Features
• Operating Input Voltage Range: 1.4 V to 5.5 V
• Output Voltage Range: 0.7 to 3.6 V (0.1 V steps)
• Quiescent Current typ. 60 mA
XDFN6
MX SUFFIX
CASE 711AT
• Low Dropout: 130 mV typ. at 500 mA, V
• High Output Voltage Accuracy 0.8% (V
= 2.5 V
OUT
> 1.8 V)
OUT
• Stable with Small 1 mF Ceramic Capacitors
• Over−current Protection
PIN CONNECTIONS
• Built−in Soft Start Circuit to Suppress Inrush Current
• Thermal Shutdown Protection: 165°C
OUT
FB
1
2
3
6
5
4
IN
• With (NCP176A) and Without (NCP176B) Output Discharge
N/C
EN
Function
GND
• Available in XDFN6 1.2 mm x 1.2 mm x 0.4 mm Package
• These are Pb−free Devices
XDFN6 (Top View)
Typical Applications
MARKING DIAGRAM
• Battery Powered Equipment
• Portable Communication Equipment
• Cameras, Image Sensors and Camcorders
XX M
VIN
VOUT
XX = Specific Device Code
IN
OUT
M
= Date Code
CIN
1 mF
COUT
1 mF
NCP176
ON
EN
FB
GND
OFF
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 10 of this data sheet.
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
July, 2015 − Rev. 3
NCP176/D
NCP176
IN
OUT IN
FB
OUT
FB
VOLTAGE REFERENCE
AND
VOLTAGE REFERENCE
AND
SOFT−START
SOFT−START
EN
EN
0.7 V
0.7 V
THERMAL
SHUTDOWN
THERMAL
SHUTDOWN
GND
GND
NCP176A (with output discharge)
NCP176B (without output discharge)
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
XDFN6
Pin
Name
Description
1
OUT
FB
LDO output pin
2
Feedback input pin
Ground pin
3
GND
EN
4
5
Chip enable input pin (active “H”)
N/C
IN
Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.
Power supply input pin
6
EPAD
EPAD
It is recommended to connect the EPAD to GND, but leaving it open is also acceptable
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
IN
Value
−0.3 to 6.0
−0.3 to VIN + 0.3
−0.3 to 6.0
Internally Limited
150
Unit
Input Voltage (Note 1)
V
V
Output Voltage
OUT
EN
Chip Enable Input
V
Output Current
I
mA
°C
°C
V
OUT
Maximum Junction Temperature
Storage Temperature
T
J(MAX)
T
STG
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Resistance, Junction−to−Air, XDFN6 1.2 mm x 1.2 mm
R
123
°C/W
q
JA
www.onsemi.com
2
NCP176
Table 4. ELECTRICAL CHARACTERISTICS V = V
+ 1 V (V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V),
IN
OUT−NOM
OUT−NOM
IN
OUT−NOM
V
= 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C. The specifications in bold are guaranteed at −40°C ≤ T ≤ 85°C.
EN
OUT
IN
OUT
J
J
Parameter
Test Conditions
Symbol
Min
1.4
Typ
Max
5.5
Unit
V
Input Voltage
V
IN
Output Voltage
T = +25°C
V
V
V
V
≥ 1.8 V
< 1.8 V
≥ 1.8 V
< 1.8 V
V
OUT
−0.8
−18
−1.5
−55
+0.8
+18
+1.5
+50
0.1
%
J
OUT
OUT
OUT
OUT
mV
%
−40°C ≤ T ≤ 85°C
J
mV
%/V
Line Regulation
V
IN
= V
+ 0.5 V to 5.25 V
LineReg
LoadReg
0.02
OUT−NOM
V
≥ 1.4 V
IN
Load Regulation
1 mA ≤ I
≤ 500 mA
1
5.0
380
275
230
190
165
90
mV
mV
OUT
Dropout Voltage (Note 3)
I
= 500 mA
1.4 V ≤ V
1.8 V ≤ V
2.1 V ≤ V
2.5 V ≤ V
3.0 V ≤ V
< 1.8 V
< 2.1 V
< 2.5 V
< 3.0 V
< 3.6 V
V
DO
295
200
160
130
110
60
OUT
OUT
OUT
OUT
OUT
OUT
Quiescent Current
I
= 0 mA
I
Q
mA
mA
mA
mA
V
OUT
Standby Current
V
= 0 V
I
0.05
1
EN
STBY
Output Current Limit
Short Circuit Current
Enable Threshold Voltage
V
OUT
= V
− 100 mV
I
OUT
500
550
1.0
OUT−NOM
V
OUT
= 0 V
I
750
SC
EN Input Voltage “H”
EN Input Voltage “L”
VEN = VIN = 5.5 V
V
ENH
V
ENL
0.4
0.6
Enable Input Current
I
0.15
75
mA
EN
Power Supply Rejection
Ratio
f = 1 kHz, Ripple 0.2 Vp−p,
= V + 1.0 V, I = 30 mA
PSRR
dB
V
IN
OUT−NOM
OUT
(V
OUT
≤ 2.0V, V = 3.0 V)
IN
Output Noise
f = 10 Hz to 100 kHz
V
OUT
≥ 1.8 V
mV
RMS
20x
V
V
OUT−NOM
V
OUT
< 1.8 V
40x
OUT−NOM
Output Discharge Resistance
(NCP176A option only)
V
IN
= 4.0 V, V = 0 V, V
= V
R
60
165
20
W
°C
EN
OUT
OUT−NOM
ACTDIS
Thermal Shutdown
Temperature
Temperature rising from T = +25°C
T
SD
J
Thermal Shutdown
Hysteresis
Temperature falling from T
T
°C
SD
SDH
3. Measured when the output voltage falls −3% below the nominal output voltage (voltage measured under the condition V = V
+ 0.5V).
IN
OUT−NOM
www.onsemi.com
3
NCP176
TYPICAL CHARACTERISTICS
V
IN
= V
+ 1 V (V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
OUT−NOM
IN
OUT−NOM
EN
OUT
IN
1.255
1.245
1.235
1.225
1.215
1.205
1.195
1.185
1.175
1.165
1.827
1.821
1.815
1.809
1.803
1.797
1.791
1.785
V
= 1.8 V
40
OUT−NOM
V
= 1.2 V
40
OUT−NOM
1.779
1.773
1.155
1.145
−40
−20
0
20
60
80
−40
−20
0
20
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
0.10
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
OUT−NOM
0.08
0.06
0.04
0.02
0
−0.02
−0.04
V
= V
+ 0.5 V to 5.25 V, V ≥ 1.4 V
OUT−NOM IN
V
= 3.3 V
40
−0.06
IN
OUT−NOM
3.26
3.25
−0.08
−0.10
−40
−20
0
20
60
80
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Line Regulation vs. Temperature
5
4
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
OUT−NOM
3
2
1
0
−1
−2
I
= 1 mA to 500 mA
−3
OUT
−4
−5
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
Figure 7. Load Regulation vs. Temperature
www.onsemi.com
4
NCP176
TYPICAL CHARACTERISTICS
V
IN
= V
+ 1 V (V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
OUT−NOM
IN
OUT−NOM
EN
OUT
IN
275
250
225
200
175
150
125
100
75
275
V
= 1.8 V
V
= 1.8 V
250
225
200
175
150
125
100
OUT−NOM
OUT−NOM
I
= 500 mA
= 250 mA
OUT
T = 85°C
J
T = 25°C
J
I
I
OUT
T = −40°C
J
75
50
= 100 mA
= 10 mA
OUT
50
25
0
25
0
I
OUT
0
100
200
300
400
500
−40
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Dropout Voltage vs. Output Current
160
140
120
100
80
160
140
120
100
80
V
= 3.3 V
V
= 3.3 V
OUT−NOM
OUT−NOM
I
= 500 mA
= 250 mA
OUT
T = 85°C
J
T = 25°C
J
I
I
OUT
60
60
T = −40°C
J
40
40
= 100 mA
= 10 mA
OUT
20
0
20
0
I
OUT
0
100
200
300
400
500
−40
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 10. Dropout Voltage vs. Output Current
Figure 11. Dropout Voltage vs. Temperature
90
80
70
60
50
40
30
20
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
OUT−NOM
I
= 0 mA
0
OUT
10
0
−40
−20
20
40
60
80
TEMPERATURE (°C)
Figure 12. Quiescent Current vs. Temperature
www.onsemi.com
5
NCP176
TYPICAL CHARACTERISTICS
V
IN
= V
+ 1 V (V
= 0 V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT−NOM
OUT−NOM
IN
OUT−NOM
EN
OUT
IN
OUT
J
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
90
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
OUT−NOM
V
EN
I
= 0 mA
85
80
75
70
65
60
OUT
T = 85°C
J
T = 25°C
J
T = −40°C
J
55
50
V
= 1.8 V
5.0
OUT−NOM
0.1
0
−40
−20
0
20
40
60
80
2.0
2.5
3.0
3.5
4.0
4.5
5.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 13. Standby Current vs. Temperature
Figure 14. Quiescent Current vs. Input Voltage
300
250
200
150
100
1000
950
V
= 0 V
OUT−FORCED
V
= 1.8 V
OUT−NOM
900
850
800
750
700
650
600
T = 85°C
J
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
OUT−NOM
T = 25°C
50
0
J
T = −40°C
J
550
500
0
100
200
300
400
500
−40
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 15. Ground Current vs. Output Current
Figure 16. Short Circuit Current vs.
Temperature
1000
950
900
850
800
750
700
650
600
1.0
0.9
0.8
0.7
0.6
V
= V
− 0.1 V
OUT−FORCED
OUT−NOM
OFF −> ON
ON −> OFF
V
= 1.2 V
OUT−NOM
V
= 3.3 V
OUT−NOM
V
= 1.8 V
OUT−NOM
0.5
0.4
V
= 1.8 V
0
OUT−NOM
550
500
−40
−20
0
20
40
60
80
−40
−20
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Output Current Limit vs.
Temperature
Figure 18. Enable Threshold Voltage vs.
Temperature
www.onsemi.com
6
NCP176
TYPICAL CHARACTERISTICS
V
IN
= V
0.6
0.5
0.4
0.3
0.2
+ 1 V (V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
OUT−NOM
IN
OUT−NOM
EN
OUT
IN
80
70
60
50
40
30
V
V
V
= 1.8 V
OUT−NOM
= 5.5 V
= 5.5 V
IN
EN
V
V
V
V
= 1.8 V
OUT−NOM
20
= 4.0 V
= 0 V
IN
0.1
0
EN
10
0
= V
OUT−FORCED
OUT−NOM
−40
−20
0
20
40
60
80
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Enable Input Current vs.
Temperature
Figure 20. Output Discharge Resistance vs.
Temperature (NCP176A option only)
6
5
4
3
2
90
80
V
V
= 1.8 V, V = 2.8 V
IN
OUT−NOM
OUT−NOM
= 3.3 V, V = 4.3 V
IN
70
60
50
40
30
20
C
= 1 mF X7R 0805
OUT
Integral noise:
10 Hz − 100 kHz: 54 mVrms
10 Hz − 1 MHz: 62 mVrms
C
= 1 mF X7R 0805
= 30 mA
OUT
I
OUT
1
0
V
V
= 1.8 V, V = 3.0 V
IN
OUT−NOM
OUT−NOM
10
0
= 3.3 V, V = 4.3 V
IN
10
100
1K
10K
100K
1M
10M
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Output Voltage Noise Spectral
Density
V
= 3.3 V
V
= 3.3 V
OUT−NOM
OUT−NOM
I
IN
I
IN
V
IN
V
IN
V
OUT
V
OUT
1 ms/div
50 ms/div
Figure 23. Turn−ON/OFF − VIN driven (slow)
Figure 24. Turn−ON − VIN driven (fast)
www.onsemi.com
7
NCP176
TYPICAL CHARACTERISTICS
V
IN
= V
+ 1 V (V
> 1.5 V) or V = 2.5 V (V
≤ 1.5 V), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
OUT−NOM
IN
OUT−NOM
EN
OUT
IN
V
IN
V
= 3.3 V
OUT−NOM
V
= 1.2 V
OUT−NOM
V
EN
3.3 V
V
IN
V
OUT
t
R
= t = 1 ms
F
2.3 V
I
IN
V
OUT
1.2 V
100 ms/div
20 ms/div
Figure 25. Turn−ON/OFF − EN driven
Figure 26. Line Transient Response
V
= 3.3 V
OUT−NOM
V
IN
4.8 V
V
IN
V
V
= 1.2 V
OUT−NOM
500 mA
= 2.2 V
IN
t
R
= t = 1 ms
F
I
3.8 V
1 mA
t
R
= t = 1 ms
F
OUT
V
OUT
1.2 V
V
OUT
3.3 V
20 ms/div
10 ms/div
Figure 27. Line Transient Response
Figure 28. Load Transient Response
220
1.6
1.4
V
IN
200
180
V = 3.3 V
OUT−NOM
P
, 2 oz Cu
, 1 oz Cu
D(MAX)
V
IN
= 4.3 V
500 mA
1.2
1.0
0.8
0.6
0.4
t
R
= t = 1 ms
F
P
D(MAX)
I
1 mA
OUT
160
140
120
100
q
, 1 oz Cu
JA
V
OUT
1.2 V
q
, 2 oz Cu
JA
80
60
0.2
0
0
100
200
300
400
500
600
10 ms/div
2
PCB COPPER AREA (mm )
Figure 29. Load Transient Response
Figure 30. qJA and PD(MAX) vs. Copper Area
www.onsemi.com
8
NCP176
APPLICATIONS INFORMATION
Enable Operation
General
The NCP176 is a high performance 500 mA low dropout
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 60 W (typ.) resistor.
linear regulator (LDO) delivering excellent noise and
dynamic performance. Thanks to its adaptive ground current
behavior the device consumes only 60 mA of quiescent
current (no−load condition).
The regulator features low noise of 48 mV , PSRR of
RMS
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
50 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
The EN pin has internal pull−down current source with
value of 150 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
Output Current Limit
Output current is internally limited to a 750 mA typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
V
– 100mV). If the output voltage is shorted to
OUT−NOM
ground, the short circuit protection will limit the output
current to 750 mA typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Output Capacitor Selection (COUT
)
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the C
but the
OUT
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
TJ * TA
qJA
PD(MAX)
+
[W]
(eq. 1)
Where (T − T ) is the temperature difference between the
J
A
junction and ambient temperatures and θ is the thermal
JA
resistance (dependent on the PCB as mentioned above).
www.onsemi.com
9
NCP176
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
100 kHz) can be tuned by the selection of C
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
capacitor
OUT
ǒ
Ǔ
(eq. 2)
PD + VIN @ IGND ) VIN * VOUT @ IOUT [W]
Enable Turn−On Time
The enable turn−on time is defined as the time from EN
assertion to the point in which V
nominal value. This time is dependent on various
application conditions such as V , C and T .
Where I
the output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θ and P
Cu layer thickness could be seen on the Figure 30.
is the LDO’s ground current, dependent on
GND
will reach 98% of its
OUT
OUT−NOM OUT
A
to PCB copper area and
JA
D(MAX)
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place C and C capacitors as close as
Reverse Current
The PMOS pass transistor has an inherent body diode
IN
OUT
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
which will be forward biased in the case when V
> V .
OUT
IN
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
ORDERING INFORMATION TABLE
†
Part Number
Voltage Option
1.0 V
Marking
AA
Option
Package
Shipping
NCP176AMX100TCG
NCP176AMX120TCG
NCP176AMX180TCG
NCP176AMX300TCG
NCP176AMX330TCG
NCP176BMX100TCG
NCP176BMX120TCG
NCP176BMX180TCG
NCP176BMX300TCG
NCP176BMX330TCG
1.2 V
AE
1.8 V
AF
With output discharge
3.0 V
AC
3.3 V
AD
XDFN6
(Pb−Free)
3000 / Tape & Reel
1.0 V
DA
1.2 V
DE
1.8 V
DF
Without output discharge
3.0 V
DC
3.3 V
DD
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
NCP176
PACKAGE DIMENSIONS
XDFN6 1.20x1.20, 0.40P
CASE 711AT
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE PAD AS
WELL AS THE TERMINALS.
D
A
B
EXPOSED Cu
MOLD CMPD
DETAIL A
OPTIONAL
CONSTRUCTION
PIN ONE
REFERENCE
E
MILLIMETERS
DIM
A
MIN
0.30
0.00
0.13
MAX
0.45
0.05
0.23
2X
0.05
C
A1
b
2X
0.05
C
1.20 BSC
D
TOP VIEW
0.84
1.04
D2
E
1.20 BSC
0.20
0.40 BSC
0.40
E2
e
A
DETAIL A
0.05
0.05
C
C
L
0.15
0.05 REF
0.25
L1
A1
RECOMMENDED
MOUNTING FOOTPRINT*
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
6X
0.35
1.08
PACKAGE
OUTLINE
DETAIL A
6X
L1
E2
1
3
1.40
6X
L
0.40
1
0.40
PITCH
6X
0.24
6
4
DIMENSIONS: MILLIMETERS
6X b
e
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.10
C A B
BOTTOM VIEW
NOTE 3
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCP176/D
相关型号：
©2020 ICPDF网 联系我们和版权申明