NCP45750IMN24TWG [ONSEMI]
Load Switch, Integrated, ecoSWITCH™ 5.9 mΩ, 24V, 10 A, Fault Protection;
| 型号： | NCP45750IMN24TWG |
| 厂家： | 
ONSEMI |
| 描述： | Load Switch, Integrated, ecoSWITCH™ 5.9 mΩ, 24V, 10 A, Fault Protection |
| 文件： | 总12页 (文件大小：272K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ecoSwitcht
Advanced Load Management
Controlled Load Switch with Low RON
NCP45750
The NCP45750 load management device provides a component and
area−reducing solution for efficient power domain switching with
inrush current limit via soft start. These devices are designed to
integrate control and driver functionality with a high performance
very low on−resistance power MOSFET in a single package offering
safeguards and monitoring via fault protection and power−good
signaling. This cost effective solution is ideal for power management
and disconnect functions in USB Type−C ports and power management
applications requiring low power consumption in a small footprint.
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R
TYP
V
IN
DC I
*
ON
MAX
5.9 mW
3 V to 24 V
10 A
*I
is defined as the maximum steady state current the
MAX
load switch can pass at room ambient temperature without
entering thermal lockout. See the SOA section for more
information on transient current limitations.
Features
• Advanced Controller with Charge Pump
• Integrated N−Channel MOSFET with Very−Low R
ON
• Soft−Start via Controlled Slew Rate
1
DFN12, 3x3
CASE 506DY
• Adjustable Slew Rate Control
• Fault Detection with Power Good Output
• Thermal Shutdown and Under Voltage Lockout
• Short−Circuit and Adjustable Over−Current Protections
• Input Voltage Range 3 V to 24 V
MARKING DIAGRAM
750
ALYWG
G
• Extremely Low Standby Current
• This is a RoHS/REACH Compliant Device
Typical Applications
750
A
L
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
• USB Type C Power Delivery
• Servers, Set−Top Boxes and Gateways
• Notebook and Tablet Computers
• Telecom, Networking
• Medical and Industrial Equipment
• Hot−Swap Devices and Peripheral Ports
Y
W
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
VCC
EN
OCP PG
VIN
NC
1
2
3
4
5
6
12
11
V
IN
V
V
V
EN
V
OUT
OUT
Thermal
Shutdown,
UVLO, &
OCP
Bandgap
&
Biases
Control
Logic
10
9
CC
13: V
IN
OCP
PG
OUT
NC
8
Delay and
Slew Rate
Control
Charge
Pump
V
SS
7
SR
(Top View)
ORDERING INFORMATION
VSS
VOUT
SR
Device
NCP45750IMN24TWG
Package
Shipping
Figure 1. Block Diagram
DFN12
(RoHS/
REACH)
3000 / Tape
& Reel
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
February, 2021 − Rev. 4
NCP45750/D
NCP45750
Table 1. PIN DESCRIPTION
Pin
Name
Function
2, 3, 4
V
OUT
Source of MOSFET connected to load. Includes an internal bleed resistor to GND. – All pins must be con-
nected to provide correct Rds, OCP, and current capability.
6
7
8
V
Driver ground
SS
SR
PG
Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND; float if not used.
Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up
resistor ≥ 100 kW to an external voltage source required; tie to GND if not used.
9
OCP
Over−current protection trip point adjustment made with a resistor to ground; short to ground if over−current
protection is not needed.
10
11
V
Driver supply voltage (3.0 V − 5.5 V)
CC
EN
Active−high digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND
Input voltage (3 V − 24 V) – Pin 13 should be used for high current (>0.5 A)
12, 13
V
IN
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 6
−0.3 to 30
−0.3 to 30
−0.3 to 6
−0.3 to 6
−0.3 to 6
49.7
Unit
V
Supply Voltage Range
V
CC
Input Voltage Range
V
IN
V
Output Voltage Range
V
OUT
V
EN Input Voltage Range
V
V
EN
PG
PG Output Voltage Range (Note 1)
OCP Input Voltage Range
V
V
V
OCP
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
R
R
°C/W
°C/W
A
θJA
Thermal Resistance, Junction−to−Case (V Paddle)
1.7
IN
θJC
Continuous MOSFET Current @ T = 25°C (Note 2)
I
10
A
MAX
LOAD
Load Power Range (Note 5)
P
100
W
Storage Temperature Range
T
−55 to 150
260
°C
°C
kV
kV
mA
STG
Lead Temperature, Soldering (10 sec.)
ESD Capability, Human Body Model (Notes 3 and 4)
ESD Capability, Charged Device Model (Notes 3 and 4)
Latch−up Current Immunity (Note 3)
T
SLD
ESD
ESD
2
HBM
CDM
0.5
LU
100
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open drain output that requires an external pull−up resistor > 100 kW to an external voltage source.
2. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu. Over current protection will limit maximum realized
current to 10 A at highest setting.
3. Tested by the following methods @ T = 25°C:
A
ESD Human Body Model tested per JS−001
ESD Charged Device Model per ESD JS−002
Latch−up Current tested per JESD78
PG, OCP, and SR pins must be correctly connected for compliance
4. Rating is for all pins except for V and V
which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
IN
OUT
for V and V
should be expected and these devices should be treated as ESD sensitive.
IN
OUT
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2
NCP45750
Table 3. OPERATING RANGES
Rating
Symbol
Min
3
Max
5.5
5.5
24
Unit
V
VCC − (V > 4.5 V)
V
CC
V
CC
IN
VCC − (V < 4.5 V)
4.5
3
V
IN
VIN − (V > 4.5 V)
V
IN
V
CC
VIN − (V < 4.5 V)
V
4.5
short
24
V
CC
IN
OCP External Resistor to VSS
R
open
100
0
W
OCP
OFF to ON Transition Energy Dissipation Limit (See application section)
E
mJ
V
TRANS
VSS
V
SS
Ambient Temperature
Junction Temperature
T
−40
−40
85
°C
°C
A
T
125
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS (T = 25°C, V = 3 V − 5.5 V, unless otherwise specified)
J
CC
Parameter
On−Resistance
Conditions
Symbol
Min
Typ
5.9
5.9
5.9
5.9
Max
7.0
7.0
7.0
7.0
0.1
1.5
300
5.0
0.5
200
Unit
V
CC
V
CC
V
CC
V
CC
V
EN
V
EN
V
EN
V
EN
V
EN
= 4.5 V; V = 3 V
IN
R
mW
ON
= 3.3 V; V = 4.5 V
IN
= 3.3 V; V = 15 V
IN
= 3.3 V; V = 24 V
IN
Leakage Current − V to V
= 0 V; V = 24 V
I
LEAK
mA
mA
mA
mA
mA
kW
V
IN
OUT
IN
V
IN
V
IN
Control Current − V to V
= 0 V; V = 24 V; V = 3.3 V
I
INCTL
IN
SS
SS
IN
CC
Control Current − V to V
= V = 3.3 V; V = 24 V
I
INCTL_EN
IN
CC
IN
Supply Standby Current (Note 5)
Supply Dynamic Current (Note 6)
Bleed Resistance
= 0 V; V = 24 V; V = 3.3 V
I
STBY
2.0
IN
CC
= V = 3.3 V; V = 24 V
I
DYN
CC
IN
R
75
2
104
BLEED
EN Input High Voltage
V
IH
EN Input Low Voltage
V
0.8
1.0
V
IL
EN Input Leakage Current
EN Pull Down Resistance
V
= 0 V
I
R
V
−1.0
mA
kW
V
EN
IL
76
100
124
0.1
PD
OL
PG Output Low Voltage
I
= 100 mA
SINK
PG Output Leakage Current
Slew Rate Control Constant (Note 7)
FAULT PROTECTIONS
V
= 3.3 V
I
3.5
99
100
130
nA
mA
TERM
OH
SR pin floating (default)
K
70
SR
Thermal Shutdown Threshold (Note 8)
Thermal Shutdown Hysteresis (Note 8)
T
145
20
°C
°C
V
SDT
T
HYS
V
IN
V
IN
Under Voltage Lockout Threshold
Under Voltage Lockout Hysteresis
V
rising
V
UVLO
2.0
220
1.2
7.5
12
2.1
300
1.45
IN
V
HYS
mV
A
R
R
R
= open
0.85
Over−Current Protection Trip (Note 9)
I
OCP
OCP
OCP
TRIP
= 32 kW
= short to GND (Note 10)
Over−Current Protection Blanking Time
Short−Circuit Protection Trip Current
t
2.25
12
ms
A
OCP
Soft Short & Hard Short (Note 11)
I
SC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Average current from V to GND with MOSFET turned off.
CC
6. Average current from V to GND after charge up time of MOSFET.
CC
7. See Applications Information section for details on how to adjust the gate slew rate.
8. Operation above T = 125°C is not guaranteed.
J
9. OCP Trip current limits were verified by bench test and are not guaranteed on every part.
10.Transient currents exceeding the short−circuit protection trip current will cause the device to fault. For OCP settings less than 20 kW, high
steady state currents may cause an over temperature lockout before the OCP threshold is reached due to self−heating.
11. Short Circuit Protection protects the device against hard shorts (R
≤ 250 mW Vout to Ground) for Vin < 18 V, and against soft shorts
SHORT
(R
> 250 mW) for Vin < 24 V. Short circuit protection testing assumed a 100 W supply capability limit on Vin.
SHORT
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3
NCP45750
Table 5. SWITCHING CHARACTERISTICS (T = 25°C unless otherwise specified) (Notes 12 and 13)
J
Parameter
Conditions
= 4.5 V; V = 3 V
Symbol
Min
13
Typ
20.3
20.6
23
Max
28
Unit
Output Slew Rate − Default
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
SR
kV/s
IN
= 5.0 V; V = 3 V
13
28
IN
= 3.3 V; V = 24 V
13
28
IN
= 5.0 V; V = 24 V
13
23
28
IN
Output Turn−on Delay
= 4.5 V; V = 3 V
T
ON
100
100
100
100
162
161
453
448
60
700
700
700
700
ms
ms
IN
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
Output Turn−off Delay
= 4.5 V; V = 3 V
T
OFF
IN
= 5.0 V; V = 3 V
60
IN
= 3.3 V; V = 24 V
40
IN
= 5.0 V; V = 24 V
40
IN
Power Good Turn−on Time
Power Good Turn−off Time (Note 14)
= 4.5 V; V = 3 V
T
0.25
0.25
0.25
0.25
0.5
0.5
1.7
1.5
2.5
2.5
2.5
2.5
10
ms
ns
IN
PG,ON
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
= 4.5 V; V = 3 V
T
PG,OFF
IN
= 5.0 V; V = 3 V
10
IN
= 3.3 V; V = 24 V
10
IN
= 5.0 V; V = 24 V
10
IN
12.See below figure for Test Circuit and Timing Diagram.
13.Tested with the following conditions: V = V ; R = 100 kW; R = 10 W; C = 0.1 mF.
TERM
CC
PG
L
L
14.Power Good Turn−off Time is highly dependent on external pull up resistor value and external capacitive loading. 100 kW pull up to 3.3 V
was used in test.
VIN
VOUT
VCC
EN
OCP
NCP45750
VSS
RL
CL
OFF ON
PG
SR
50%
50%
TON
VEN
Dt
TOFF
90%
90%
DV
Dt
DV
SR=
10%
VOUT
TPG,ON
TPG,OFF
50%
50%
VPG
Figure 2. Switching Characteristics Test Circuit and Timing Diagrams
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4
NCP45750
TYPICAL CHARACTERISTICS
6.3
6.2
6.1
6.0
9
8
7
V
= 4.5
CC
6
5
4
3
2
V
V
= 5.5
= 3.0
CC
CC
5.9
5.8
1
0
0
2
0
4
8
12
16
20
24
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
(V)
TEMPERATURE (°C)
IN
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2.3
2.1
1.9
1.7
1.5
1.3
1.1
V
CC
= 5.5 V
V
= 5.5 V
CC
V
CC
V
CC
= 5.0 V
= 4.5 V
V
V
= 3.3 V
= 3.0 V
CC
0.9
CC
0.4
0.2
0
0.7
0.5
4
6
8
10 12 14 16 18 20 22 24
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
IN
TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. Supply
Voltage
Figure 6. Supply Standby Current vs.
Temperature
370
360
350
340
400
350
300
250
200
150
100
V
= 5.5 V
= 3.0 V
CC
CC
V
V
= 5.5 V
= 5.0 V
CC
330
320
310
300
V
CC
V
= 4.5 V
= 3.0 V
CC
CC
290
280
270
260
250
240
V
50
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
IN
TEMPERATURE (°C)
Figure 7. Dynamic Current vs. Input Voltage
Figure 8. Supply Dynamic Current vs.
Temperature
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5
NCP45750
TYPICAL CHARACTERISTICS
14
13
12
11
10
9
8
7
6
5
2200
2000
1800
1600
V
CC
= 5.5 V
V
CC
= 4.5 V
V
IN
= 24 V
V
CC
= 3.0 V
1400
1200
1000
800
V
IN
= 15 V
4
3
2
1
0
V
= 4.5 V
600
IN
400
200
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60
80 100 120
V
IN
TEMPERATURE (°C)
Figure 9. Input to Output Leakage vs. Input
Voltage (EN = 0)
Figure 10. Input to Output Leakage vs.
Temperature (EN = 0)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
180
160
140
120
100
80
V
= 24 V
IN
V
IN
= 24 V
V
IN
= 3.0 V
60
40
V
= 4.5 V
IN
0.1
0
20
0
−80 −60 −40 −20
0
20 40 60 80 100 120 140
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Vin Controller Current vs.
Temperature (EN = 0)
Figure 12. Vin Controller Current vs.
Temperature (EN = HIGH)
500
400
300
200
600
500
400
300
200
V
CC
= 3.0 V
V
V
= 24 V
= 15 V
IN
V
CC
= 5.5 V
IN
V
IN
= 3.0 V
100
0
100
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
IN
TEMPERATURE (°C)
Figure 13. Output Turn−on Delay vs. Input
Figure 14. Output Turn−on Delay vs.
Voltage
Temperature
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6
NCP45750
TYPICAL CHARACTERISTICS
2000
1800
1600
1400
1200
1000
800
2000
V
CC
= 3.0 V
1800
1600
1400
1200
1000
800
V
V
= 3.0 V,
= 24 V
CC
V
CC
= 5.0 V
= 5.5 V
V
IN
V
CC
= 5.0 V,
= 3.0 V
CC
V
IN
600
600
400
400
200
0
200
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
IN
TEMPERATURE (°C)
Figure 15. Power Good Turn−on Time vs. Input
Figure 16. Power Good Turn−on vs.
Voltage
Temperature
10.7
10.6
10.5
10.4
10.3
10.2
10.1
10.0
23.0
22.5
22.0
21.5
21.0
V
V
= 5.5 V
= 3.0 V
CC
CC
V
= 5.5 V
CC
V
= 3.0 V
CC
20.5
20.0
9.9
9.8
0
5
10
15
(V)
20
25
30
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
V
IN
V
IN
Figure 17. Default Slew Rate vs. Input Voltage
Figure 18. Slew Rate vs. Input Voltage
(SR pin = 10 nF to GND)
125
120
115
110
105
100
95
1.4
1.3
1.2
1.1
V
= 24 V
= 3.0 V
CC
V
= 3.0 V
CC
V
V
= 3.3 V
= 4.5 V
CC
V
CC
CC
V
CC
= 5.5 V
1.0
90
0.9
0.8
85
80
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
0
TEMPERATURE (°C)
V
IN
Figure 19. KSR vs. Temperature
Figure 20. OCP Trip Current vs. Input Voltage
(OCP = Float)
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7
NCP45750
TYPICAL CHARACTERISTICS
9
8
7
6
5
4
3
2
130
120
110
100
90
80
70
60
50
40
30
20
10
0
1
0
−80 −60 −40 −20
0
20 40 60 80 100 120 140
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 21. OCP Trip Current vs. Temperature
Figure 22. RBLEED vs. Temperature
(OCP = 32 kW)
2.10
2.05
2.00
1.95
1.90
1.85
V
Ascending
IN
1E−2
1E−3
1E−4
V
IN
Descending
1E−5
1E−6
1.80
1.75
−80 −60 −40 −20
0
20 40 60 80 100 120 140
0
40
80
120
160
200
240
280
TEMPERATURE (°C)
CURRENT (A)
Figure 23. UVLO Trip Voltage vs. Temperature
Figure 24. Safe Operating Area Transient Current
10
1
0.1
0.01
1E−7
1E−6
1E−5
1E−4
1E−3
1E−2
1E−1
1E+0
1E+1
1E+2
1E+3
1E+4
PULSE DURATION (s)
Figure 25. Transient Thermal Response
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NCP45750
APPLICATIONS INFORMATION
Enable Control
The NCP45750 part enables the MOSFET in an
active−high configuration. When the EN pin is at a logic
high level and the V supply pin has an adequate voltage
CC
applied, the MOSFET will be enabled. When the EN pin is
at a logic low level, the MOSFET will be disabled. An
internal pull down resistor to ground on the EN pin ensures
that the MOSFET will be disabled when not driven.
Short−Circuit Protection
The NCP45750 device is equipped with a short−circuit
protection that helps protect the part and the system from a
sudden high−current event, such as the output, V
hard−shorted to ground.
, being
OUT
Once active, the circuitry monitors the voltage difference
between the V pin and the V pin. When the difference
is equal to the short−circuit protection threshold voltage, the
MOSFET is turned off and the load bleed is activated. The
part remains off and is latched in the Fault state until EN is
IN
OUT
Figure 26. OCP Trip Current Setting
Thermal Shutdown
The thermal shutdown of the NCP45750 device protects
the part from internally or externally generated excessive
temperatures. This circuitry is disabled when EN is not
active to reduce standby current. When an over−temperature
condition is detected, the MOSFET is turned off and the load
bleed is activated.
The part comes out of thermal shutdown when the
junction temperature decreases to a safe operating
temperature as dictated by the thermal hysteresis. Upon
exiting a thermal shutdown state, and if EN remains active,
the MOSFET will be turned on in a controlled fashion with
the normal output turn−on delay and slew rate.
toggled or V supply voltage is cycled, at which point the
CC
MOSFET will be turned on in a controlled fashion with the
normal output turn−on delay and slew rate. The short circuit
protection feature protects the device from hard shorts
(R
SHORT
< 250 mW V
to GND) for V ≤ 18 V. Hard
OUT IN
short circuit testing used a 10 mW short to ground for this
scenario. The short circuit protection circuitry remains
active regardless of the EN state to protect against enabling
into a short circuit.
Over−Current Protection
The NCP45750 device is equipped with an over−current
protection (OCP) that helps protect the part and the system
from a high current event which exceeds the expected
operational current (e.g., a soft short).
Under Voltage Lockout
The under voltage lockout of the NCP45750 device turns
the MOSFET off and activates the load bleed when the input
In the event that the current from the V pin to the V
IN
OUT
voltage, V , drops below the under voltage lockout
IN
pin exceeds the OCP threshold for longer than the blanking
time, the MOSFET will shut down and the PG pin is driven
low. Like the short−circuit protection, the part remains
threshold. This circuitry is disabled when EN is not active to
reduce standby current.
If the V voltage rises above the under voltage lockout
IN
latched in the Fault state until EN is toggled or V supply
CC
threshold, and EN remains active, the MOSFET will be
turned on in a controlled fashion with the normal output
turn−on delay and slew rate.
voltage is cycled, at which point the MOSFET will be turned
on in a controlled fashion with the normal output turn−on
delay and slew rate.
The over−current trip point is determined by the resistance
between the OCP pin and ground. If no over−current
protection is needed, then the OCP pin should be tied to
GND; if the OCP protection is disabled in this way, the
short−circuit protection will still remain active.
Power Good
The NCP45750 device has a power good output (PG) that
can be used to indicate when the gate of the MOSFET is fully
charged. The PG pin is an active−high, open−drain output
www.onsemi.com
9
NCP45750
that requires an external pull up resistor, RPG, greater than
or equal to 100 kW to an external voltage source.
The power good output can be used as the enable signal for
other active−high devices in the system. This allows for
guaranteed by design power sequencing and reduces the
number of enable signals needed from the system controller.
If the power good feature is not used in the application, the
PG pin should be tied to GND.
to the low R . When the EN signal is asserted high, the load
ON
switch transitions from an OFF state to an ON state. During
this time, the resistance from V to V
transitions from
IN
OUT
high impedance to R , and additional energy is dissipated
ON
in the device for a short period of time. The worst case
energy dissipated during the OFF to ON transition can be
approximated by the following equation:
ǒ
Ǔ @ dt
(eq. 3)
E + 0.5 @ VIN @ IINRUSH ) 0.8 @ ILOAD
Slew Rate Control
where V is the voltage on the V pin, I
inrush current caused by capacitive loading on V
is the
, and dt
IN
IN
INRUSH
The NCP45750 device is equipped with controlled output
slew rate which provides soft start functionality. This limits
the inrush current caused by capacitor charging and enables
these devices to be used in hot swapping applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground. With an external
capacitor present, the slew rate can be determined by the
following equation:
OUT
is the time it takes V
to rise from 0 V to V . I
can
OUT
IN INRUSH
be calculated using the following equation:
dv
dt
(eq. 4)
IINRUSH
+
@ CL
where dv/dt is the programmed slew rate, and C is the
L
capacitive loading on V . To prevent thermal lockout or
OUT
damage to the device, the energy dissipated during the OFF
KSR
CSR
V
ƪsƫ
(eq. 1)
to ON transition should be limited to E
operating ranges table.
listed in
Slew Rate +
TRANS
where K is the specified slew rate control constant, found
SR
ecoSWITCH LAYOUT GUIDELINES
Electrical Layout Considerations
Correct physical PCB layout is important for proper low
noise accurate operation of all ecoSWITCH products.
on page 3, and C is the capacitor added between the SR pin
SR
and ground. Note that the slew rate of the device will always
be the lower of the default slew rate and the adjusted slew
rate. Therefore, if the C is not large enough to decrease the
SR
slew rate more than the specified default value, the slew rate
of the device will be the default value.
Power Planes: The ecoSWITCH is optimized for extremely
low Ron resistance, however, improper PCB layout can
substantially increase source to load series resistance by
adding PCB board parasitic resistance. Solid connections to
Capacitive Load
The peak in−rush current associated with the initial
charging of the application load capacitance needs to stay
the V and V
pins of the ecoSWITCH to copper planes
IN
OUT
should be used to achieve low series resistance and good
thermal dissipation. The ecoSWITCH requires ample heat
dissipation for correct thermal lockout operation. The
internal FET dissipates load condition dependent amounts
of power in the milliseconds following the rising edge of
enable, and providing good thermal conduction from the
below the specified I . C (capacitive load) should be less
max
L
then C
as defined by the following equation:
max
Imax
SRtyp
(eq. 2)
Cmax
+
where I
is the maximum load current, and SR is the
typ
max
packaging to the board is critical. Direct coupling of V to
typical default slew rate when no external load capacitor is
added to the SR pin.
IN
V
OUT
should be avoided, as this will adversely affect slew
rates.
OFF to ON Transition Energy Dissipation
The energy dissipation due to load current traveling from
V
IN
to V
is very low during steady state operation due
OUT
ecoSwitch is a trademark of Semiconductor Component Industries, LLC (SCILLC)
www.onsemi.com
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN12 3x3, 0.5P
CASE 506DY
ISSUE A
1
DATE 26 OCT 2022
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
ALYWG
G
XXXXX = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON65584G
DFN12 3X3, 0.5P
PAGE 1 OF 1
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