NCP4641H080T1G [ONSEMI]
Wide Input Range, Voltage Regulator;型号: | NCP4641H080T1G |
厂家: | ONSEMI |
描述: | Wide Input Range, Voltage Regulator |
文件: | 总14页 (文件大小:339K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCP4641
150 mA, Wide Input Range,
Voltage Regulator
The NCP4641 is a CMOS 150 mA linear voltage regulator with
high input voltage and ultra−low supply current. It incorporates
multiple protection features such as peak current limit, short circuit
current limit and thermal shutdown to ensure a very robust device.
A high maximum input voltage tolerance of 50 V and a wide
temperature range make the NCP4641 suitable for a variety of
demanding applications.
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MARKING
DIAGRAMS
Features
XXX
XMM
• Operating Input Voltage Range: 4 V to 36 V
• Output Voltage Range: 2.0 to 12.0 V (0.1 steps)
SOIC6−TL
CASE 751BR
1
•
2% Output Voltage Accuracy
• Output Current: min 150 mA (V = 8 V, V
= 5 V)
IN
OUT
• Line Regulation: 0.05%/V
• Peak Current Limit Circuit
• Short Current Limit Circuit
• Thermal Shutdown Circuit
• Available in SOT−89−5 and SOIC6−TL Package
• These are Pb−Free Devices
1
XXX
XMM
SOT−89 5
CASE 528AB
Typical Applications
• Power source for home appliances
XXXX = Specific Device Code
MM = Date Code
• Power source for car audio equipment, navigation system
• Power source for notebooks, digital TVs, cordless phones and private
LAN systems
• Power source for office equipment machines such as copiers,
printers, facsimiles, scanners, projectors, etc.
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of
this data sheet.
NCP4641x
VIN
VOUT
VIN
VOUT
C1
100n
C2
100n
CE
GND
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
October, 2014 − Rev. 1
NCP4641/D
NCP4641
VIN
VOUT
Internal
VR
Vref
Current Limit
Short Protection
Thermal Shutdown
CE
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
SOT89
Pin No.
SOIC6−TL
Pin Name
VIN
Description
5
2
6
2
Input pin
GND
Ground pin, all ground pins must be connected together when it is
mounted on board
4
4
5
GND
GND
Ground pin, all ground pins must be connected together when it is
mounted on board
−
Ground pin, all ground pins must be connected together when it is
mounted on board
3
1
3
1
CE
Chip enable pin (“H” active)
Output pin
VOUT
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2
NCP4641
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage
V
IN
IN
−0.3 to 50
Peak Input Voltage (Note 1)
Output Voltage
V
60
V
V
OUT
−0.3 to VIN + 0.3 ≤ 50
V
Chip Enable Input
V
CE
−0.3 to VIN + 0.3 ≤ 50
V
Output Current
I
250
900
mA
mW
OUT
Power Dissipation SOT−89
Power Dissipation SOIC6−TL
Junction Temperature
P
D
1700
T
J
−40 to 150
−55 to 125
2000
°C
°C
V
Storage Temperature
T
STG
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Duration time = 200 ms
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOT−89
R
111
°C/W
q
JA
Thermal Resistance, Junction−to−Air
Thermal Characteristics, SOIC6−TL
Thermal Resistance, Junction−to−Air
R
59
°C/W
q
JA
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3
NCP4641
ELECTRICAL CHARACTERISTICS T = 25°C
A
Parameter
Operating Input Voltage
Output Voltage
Test Conditions
Symbol
VIN
Min
4
Typ
Max
36
Unit
V
V
IN
= VOUT + 3 V, I
= 1 mA
= 1 mA, T = −40 to
VOUT
x0.98
x1.02
V
OUT
Output Voltage Temp. Coeffi-
cient
V
IN
= VOUT + 3 V, I
100
ppm/°C
OUT
105°C
A
Line Regulation
Load Regulation
V
= VOUT + 1.5 V to 36 V, I
= 1 mA
Line
Reg
0.05
10
0.20
25
%/V
mV
IN
OUT
V
IN
= VOUT + 3 V,
2.0 V ≤ V
< 5.0 V
Load
Reg
OUT
OUT
IOUT = 1 mA to 40 mA
5.0 V ≤ V
< 12.0 V
< 3.7 V
< 4.0 V
< 5.0 V
< 12.0 V
< 3.0 V
< 5.0 V
< 12.0 V
20
35
Dropout Voltage
I
= 20 mA
2.0 V ≤ V
3.7 V ≤ V
4.0 V ≤ V
VDO
(Note 3)
0.60
0.40
0.35
V
OUT
OUT
OUT
OUT
OUT
0.35
0.25
0.20
5.0 V ≤ V
Output Current
V
IN
= VOUT + 3 V
2.0 V ≤ V
3.0 V ≤ V
IOUT
100
120
150
mA
OUT
OUT
OUT
5.0 V ≤ V
Short Current Limit
Quiescent Current
Standby Current
V
= 0 V
I
50
9
mA
mA
mA
V
OUT
SC
V
IN
= VOUT + 3 V, IOUT = 0 mA
IQ
20
1
V
IN
= 36 V, V = 0 V
ISTB
VCEH
VCEL
0.1
CE
CE Pin Threshold Voltage
CE Input Voltage “H”
CE Input Voltage “L”
1.5
0.3
Thermal Shutdown Temperature
T
SD
T
SR
150
125
°C
°C
Thermal Shutdown Release
Temperature
Power Supply Rejection Ratio
Output Noise Voltage
VIN = 6 V, V
= 3.0 V, IOUT = 30 mA, f = 1 kHz
PSRR
VN
27
dB
OUT
V
OUT
= 3.0 V, I
= 30 mA, f = 10 Hz to
112
mV
rms
OUT
100 kHz
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Dropout voltage for 2.0 V ≤ V
< 3.7 V can be computed by this formula: V = 4 V − V
OUT
DO
OUTSET
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4
NCP4641
TYPICAL CHARACTERISTICS
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6.0
7.0 V
7.5 V
5.0
V
= 5.0 V
IN
6.5 V
5.5 V
V
IN
= 8.5 V
4.0
8.0 V
3.0
6.0 V
2.0
1.0
0.0
0
50
100
150
(mA)
200
250
300
0
50
100
150
(mA)
200
250
300
I
I
OUT
OUT
Figure 3. Output Voltage vs. Output Current
Figure 4. Output Voltage vs. Output Current
3.0 V Version (TJ = 25 5C)
5.0 V Version (TJ = 25 5C)
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
2.5
2.0
1.5
1.0
0.5
0.0
10.5 V
11 V
105°C
11.5 V
T = 25°C
J
10 V
−40°C
0
50
100
150
(mA)
200
250
300
0
25
50
75
100
125
150
I
I
(mA)
OUT
OUT
Figure 5. Output Voltage vs. Output Current
Figure 6. Dropout Voltage vs. Output Current
3.0 V Version
8.0 V Version (TJ = 25 5C)
2.5
2.0
1.5
1.0
0.5
0.0
2.5
2.0
1.5
1.0
0.5
0.0
105°C
T = 25°C
J
105°C
T = 25°C
J
−40°C
−40°C
0
25
50
75
100
125
150
0
25
50
75
(mA)
100
125
150
I
(mA)
I
OUT
OUT
Figure 7. Dropout Voltage vs. Output Current
5.0 V Version
Figure 8. Dropout Voltage vs. Output Current
8.0 V Version
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5
NCP4641
TYPICAL CHARACTERISTICS
3.05
3.04
3.03
3.02
3.01
3.00
2.99
2.98
2.97
2.96
2.95
5.05
V
IN
= 8.0 V
V
IN
= 5.0 V
5.04
5.03
5.02
5.01
5.00
4.99
4.98
4.97
4.96
4.95
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. Output Voltage vs. Temperature,
3.0 V Version
Figure 10. Output Voltage vs. Temperature,
5.0 V Version
16
14
12
10
8
8.10
8.08
8.06
8.04
8.02
8.00
7.98
7.96
7.94
7.92
7.90
V
IN
= 11 V
V
= 5.0 V
OUT
8.0 V
6
3.0 V
4
2
0
−40
−20
0
20
40
60
80
100
0
5
10
15
20
25
30
35
T , JUNCTION TEMPERATURE (°C)
J
V
IN
, INPUT VOLTAGE (V)
Figure 11. Output Voltage vs. Temperature,
8.0 V Version
Figure 12. Supply Current vs. Input Voltage
14
12
10
8
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
= 3.0 V
OUT
1 mA
5.0 V
20 mA
6
8.0 V
4
I
= 40 mA
OUT
2
0
−40
−20
0
20
40
60
80
100
0
5
10
15
20
25
30
35
T , JUNCTION TEMPERATURE (°C)
J
V , INPUT VOLTAGE (V)
IN
Figure 13. Supply Current vs. Temperature
Figure 14. Output Voltage vs. Input Voltage,
3.0 V Version
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6
NCP4641
TYPICAL CHARACTERISTICS
6.0
5.0
4.0
3.0
2.0
1.0
0.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1 mA
1 mA
20 mA
20 mA
I
= 40 mA
OUT
I
= 40 mA
10
OUT
1.0
0.0
0
5
10
15
20
25
30
35
0
5
15
20
25
30
35
V
IN
, INPUT VOLTAGE (V)
V , INPUT VOLTAGE (V)
IN
Figure 15. Output Voltage vs. Input Voltage,
5.0 V Version
Figure 16. Output Voltage vs. Input Voltage,
8.0 V Version
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
I
= 1 mA
OUT
I
= 1 mA
OUT
30 mA
0.1
30 mA
0.1
100 mA
1
100 mA
1
0.01
10
100
1000
0.01
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 17. PSRR, 3.0 V Version, VIN = 6.0 V
Figure 18. PSRR, 5.0 V Version, VIN = 8.0 V
12
100
90
80
70
60
50
40
30
20
10
0
10
8
6
I
= 1 mA
OUT
4
2
30 mA
0.1
100 mA
1
0
0.01
0.01
10
100
1000
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 19. PSRR, 8.0 V Version, VIN = 11 V
Figure 20. Output Voltage Noise, 3.0 V Version,
IN = 6.0 V, IOUT = 30 mA
V
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NCP4641
TYPICAL CHARACTERISTICS
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
0
0.01
0
0.01
0.1
1
10
100
1000
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 21. Output Voltage Noise, 5.0 V Version,
Figure 22. Output Voltage Noise, 8.0 V version,
V
IN = 8.0 V, IOUT = 30 mA
V
IN = 11.0 V, IOUT = 30 mA
12
10
8
6
4
4.50
4.00
3.50
3.00
2.50
2.00
2
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
t (ms)
Figure 23. Line Transients, 3.0 V Version,
tR = tF = 5 ms, IOUT = 1 mA
14
12
10
8
6
6.00
5.50
5.00
4.50
4.00
3.50
4
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
t (ms)
Figure 24. Line Transients, 5.0 V Version,
tR = tF = 5 ms, IOUT = 1 mA
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8
NCP4641
TYPICAL CHARACTERISTICS
17
15
13
11
9
9.00
8.50
8.00
7.50
7.00
6.50
7
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
t (ms)
Figure 25. Line Transients, 8.0 V Version,
tR = tF = 5 ms, IOUT = 1 mA
200
150
100
50
0
1.24
1.22
1.20
1.18
1.16
1.14
0
20 40 60 80 100 120 140 160 180 200
t (ms)
Figure 26. Load Transients, 3.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 6.0 V
200
150
100
50
0
2.83
2.81
2.79
2.77
2.75
2.73
0
20 40 60 80 100 120 140 160 180 200
t (ms)
Figure 27. Load Transients, 5.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 8.0 V
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9
NCP4641
TYPICAL CHARACTERISTICS
200
150
100
50
0
5.05
5.03
5.01
4.99
4.97
4.95
0
20 40 60 80 100 120 140 160 180 200
t (ms)
Figure 28. Load Transients, 8.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 11.0 V
8
Chip Enable
6
4
2
0
4
3
I
= 20 mA
OUT
I
= 1 mA
OUT
2
I
= 150 mA
OUT
1
0
−1
0
50 100 150 200 250 300 350 400 450 500
t (ms)
Figure 29. Start−up, 3.0 V Version, VIN = 6.0 V
10
8
Chip Enable
6
4
2
8
6
0
I
= 20 mA
OUT
4
I
= 1 mA
OUT
I
= 150 mA
OUT
2
0
−2
0
50 100 150 200 250 300 350 400 450 500
t (ms)
Figure 30. Start−up, 5.0 V Version, VIN = 8.0 V
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10
NCP4641
TYPICAL CHARACTERISTICS
16
12
8
Chip Enable
4
0
I
= 20 mA
OUT
8
6
I
= 1 mA
OUT
4
I
= 150 mA
OUT
2
0
−2
0
50 100 150 200 250 300 350 400 450 500
t (ms)
Figure 31. Start−up, 8.0 V Version, VIN = 11.0 V
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11
NCP4641
APPLICATION INFORMATION
A typical application circuit for NCP4641 series is shown
in Figure 32.
connected to CE pin. Do not keep CE pin not connected or
between VCEH and VCEL voltage levels. Otherwise output
voltage would be unstable or indefinite and unexpected
would flow internally.
NCP4641x
VOUT
VIN
VOUT
VIN
CE
Thermal
C1
100 n
C2
100 n
As a power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
GND
Figure 32. Typical Application Schematic
The IC includes internal thermal shutdown circuit that
stops operation of regulator, if junction temperature is
higher than 150°C. After that, when junction temperature
decreases below 125°C, the operation of voltage regulator
would restart. While high power dissipation condition is, the
regulator starts and stops repeatedly and protects itself
against overheating.
Input Decoupling Capacitor (C1)
The device is stable without any input capacitance, but if
input line is long and has high impedance or if more stable
operation is needed, input capacitor C1 should be connected
as close as possible to the IC. Recommended range of input
capacitor value is 100 nF to 10 mF.
Output Decoupling Capacitor (C2)
PCB Layout
The NCP4641 can work stable without output capacitor,
but if faster response and higher stability reserve is needed,
output capacitor should be connected as close as possible to
the device. Recommended range of output capacitance is
100 nF to 10 mF. Larger values of output capacitance and
lower ESR improves dynamic parameters.
Pins number 2 and 4 of SOT89−5 package and pins
number 2, 4 and 5 of SOIC6−TL must be wired to the GND
plane while it is mounted on board. Make VIN and GND
lines sufficient. If their impedance is high, noise pickup or
unstable operation may result. Connect capacitors C1 and
C2 as close as possible to the IC, and make wiring as short
as possible.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The device is activated when high level is
ORDERING INFORMATION
Nominal Output
†
Voltage
Device
Description
Marking
Package
Shipping
NCP4641H030T1G
3.0 V
Enable High
M030
SOT89−5
(Pb−Free)
1000 / Tape & Reel
NCP4641H033T1G
NCP4641H050T1G
NCP4641H080T1G
3.3 V
5.0 V
8.0 V
Enable High
Enable High
Enable High
M033
M050
M080
SOT−89−5
(Pb−Free)
1000 / Tape & Reel
1000 / Tape & Reel
1000 / Tape & Reel
SOT89−5
(Pb−Free)
SOT89−5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*To order other package and voltage variants, please contact your ON Semiconductor sales representative.
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12
NCP4641
PACKAGE DIMENSIONS
SOIC6 (HSOP6)
CASE 751BR
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
b1
A
D
F
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b AND b1 DO NOT INCLUDE DAMBAR
PROTRUSION. ALLOWAQBLE PROTRUSION SHALL
BE 0.10 mm IN EXCESS OF MAXIMUM MATERIAL
CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.15 mm PER SIDE. DIMENSIONS D
AND E ARE DETERMINED AT DATUM F.
5. DATUMS A AND B ARE DETERMINED AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
6
4
A3
L2
E
H
1
3
L
SEATING
C
PLANE
4X b
DETAIL A
M
0.12
C A-B D
B
MILLIMETERS
DIM
A
A1
A3
b
b1
D
E
MIN
1.45
0.05
0.15
0.30
1.57
4.72
3.70
MAX
1.85
0.25
0.30
0.50
1.77
5.32
4.10
6X
D
e
0.10 C
A1
DETAIL A
SEATING
PLANE
C
A
3.81 BSC
e
H
L
L2
5.70
0.40
6.30
0.80
RECOMMENDED
SOLDERING FOOTPRINT*
0.25 BSC
3.81
PITCH
6X
1.05
6.40
1
2X
1.87
4X
0.60
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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13
NCP4641
PACKAGE DIMENSIONS
SOT−89, 5 LEAD
CASE 528AB
ISSUE O
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS INCLUDES LEAD FINISH.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEA-
SURED AT DATUM PLANE C.
E
H
MILLIMETERS
DIM MIN
MAX
1.60
0.52
0.57
0.50
4.60
1.80
2.60
1.60
4.45
1.50
1.20
1.35
1.05
0.60
A
b
1.40
0.32
0.37
0.30
4.40
1.40
2.40
1.40
4.25
1.10
0.80
0.95
0.65
0.20
1
b1
c
D
TOP VIEW
SIDE VIEW
D2
E
e
c
A
H
L
L2
L3
L4
L5
0.10
C
C
RECOMMENDED
e
b1
e
MOUNTING FOOTPRINT*
b
L2
4X
0.57
1.75
L
1
2
3
4
1.50
0.45
2.79
L5
4.65
5
L3
D2
BOTTOM VIEW
L4
1.65
1.30
1
2X
0.62
2X
1.50
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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