NCP502SN36T1G [ONSEMI]

80 mA CMOS Low Iq Low-Dropout Voltage; 80毫安CMOS低Iq低压差
NCP502SN36T1G
型号: NCP502SN36T1G
厂家: ONSEMI    ONSEMI
描述:

80 mA CMOS Low Iq Low-Dropout Voltage
80毫安CMOS低Iq低压差

线性稳压器IC 调节器 电源电路 光电二极管 输出元件
文件: 总9页 (文件大小:174K)
中文:  中文翻译
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NCP502, NCV502  
80 mA CMOS Low Iq,  
Low-Dropout Voltage  
Regulator  
The NCP502 series of fixed output linear regulators are designed for  
handheld communication equipment and portable battery powered  
applications which require low quiescent. The NCP502 series features  
an ultralow quiescent current of 40 A. Each device contains a  
voltage reference unit, an error amplifier, a PMOS power transistor,  
resistors for setting output voltage, current limit, and temperature limit  
protection circuits.  
The NCP502 has been designed to be used with low cost ceramic  
capacitors. The device is housed in the microminiature SC705 and  
TSOP5 surface mount packages. Standard voltage versions are 1.5 V,  
1.8 V, 2.5 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 3.3 V, 3.4 V, 3.5 V, 3.6 V,  
3.7 V and 5.0 V. Other voltages are available in 100 mV steps.  
http://onsemi.com  
MARKING  
DIAGRAM  
5
4
SC705  
SQ SUFFIX  
CASE 419A  
xxx MG  
5
G
3
2
1
1
1
5
TSOP5  
(SOT235, SC595)  
SN SUFFIX  
xxx AYWG  
5
G
Features  
CASE 483  
1
Low Quiescent Current of 40 A Typical  
Excellent Line and Load Regulation  
Low Output Voltage Option  
xxx = Specific Device Code  
A
Y
W
M
G
= Assembly Location  
= Year  
= Work Week  
= Date Code  
Output Voltage Accuracy of 2.0%  
Industrial Temperature Range of 40C to 85C,  
= PbFree Package  
NCV502, T = 40C to 125C  
A
(Note: Microdot may be in either location)  
NCP502: 1.3 V Enable Threshold High, 0.3 V Enable Threshold Low  
NCV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
PIN CONNECTIONS  
V
1
2
5
V
out  
in  
These are PbFree Devices  
GND  
Typical Applications  
Enable  
3
4
N/C  
Cellular Phones  
Battery Powered Consumer Products  
HandHeld Instruments  
Camcorders and Cameras  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
Battery or  
Unregulated  
Voltage  
Vout  
C2  
1
2
3
5
4
+
C1  
+
ON  
OFF  
This device contains 86 active transistors  
Figure 1. Typical Application Diagram  
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
May, 2013 Rev. 20  
NCP502/D  
 
NCP502, NCV502  
PIN FUNCTION DESCRIPTION  
Pin No.  
Pin Name  
Description  
1
2
3
V
Positive power supply input voltage.  
Power supply ground.  
in  
GND  
Enable  
This input is used to place the device into lowpower standby. When this input is pulled low, the device is  
disabled. If this function is not used, Enable should be connected to Vin.  
4
5
N/C  
No internal connection.  
V
out  
Regulated output voltage.  
MAXIMUM RATINGS  
Rating  
Symbol  
Value  
Unit  
V
Input Voltage  
Enable Voltage  
Output Voltage  
V
in  
12  
Enable  
0.3 to V +0.3  
V
in  
V
out  
0.3 to V +0.3  
V
in  
Power Dissipation and Thermal Characteristics  
Power Dissipation  
P
Internally Limited  
+150  
W
C  
C  
D
Operating Junction Temperature  
Operating Ambient Temperature  
T
J
NCP502  
NCV502  
T
A
40 to +85  
40 to +125  
Storage Temperature  
T
stg  
55 to +150  
C  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Latchup capability (85C) 100 mA DC with trigger voltage.  
THERMAL CHARACTERISTICS  
Rating  
Symbol  
Test Conditions  
Value  
Unit  
2
Thermal Characteristics, TSOP5 (Note 2)  
Thermal Resistance, JunctiontoAir (Note 3)  
R
1 oz Copper Thickness, 100 mm  
C/W  
JA  
205  
400  
Thermal Resistance, JunctiontoAmbient, SC705  
R
JA  
W
C/W  
NOTE: Single component mounted on a 80 x 80 x 15 mm FR4 PCB with stated copper head spreading area. Using the following  
boundary conditions as stated in EIA/JESD 511, 2, 3, 7, 12.  
2. True no connect. Printed circuit board traces are allowable.  
3. This device series contains ESD protection and exceeds the following tests:  
Human Body Model 2000 V per MILSTD883, Method 3015.  
Machine Model Method 200 V..  
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2
 
NCP502, NCV502  
ELECTRICAL CHARACTERISTICS  
(V = V  
+ 2.0 V, V  
= V , C = 1.0 F, C = 1.0 F, T = 25C, unless otherwise noted.)  
in  
out(nom.)  
enable  
in  
in  
out  
J
Characteristic  
Output Voltage (TA = 25C, I = 10 mA) V = V (nom.) +1.0 V  
Symbol  
Min  
Typ  
Max  
Unit  
V
out  
V
out  
in  
out  
1.5 V  
1.8 V  
2.5 V  
2.7 V  
2.8 V  
2.9 V  
3.0 V  
3.1 V  
3.3 V  
3.4 V  
3.5 V  
3.6 V  
3.7 V  
5.0 V  
1.455  
1.746  
2.425  
2.646  
2.744  
2.842  
2.94  
3.038  
3.234  
3.332  
3.43  
1.5  
1.8  
2.5  
2.7  
2.8  
2.9  
3.0  
3.1  
3.3  
3.4  
3.5  
3.6  
3.7  
5.0  
1.545  
1.854  
2.575  
2.754  
2.856  
2.958  
3.06  
3.162  
3.366  
3.468  
3.57  
3.528  
3.626  
4.900  
3.672  
3.774  
5.100  
Output Voltage (TA = T  
to T  
, I = 10 mA) V = V (nom.)  
V
out  
V
low  
high out  
in  
out  
1.5 V  
1.8 V  
2.5 V  
2.7 V  
2.8 V  
2.9 V  
3.0 V  
3.1 V  
3.3 V  
3.4 V  
3.5 V  
3.6 V  
3.7 V  
5.0 V  
1.455  
1.746  
2.425  
2.619  
2.716  
2.813  
2.910  
3.007  
3.201  
3.298  
3.43  
1.5  
1.8  
2.5  
2.7  
2.8  
2.9  
3.0  
3.1  
3.3  
3.4  
3.5  
3.6  
3.7  
5.0  
1.545  
1.854  
2.575  
2.781  
2.884  
2.987  
3.09  
3.193  
3.399  
3.502  
3.57  
3.528  
3.626  
4.900  
3.672  
3.774  
5.100  
Line Regulation (V = V + 1.0 V to 12 V, I = 10 mA)  
Reg  
0.4  
0.2  
3.0  
0.8  
mV/V  
mV/mA  
mA  
in  
out  
out  
line  
Load Regulation (I = 1.0 mA to 80 mA)  
Reg  
out  
load  
Output Current (V = (V at I = 80 mA) 3%)  
I
80  
180  
out  
out  
out  
o(nom.)  
Dropout Voltage (T = T  
to T  
, I = 80 mA, Measured at V  
V V  
in out  
mV  
A
low  
high out  
out  
3.0%)  
1.5 V1.7 V  
1.8 V2.4 V  
2.5 V2.6 V  
2.7 V2.9 V  
3.0 V4.0 V  
4.1 V5.0 V  
NCV502 5.0 V  
1500  
1300  
1000  
850  
850  
600  
1900  
1700  
1400  
1300  
1200  
900  
700  
1100  
Quiescent Current  
(Enable Input = 0 V)  
I
Q
A
0.1  
40  
1.0  
90  
(Enable Input = V , I = 1.0 mA to I  
)
in out  
o(nom.)  
Output Short Circuit Current (V = 0 V)  
I
90  
200  
55  
500  
mA  
dB  
out  
out(max)  
Ripple Rejection (f = 1.0 kHz, 15 mA)  
RR  
Output Voltage Noise (f = 100 Hz to 100 kHz)  
V
180  
Vrms  
V
n
Enable Input Threshold Voltage (NCP502)  
V
th(en)  
(Voltage Increasing, Output Turns On, Logic High)  
(Voltage Decreasing, Output Turns Off, Logic Low)  
1.3  
0.3  
Output Voltage Temperature Coefficient  
T
C
100  
ppm/C  
4. Maximum package power dissipation limits must be observed.  
T
*T  
A
JA  
J(max)  
PD +  
R
5. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.  
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3
NCP502, NCV502  
45  
45  
40  
35  
30  
25  
20  
15  
V
V
= 5.0 V  
= 3.0 V  
V
OUT  
= 3.0 V  
IN  
OUT  
42.5  
40  
37.5  
35  
10  
5
32.5  
30  
0
0
1
2
3
4
5
6
7
60  
40  
20  
0
20  
40  
60  
80 100  
V
IN  
, INPUT VOLTAGE (V)  
T, TEMPERATURE (C)  
Figure 2. Quiescent Current versus Input Voltage  
Figure 3. Quiescent Current versus Temperature  
6
10  
5
V
IN  
= 4.0 V to 5.0 V  
V
V
= 4.0 V  
IN  
ENABLE  
5
4
= 0 to 4.0 V  
0
60  
40  
20  
0
C
= 1.0 F  
= 30 mA  
OUT  
I
OUT  
3.0  
2.0  
I
= 30 mA  
OUT  
C
= 1.0 F  
OUT  
1.0  
0
20  
40  
0
10  
20 30 40 50 60  
70 80 90 100  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0  
t, TIME (ms)  
t, TIME (s)  
Figure 4. Line Transient Response  
Figure 5. Enable Response  
60  
30  
0
70  
60  
50  
40  
100  
50  
0
C
= 1.0 F  
= 3.0 V  
= 4.0 V  
OUT  
OUT  
V
V
IN  
V
V
= 4.5 V + 0.5 V  
PP  
IN  
= 3.0 V  
OUT  
30  
20  
I
= 30 mA  
OUT  
50  
C
= 1.0 F  
OUT  
100  
0
50 100 150 200 250 300 350 400 450  
0.01  
0.1  
1.0  
FREQUENCY (kHz)  
10  
100  
t, TIME (s)  
Figure 6. Load Transient Response  
Figure 7. Ripple Rejection/Frequency  
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4
NCP502, NCV502  
2.995  
V = 12 V  
IN  
I
= 10 mA  
OUT  
2.99  
2.985  
2.98  
V
IN  
= 4.0 V  
2.975  
2.97  
2.965  
2.96  
60  
40  
20  
0
20  
40  
60  
80  
100  
T, TEMPERATURE (C)  
Figure 8. Output Voltage versus Temperature  
3.5  
3
C
C
= 1.0 F  
IN  
= 1.0 F  
OUT  
V
= V  
ENABLE  
IN  
2.5  
2
1.5  
1
0.5  
0
0
1
2
3
4
5
6
V
IN  
, INPUT VOLTAGE (V)  
Figure 9. Output Voltage versus Input Voltage  
1200  
1000  
800  
80 mA LOAD  
600  
40 mA LOAD  
10 mA LOAD  
400  
200  
0
50 25  
0
25  
50  
75  
100  
125  
T, TEMPERATURE (C)  
Figure 10. Dropout Voltage versus Temperature  
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5
NCP502, NCV502  
DEFINITIONS  
Load Regulation  
Line Regulation  
The change in output voltage for a change in output  
current at a constant temperature.  
The change in output voltage for a change in input voltage.  
The measurement is made under conditions of low  
dissipation or by using pulse technique such that the average  
chip temperature is not significantly affected.  
Dropout Voltage  
The input/output differential at which the regulator output  
no longer maintains regulation against further reductions in  
input voltage. Measured when the output drops 3.0% below  
its nominal. The junction temperature, load current, and  
minimum input supply requirements affect the dropout level.  
Line Transient Response  
Typical over and undershoot response when input voltage  
is excited with a given slope.  
Thermal Protection  
Internal thermal shutdown circuitry is provided to protect  
the integrated circuit in the event that the maximum junction  
temperature is exceeded. When activated at typically 160C,  
the regulator turns off. This feature is provided to prevent  
failures from accidental overheating.  
Maximum Power Dissipation  
The maximum total dissipation for which the regulator  
will operate within its specifications.  
Quiescent Current  
The quiescent current is the current which flows through  
the ground when the LDO operates without a load on its  
output: internal IC operation, bias, etc. When the LDO  
becomes loaded, this term is called the Ground current. It is  
actually the difference between the input current (measured  
through the LDO input pin) and the output current.  
Maximum Package Power Dissipation  
The maximum power package dissipation is the power  
dissipation level at which the junction temperature reaches  
its maximum operating value, i.e. 125C. Depending on the  
ambient power dissipation and thus the maximum available  
output current.  
APPLICATIONS INFORMATION  
A typical application circuit for the NCP502 series is  
shown in Figure 1, front page.  
threshold are covered in the electrical specification section  
of this data sheet. If the enable is not used then the pin should  
be connected to V .  
in  
Input Decoupling (C1)  
A 1.0 F capacitor either ceramic or tantalum is  
recommended and should be connected close to the NCP502  
package. Higher values and lower ESR will improve the  
overall line transient response. If large line or load transients  
are not expected, then it is possible to operate the regulator  
without the use of a capacitor.  
Hints  
Please be sure the Vin and GND lines are sufficiently  
wide. When the impedance of these lines is high, there is a  
chance to pick up noise or cause the regulator to  
malfunction.  
Set external components, especially the output capacitor,  
as close as possible to the circuit, and make leads as short as  
possible.  
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K  
Output Decoupling (C2)  
The NCP502 is a stable regulator and does not require any  
specific Equivalent Series Resistance (ESR) or a minimum  
output current. Capacitors exhibiting ESRs ranging from a  
few mup to 5.0 can thus safely be used. The minimum  
decoupling value is 1.0 F and can be augmented to fulfill  
stringent load transient requirements. The regulator accepts  
ceramic chip capacitors as well as tantalum devices. Larger  
values improve noise rejection and load regulation transient  
response.  
Thermal  
As power across the NCP502 increases, it might become  
necessary to provide some thermal relief. The maximum  
power dissipation supported by the device is dependent  
upon board design and layout. Mounting pad configuration  
on the PCB, the board material and also the ambient  
temperature effect the rate of temperature rise for the part.  
This is stating that when the NCP502 has good thermal  
conductivity through the PCB, the junction temperature will  
be relatively low with high power dissipation applications.  
TDK capacitor: C2012X5R1C105K, C1608X5R1A105K,  
or C3216X7R1C105K  
Enable Operation  
The enable pin will turn on the regulator when pulled high  
and turn off the regulator when pulled low. These limits of  
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6
NCP502, NCV502  
The maximum dissipation the package can handle is  
given by:  
ƪ
ƫ
[
]
P
+ V * I  
(I ) ) V * V  
in  
* I  
tot  
in gnd out  
out out  
or  
T
*T  
A
JA  
J(max)  
PD +  
)
*
I
P
V
tot  
gnd  
out out  
) I  
R
V
+
inMAX  
I
out  
If junction temperature is not allowed above the  
maximum 125C, then the NCP502 can dissipate up to  
250 mW @ 25C.  
The power dissipated by the NCP502 can be calculated  
from the following equation:  
If an 80 mA output current is needed then the ground  
current from the data sheet is 40 A. For an NCP502 (3.0 V),  
the maximum input voltage will then be 6.12 V.  
ORDERING INFORMATION  
Nominal  
Output Voltage  
Device  
NCP502SQ15T2G  
NCP502SQ18T1G  
NCP502SQ18T2G  
NCP502SQ25T2G  
NCP502SQ27T2G  
NCP502SQ28T2G  
NCP502SQ29T2G  
NCP502SQ30T2G  
NCP502SQ31T2G  
NCP502SQ33T2G  
NCP502SQ34T2G  
NCP502SQ35T2G  
NCP502SQ36T2G  
NCP502SQ37T2G  
NCP502SQ50T2G  
NCP502SN28T1G  
NCP502SN29T1G  
NCP502SN30T1G  
NCP502SN31T1G  
NCP502SN33T1G  
NCP502SN34T1G  
NCP502SN35T1G  
NCP502SN36T1G  
NCP502SN37T1G  
NCP502SN50T1G  
NCV502SN50T1G*  
Marking  
LCC  
Package  
Shipping  
1.5  
1.8  
LCD  
2.5  
2.7  
2.8  
2.9  
3.0  
3.1  
3.3  
3.4  
3.5  
3.6  
3.7  
5.0  
2.8  
2.9  
3.0  
3.1  
3.3  
3.4  
3.5  
3.6  
3.7  
5.0  
5.0  
LCE  
LCF  
LCG  
LJI  
SC705  
(PbFree)  
LCH  
LJJ  
3000 / Tape & Reel  
LCI  
LJK  
LGO  
LIU  
LJQ  
LCJ  
LKD  
LJN  
LKE  
LJO  
LKF  
LJK  
LJ6  
TSOP5  
(PbFree)  
3000 / Tape & Reel  
AC4  
LKC  
LKG  
LKG  
Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP  
Capable.  
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7
NCP502, NCV502  
PACKAGE DIMENSIONS  
SC88A (SC705/SOT353)  
SQ SUFFIX  
CASE 419A02  
ISSUE L  
A
NOTES:  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
G
2. CONTROLLING DIMENSION: INCH.  
3. 419A01 OBSOLETE. NEW STANDARD  
419A02.  
4. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD FLASH, PROTRUSIONS, OR GATE  
BURRS.  
5
4
3
B−  
S
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
1.80  
1.15  
0.80  
0.10  
MAX  
2.20  
1.35  
1.10  
0.30  
1
2
A
B
C
D
G
H
J
0.071  
0.045  
0.031  
0.004  
0.087  
0.053  
0.043  
0.012  
0.026 BSC  
0.65 BSC  
M
M
B
D 5 PL  
0.2 (0.008)  
---  
0.004  
0.004  
0.004  
0.010  
0.012  
---  
0.10  
0.10  
0.10  
0.25  
0.30  
K
N
S
N
0.008 REF  
0.20 REF  
0.079  
0.087  
2.00  
2.20  
J
C
K
H
SOLDER FOOTPRINT  
0.50  
0.0197  
0.65  
0.025  
0.65  
0.025  
0.40  
0.0157  
1.9  
0.0748  
mm  
inches  
ǒ
Ǔ
SCALE 20:1  
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NCP502, NCV502  
PACKAGE DIMENSIONS  
TSOP5  
SN SUFFIX  
CASE 48302  
ISSUE K  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
NOTE 5  
5X  
D
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH  
THICKNESS. MINIMUM LEAD THICKNESS IS THE  
MINIMUM THICKNESS OF BASE MATERIAL.  
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT  
EXCEED 0.15 PER SIDE. DIMENSION A.  
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL  
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.  
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2  
FROM BODY.  
0.20 C A B  
2X  
0.10  
T
M
5
4
3
2X  
0.20  
T
B
S
1
2
K
B
A
DETAIL Z  
G
A
MILLIMETERS  
TOP VIEW  
DIM  
A
B
MIN  
3.00 BSC  
1.50 BSC  
MAX  
DETAIL Z  
C
D
0.90  
0.25  
1.10  
0.50  
J
G
H
J
K
M
S
0.95 BSC  
C
0.01  
0.10  
0.20  
0
0.10  
0.26  
0.60  
10  
3.00  
0.05  
H
SEATING  
PLANE  
END VIEW  
C
_
_
SIDE VIEW  
2.50  
SOLDERING FOOTPRINT*  
1.9  
0.074  
0.95  
0.037  
2.4  
0.094  
1.0  
0.039  
0.7  
0.028  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
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NCP502/D  

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