NCV4274ADS85R4G [ONSEMI]
400 mA 2% and 4%Voltage Regulator Family;
| 型号： | NCV4274ADS85R4G |
| 厂家： | 
ONSEMI |
| 描述： | 400 mA 2% and 4%Voltage Regulator Family 输出元件 调节器 |
| 文件： | 总18页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV4274, NCV4274A
400 mA 2% and 4%Voltage
Regulator Family
Description
The NCV4274 and NCV4274A is a precision micro−power voltage
regulator with an output current capability of 400 mA available in the
DPAK, D2PAK and SOT−223 packages.
http://onsemi.com
The output voltage is accurate within 2.0% or 4.0% depending on
the version with a maximum dropout voltage of 0.5 V with an input up
to 40 V. Low quiescent current is a feature drawing only 150 mA with a
1 mA load. This part is ideal for automotive and all battery operated
microprocessor equipment.
The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments.
MARKING DIAGRAMS
4
74X−xxG
1
Input
ALYWW
2, 4 Ground
3
x
DPAK
DT SUFFIX
CASE 369C
Output
2
4
1
3
Features
• 2.5, 3.3 V, 5.0 V, 8.5 V, 2.0% Output Options
• 2.5, 3.3 V, 5.0 V, 4.0% Output Options
• Low 150 mA Quiescent Current at 1 mA load current
• 400 mA Output Current Capability
• Fault Protection
1
Input
NC
2, 4 Ground
3 Output
V4274X−xx
AWLYWWG
D2PAK
DS SUFFIX
CASE 418AF
• +60 V Peak Transient Voltage with Respect to GND
S −42 V Reverse Voltage
S Short Circuit
1
2
3
S Thermal Overload
4
• Very Low Dropout Voltage
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These are Pb−Free Devices
AYW
74X−xxG
G
1
2, 4 Ground
Output
Input
SOT−223
ST SUFFIX
CASE 318E
3
1
2
3
X
xx
A
= A or blank
= Voltage Ratings
= Assembly Location
L, WL = Wafer Lot
Y
= Year
WW, W = Work Week
G, G
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
April, 2013 − Rev. 15
NCV4274/D
NCV4274, NCV4274A
I
Q
Current Limit and
Saturation Sense
Bandgap
Refernece
−
+
Thermal
Shutdown
GND
Figure 1. Block Diagram
Pin Definitions and Functions
Pin No.
Symbol
Function
1
2,4
3
I
Input; Bypass directly at the IC a ceramic capacitor to GND.
Ground
GND
Q
Output; Bypass with a capacitor to GND.
1. DPAK 3LD package code 6025
2. D2PAK 3LD package code 6083
ABSOLUTE MAXIMUM RATINGS
Pin Symbol, Parameter
Symbol
Condition
Min
Max
Unit
V
I, Input−to−Regulator
Voltage
Current
V
I
−42
45
I
I
Internally
Limited
Internally
Limited
I, Input peak Transient Voltage to Regulator with Respect
V
60
V
V
I
to GND
Q, Regulated Output
Voltage
Current
V
Q
−1.0
40
VQ = V
I
I
Q
Internally
Limited
Internally
Limited
GND, Ground Current
I
−
100
mA
GND
Junction Temperature
Storage Temperature
T
Stg
−
−50
150
150
°C
°C
J
T
ESD Capability, Human Body Model
ESD Capability, Machine Model
ESD
4
200
1
kV
V
HB
ESD
MM
ESD Capability, Charged Device Model
ESD
kV
CDM
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model
http://onsemi.com
2
NCV4274, NCV4274A
OPERATING RANGE
Parameter
Symbol
Condition
Min
9.0
5.5
4.5
−40
Max
40
Unit
V
Input Voltage (8.5 V Version)
Input Voltage (5.0 V Version)
Input Voltage (3.3 V, and 2.5 V Version)
Junction Temperature
V
V
V
I
I
40
V
40
V
I
T
J
150
°C
THERMAL RESISTANCE
Parameter
Symbol
Condition
Min
Max
Unit
Junction−to−Ambient
DPAK
R
−
70
(Note 4)
°C/W
thja
Junction−to−Ambient
D2PAK
R
−
60
(Note 4)
°C/W
thja
Junction−to−Case
Junction−to−Case
Junction−to−Ta b
DPAK
D2PAK
R
R
−
−
−
4
3
°C/W
°C/W
°C/W
thjc
thjc
SOT−223
Y−JLX,
Y
14.5
(Note 5)
LX
Junction−to−Ambient
SOT−223
R
, q
JA JA
−
169.7
(Note 5)
°C/W
q
4. Soldered in, minimal footprint, FR4
2
5. 1 oz copper, 5 mm copper area, FR4
LEAD FREE SOLDERING TEMPERATURE AND MSL
Parameter
Symbol
Condition
Min
Max
Unit
Lead Free Soldering, (Note 6)
T
60s − 150s Above 217s
°C
sld
Reflow (SMD styles only),
Moisture Sensitivity Level
Pb−Free
40s Max at Peak
−
265 pk
MSL
DPAK and D2PAK
SOT−223
1
3
−
−
6. Per IPC/JEDEC J−STD−020C
http://onsemi.com
3
NCV4274, NCV4274A
ELECTRICAL CHARACTERISTICS
−40°C < T < 150°C; V = 13.5 V unless otherwise noted.
J
I
Min Typ
Max Min Typ
Max
NCV4274A
NCV4274
Parameter
Symbol
Test Conditions
Unit
REGULATOR
Output Voltage (8.5 V Version)
Output Voltage (8.5 V Version)
Output Voltage (5.0 V Version)
Output Voltage (5.0 V Version)
Output Voltage (3.3 V Version)
Output Voltage (3.3 V Version)
Output Voltage (2.5 V Version)
Output Voltage (2.5 V Version)
V
V
V
V
V
V
V
V
5 mA < I < 200 mA
8.33 8.5
8.33 8.5
8.67
8.67
5.1
−
−
−
−
−
−
V
V
Q
Q
Q
Q
Q
Q
Q
Q
Q
9.5 V < V < 40 V
I
5 mA < I < 400 mA
Q
9.5 V < V < 28 V
I
5 mA < I < 400 mA
4.9
4.9
5.0
5.0
4.8
4.8
5.0
5.0
5.2
5.2
3.43
3.43
2.6
2.6
−
V
Q
6 V < V < 28 V
I
5 mA < I < 200 mA
5.1
V
Q
6 V < V < 40 V
I
5 mA < I < 400 mA
3.23 3.3
3.23 3.3
2.45 2.5
2.45 2.5
400 600
3.37 3.17 3.3
3.37 3.17 3.3
V
Q
4.5 V < V < 28 V
I
5 mA < I < 200 mA
V
Q
4.5 V < V < 40 V
I
5 mA < I < 400 mA
2.55
2.55
−
2.4
2.4
2.5
2.5
V
Q
4.5 V < V < 28 V
I
5 mA < I < 200 mA
V
Q
4.5 V < V < 40 V
I
Current Limit
I
Q
−
400 600
mA
Quiescent Current
I
q
I
Q
I
Q
I
Q
= 1 mA
V
= 8.5 V
−
−
−
−
195
190
145
140
250
250
250
250
−
−
−
−
−
−
mA
mA
mA
mA
Q
Q
Q
Q
V
V
V
= 5.0 V
= 3.3 V
= 2.5 V
190
145
140
250
250
250
= 250 mA
V
= 8.5 V
= 5.0 V
= 3.3 V
= 2.5 V
−
−
−
−
10
10
13
12
15
15
20
20
−
−
−
−
−
−
mA
mA
mA
mA
Q
Q
Q
Q
V
V
V
10
13
12
15
20
20
= 400 mA
V
= 8.5 V
= 5.0 V
= 3.3 V
= 2.5 V
−
−
−
−
20
20
30
28
35
35
45
45
−
−
−
−
−
−
mA
mA
mA
mA
Q
Q
Q
Q
V
V
V
20
30
28
35
45
45
Dropout Voltage
V
DR
I
= 250 mA,
Q
V
= V − V
DR
I Q
8.5 V Version
5.0 V Version
3.3 V Version
2.5 V Version
V = 8.5 V
−
−
−
−
250
250
−
500
500
1.27
2.05
−
−
−
−
−
250
−
−
mV
mV
V
I
I
I
I
V = 5.0 V
500
1.33
2.1
V = 4.5 V
V = 4.5 V
−
−
V
Load Regulation
Line Regulation
DV
DV
I
= 5 mA to 400 mA
−
−
7
20
25
−
−
7
30
25
mV
mV
Q
Q
DV = 12 V to 32 V
10
10
Q
I
I
Q
= 5 mA
Power Supply Ripple Rejection
P
SRR
ƒr = 100 Hz,
V = 0.5 V
−
60
−
−
60
−
dB
r
PP
Temperature output voltage drift
DV /DT
−
0.5
−
−
0.5
−
mV/K
Q
Thermal Shutdown Temperature*
T
SD
I
Q
= 5 mA
165
−
210
165
−
210
°C
*Guaranteed by design, not tested in production
http://onsemi.com
4
NCV4274, NCV4274A
V
I
I
Q
I
V
V
V
Q
I
I
Q
Q
I
1
3
1
3
NCV4274
NCV4274A
NCV4274
NCV4274A
C
C
C
C
C *
Q
11
1.0 mF
12
Q
I
Input
Output
100 nF
10 mF
or
22 mF
100 nF
V
Q
R
load
V
I
2,4
2,4
GND
GND
I
GND
*C = 10 mF for V ≤ 3.3 V
Q
Q
Q
C
= 22 mF for V ≥ 5 V
Q
Figure 2. Measuring Circuit
Figure 3. Application Circuit
TYPICAL CHARACTERISTIC CURVES
100
10
1000
V = 13.5 V
I
V = 13.5 V
I
100
10
Maximum ESR
= 10 mF − 100 mF
C
OUT
Maximum ESR
= 1 mF − 100 mF
1
C
OUT
Stable Region
0.1
0.01
1.0
0.1
Stable Region
Minimum ESR
= 1 mF
C
OUT
0
50
100
150 200 250
300
350
0
5
20 60 100 140 180 220
300 340 380 420
400
260
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 4. ESR Characterization − 3.3 V, 5 V and
Figure 5. ESR Characterization − 2.5 V Version
8.5 V Versions
http://onsemi.com
5
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 8.5 V Version
8.7
8.6
8.5
8.4
8.3
10
R = 33 W
V = 13.5 V
R = 1.7 kW
L
L
I
9
T = 25°C
J
8
7
6
5
4
3
2
1
0
−40
0
40
80
120
160
0
2
4
6
8
10
T (°C)
J
V (V)
I
Figure 6. Output Voltage vs. Junction Temperature
Figure 7. Output Voltage vs. Input Voltage
1000
35
30
25
20
15
10
5
T = 25°C
J
T = 25°C
V = 13.5 V
I
J
V
Q
= 0 V
800
600
400
200
0
0
0
10
20
30
40
50
0
100
200
I
300
400
500
(mA)
V (V)
I
Q
Figure 8. Output Current vs. Input Voltage
Figure 9. Current Consumption vs. Output
Current (High Load)
1.6
1.4
1.2
1
600
500
400
300
200
100
0
T = 25°C
V = 13.5 V
I
V = 13.5 V
I
J
T = 125°C
J
0.8
0.6
0.4
0.2
0
T = 25°C
J
0
100
200
(mA)
300
400
0
10
20
30
40
50
60
I
Q
I
Q
(mA)
Figure 10. Current Consumption vs. Output
Current (Low Load)
Figure 11. Drop Voltage vs. Output Current
http://onsemi.com
6
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 8.5 V Version
50
40
30
20
10
0
6
R = 6.8 kW
R = 33 W
T = 25°C
J
L
L
4
2
T = 25°C
J
0
−2
−4
−6
−8
−10
−12
−14
−16
0
10
20
30
40
50
−50
−30
−10
10
30
50
V (V)
I
V (V)
I
Figure 12. Current Consumption vs. Input Voltage
Figure 13. Input Current vs. Input Voltage
http://onsemi.com
7
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 5.0 V Version
5.2
5.1
5.0
4.9
4.8
6
V = 13.5 V
R = 1 kW
L
R = 20 W
T = 25°C
J
I
L
5
4
3
2
1
0
−40
0
40
80
120
160
0
2
4
6
8
10
T (°C)
J
V (V)
I
Figure 14. Output Voltage vs. Junction
Temperature
Figure 15. Output Voltage vs. Input Voltage
800
600
400
200
0
60
50
40
30
20
10
0
T = 25°C
V = 13.5 V
I
T = 25°C
J
J
V
Q
= 0 V
0
100
200
300
(mA)
400
500
600
0
10
20
30
40
50
I
V (V)
I
Q
Figure 16. Output Current vs. Input Voltage
Figure 17. Current Consumption vs. Output
Current (High Load)
1.6
1.4
1.2
1
600
500
400
300
200
100
0
T = 25°C
V = 13.5 V
I
J
T = 125°C
J
0.8
0.6
0.4
0.2
0
T = 25°C
J
0
100
200
300
400
0
10
20
30
40
50
60
I
Q
(mA)
I
Q
(mA)
Figure 18. Current Consumption vs. Output
Current (Low Load)
Figure 19. Drop Voltage vs. Output Current
http://onsemi.com
8
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 5.0 V Version
40
30
20
10
0
6
R = 6.8 kW
4
2
L
R = 20 W
T = 25°C
J
L
T = 25°C
J
0
−2
−4
−6
−8
−10
−12
−14
−16
0
10
20
30
40
50
−50
−25
0
25
50
V (V)
I
V (V)
I
Figure 20. Current Consumption vs. Input Voltage
Figure 21. Input Current vs. Input Voltage
http://onsemi.com
9
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 3.3 V Version
3.5
6
V = 6 V
R = 1 kW
L
R = 20 W
T = 25°C
J
I
L
5
3.4
3.3
3.2
3.1
4
3
2
1
0
3.0
2.9
0
1
2
3
4
5
6
−40
0
40
80
120
160
T (°C)
J
V (V)
I
Figure 22. Output Voltage vs. Junction
Temperature
Figure 23. Output Voltage vs. Input Voltage
800
60
50
40
30
20
T = 25°C
T = 25°C
J
J
V = 13.5 V
I
V
Q
= 0 V
600
400
200
0
10
0
0
10
20
30
40
50
0
100
200
300
400
500
600
I
Q
(mA)
V (V)
I
Figure 24. Output Current vs. Input Voltage
Figure 25. Current Consumption vs. Output
Current (High Load)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
1.26
1.24
1.22
1.20
1.18
T = 25°C
V = 13.5 V
I
J
T = 125°C
J
T = 25°C
J
V
DR
= V
− V
I(min) Q
1.16
1.14
0.2
0
0
100
200
(mA)
300
400
0
10
20
30
40
50
60
I
Q
I
Q
(mA)
Figure 26. Current Consumption vs. Output
Current (Low Load)
Figure 27. Voltage Drop vs. Output Current
http://onsemi.com
10
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 3.3 V Version
7
6
5
4
3
2
4
2
0
R = 20 W
T = 25°C
J
L
−2
−4
−6
−8
−10
−12
−14
−16
R = 3.3 kW
L
1
0
T = 25°C
J
0
10
20
30
40
50
−50
−25
0
25
50
V (V)
I
V (V)
I
Figure 28. Current Consumption vs. Input Voltage
Figure 29. Input Current vs. Input Voltage
http://onsemi.com
11
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 2.5 V Version
2.7
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V = 6 V
R = 1 kW
L
I
2.6
2.5
2.4
2.3
2.2
2.1
0.5
0
0
1
2
3
4
5
6
−40
0
40
80
120
160
T (°C)
J
V (V)
I
Figure 30. Output Voltage vs. Junction
Temperature
Figure 31. Output Voltage vs. Input Voltage
800
60
50
40
30
20
T = 25°C
J
T = 25°C
J
V
Q
= 0 V
V = 13.5 V
I
600
400
200
0
10
0
0
10
20
30
40
50
0
100
200
300
400
500
600
I
Q
(mA)
V (V)
I
Figure 32. Output Current vs. Input Voltage
Figure 33. Current Consumption vs. Output
Current (High Load)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
2.05
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
T = 25°C
V = 13.5 V
I
J
T = 125°C
J
T = 25°C
J
V
DR
= V − V
I(min) Q
0.2
0
1.96
1.95
0
100
200
300
400
0
10
20
30
40
50
60
I
Q
(mA)
I
Q
(mA)
Figure 34. Current Consumption vs. Output
Current (Low Load)
Figure 35. Voltage Drop vs. Output Current
http://onsemi.com
12
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 2.5 V Version
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
2
R = 20 W
T = 25°C
J
L
0
−2
−4
−6
−8
−10
R = 3.3 kW
T = 25°C
J
L
−12
−14
0.5
0
0
10
20
30
40
50
−50
−25
0
25
50
V (V)
I
V (V)
I
Figure 36. Current Consumption vs. Input Voltage
Figure 37. Input Current vs. Input Voltage
http://onsemi.com
13
NCV4274, NCV4274A
APPLICATION DESCRIPTION
Output Regulator
Once the value of P
is known, the maximum
D(max)
The output is controlled by a precision trimmed reference
and error amplifier. The PNP output has saturation control
for regulation while the input voltage is low, preventing over
saturation. Current limit and voltage monitors complement
the regulator design to give safe operating signals to the
processor and control circuits.
permissible value of R
can be calculated:
qJA
ǒ
Ǔ
150 C * TA
(eq. 2)
PqJA
+
PD
The value of R
can then be compared with those in the
qJA
package section of the data sheet. Those packages with
’s less than the calculated value in Equation 2 will keep
R
qJA
Stability Considerations
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heat sink will be required. The current
flow and voltages are shown in the Measurement Circuit
Diagram.
The input capacitor C in Figure 2 is necessary for
I1
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 W in series
with C
I2.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
:
qJA
R
qJA + RqJC ) RqCS ) RqSA
(eq. 3)
Where:
The value for the output capacitor C shown in Figure 2
Q
R
qJC
R
qCS
R
qSA
R
qJC
= the junction−to−case thermal resistance,
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed at
= the case−to−heat sink thermal resistance, and
= the heat sink−to−ambient thermal resistance.
appears in the package section of the data sheet.
values C w 2.2 mF and an ESR v 2.5 W within the
Q
operating temperature range. Actual limits are shown in a
graph in the Typical Performance Characteristics section.
Like R , it too is a function of package type. R
and
qJA
qCS
R
are functions of the package type, heat sink and the
qSA
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and
heat sinking are discussed in the ON Semiconductor
application note AN1040/D, available on the
ON Semiconductor Website.
P
D(max) + [VI(max) * VQ(min)]IQ(max) ) VI(max)Iq
(eq. 1)
Where:
V
V
I
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the application,
I(max)
Q(min)
Q(max)
and
I is the quiescent current the regulator consumes at I
.
Q(max)
q
http://onsemi.com
14
NCV4274, NCV4274A
ORDERING INFORMATION4
Device
†
Output Voltage Accuracy
Output Voltage
Package
Shipping
NCV4274ADS85R4G
2%
4%
4%
4%
2%
2%
2%
4%
4%
2%
2%
2%
4%
2%
8.5 V
D2PAK
800 / Tape & Reel
50 Units / Rail
(Pb−Free)
NCV4274DS50G
5.0 V
5.0 V
5.0 V
5.0 V
5.0 V
5.0 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
2.5 V
2.5 V
D2PAK
(Pb−Free)
NCV4274DS50R4G
NCV4274DT50RKG
NCV4274ADS50G
NCV4274ADS50R4G
NCV4274ADT50RKG
NCV4274ST33T3G
NCV4274DT33RKG
NCV4274AST33T3G
NCV4274ADT33RKG
NCV4274ADS33R4G
NCV4274ST25T3G
NCV4274AST25T3G
D2PAK
(Pb−Free)
800 / Tape & Reel
2500 / Tape & Reel
50 Units / Rail
DPAK
(Pb−Free)
D2PAK
(Pb−Free)
D2PAK
(Pb−Free)
800 / Tape & Reel
2500 / Tape & Reel
4000 / Tape & Reel
2500 / Tape & Reel
4000 / Tape & Reel
2500 / Tape & Reel
800 / Tape & Reel
4000 / Tape & Reel
4000 / Tape & Reel
DPAK
(Pb−Free)
SOT−223
(Pb−Free)
DPAK
(Pb−Free)
SOT−223
(Pb−Free)
DPAK
(Pb−Free)
D2PAK
(Pb−Free)
SOT−223
(Pb−Free)
SOT−223
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
15
NCV4274, NCV4274A
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE N
D
b1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
MILLIMETERS
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
−−−
4
2
DIM
A
A1
b
b1
c
D
E
e
e1
L
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
0.20
1.50
6.70
0°
NOM
1.63
0.06
0.75
3.06
0.29
6.50
3.50
2.30
0.94
−−−
1.75
7.00
−
MAX
1.75
0.10
0.89
3.20
0.35
6.70
3.70
2.40
1.05
−−−
2.00
7.30
10°
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.008
0.060
0.264
0°
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
−−−
H
E
E
1
3
b
e1
e
L1
0.069
0.276
−
0.078
0.287
10°
C
q
H
E
A
q
0.08 (0003)
A1
L
L1
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
6.3
0.248
2.3
0.091
2.3
0.091
2.0
0.079
mm
inches
1.5
0.059
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
16
NCV4274, NCV4274A
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2 0.030 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 905 CW
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
6.20
3.00
0.244
0.118
2.58
0.102
5.80
1.60
0.063
6.17
0.228
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
17
NCV4274, NCV4274A
PACKAGE DIMENSIONS
D2PAK
CASE 418AF
ISSUE B
NOTES:
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCHES.
5. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
6. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
7. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
T
T
TERMINAL 4
C
C
A
K
U
OPTIONAL
CHAMFER
OPTIONAL
CHAMFER
ED
ES
S
V
B
DETAIL C
DETAIL C
H
1
2
3
8. SINGLE GAUGE DESIGN WILL BE SHIPPED
AFTER FPCN EXPIRATION IN OCTOBER 2011.
J
INCHES
DIM MIN MAX
MILLIMETERS
MIN MAX
9.804 10.236
F
SIDE VIEW
BOTTOM VIEW
SIDE VIEW
A
B
C
D
0.386
0.356
0.170
0.026
0.403
0.368
0.180
0.036
0.055
0.026
SINGLE GAUGE
CONSTRUCTION
DUAL GAUGE
G
9.042
4.318
0.660
1.143
0.457
9.347
4.572
0.914
1.397
0.660
CONSTRUCTION
3X
D
M
0.010 (0.254)
T
TOP VIEW
ED 0.045
ES 0.018
F
G
H
J
0.051 REF
0.100 BSC
0.539 0.579 13.691 14.707
0.125 MAX
0.050 REF
1.295 REF
2.540 BSC
3.175 MAX
1.270 REF
T
N
K
L
M
L
0.000
0.088
0.018
0.058
0.010
0.102
0.026
0.078
0.000
0.254
2.591
0.660
1.981
M
N
P
R
S
U
V
2.235
0.457
1.473
SEATING
PLANE
P
5_REF
5_REF
BOTTOM VIEW
R
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
DETAIL C
OPTIONAL CONSTRUCTIONS
SOLDERING FOOTPRINT*
10.490
8.380
16.155
3.35X04
3X
1.016
2.540
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCV4274/D
相关型号：
©2020 ICPDF网 联系我们和版权申明