NCV75215DB001R2G [ONSEMI]
Ultrasonic Parking Distance Measurement ASSP;
| 型号： | NCV75215DB001R2G |
| 厂家： | 
ONSEMI |
| 描述： | Ultrasonic Parking Distance Measurement ASSP |
| 文件： | 总44页 (文件大小：362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV75215
Ultrasonic Parking Distance
Measurement ASSP
General Description
The NCV75215 ASSP is intended to operate with a piezoelectric
ultrasonic transducer to provide time-of-flight measurement of an
obstacle distance during vehicle parking. The high-sensitivity,
low-noise operation allows detection from 0.25 m up to 4.5 m for
a standard 75 mm pole. Actual minimum distance is determined by the
length of reverberations. Under ideal conditions, with perfectly tuned
and matched external circuitry, a minimum distance of 0.2 m is
achievable. Actual detection range depends on a piezoelectric
ultrasonic transducer and external analog parts.
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16
1
TSSOP−16
CASE 948F
The device drives the ultrasonic transducer with a programmable
frequency via a transformer. The received echo is amplified and
converted to a digital signal, filtered, detected and the magnitude is
compared to a time-dependent threshold which is stored in an internal
RAM. Distance to the obstacle is determined by the time measured
from a transmission burst to echo recognition.
MARKING DIAGRAM
In accordance with:
A bidirectional I/O Line is used to communicate with a master
(ECU). The master issues I/O Line commands to the NCV75215 and
data are reported back via the same line.
US:
7620021 Mark Specifications − for ceramic,
plastic and tape−automated bond packages
Features
Europe:
16020 Standard Marking Specification
• Measurement Distance Range from 0.25 m to 4.5 m (depends on
External Parts)
• Acoustic Noise Monitoring
PIN CONNECTIONS
• Transducer Resonant Period Measurement
1
2
3
4
5
6
7
8
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RXN
RXP
TSTEN
TST0
TST1
TST2
TST3
GNDIO
IO
• Diagnosis of Transducer Performance
• Junction Temperature Monitoring and Thermal Shutdown
• Transducer Center Frequency Range from 35 to 90 kHz
• Direct and Indirect Measurement Modes
GNDA
N.C.
NCV75215
GND
DRVA
DRVC
DRVB
• EEPROM Memory for Configuration Setting and User Data
• Rx Gain Adjustable in 0.5 dB Steps in the Range from 50 to 110 dB
• Time-dependent Threshold Values for the Sensitivity Control
• Dynamic (Time-dependent) Gain Control
• Tx Current Range Adjustable from 50 mA to 350 mA
• Programmable Ultrasonic Burst Length
• On-chip Bidirectional I/O Line
• Small TSSOP16 Package
VSUP
ORDERING INFORMATION
†
Device
NCV75215DB001R2G* TSSOP−16 4000 / Tape
(Pb−Free) & Reel
Package
Shipping
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable*
• These are Pb-free Devices
Typical Applications
• Automotive Park Assist
• Ultrasonic Distance Measurements
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
February, 2017 − Rev. 0
NCV75215/D
NCV75215
Figure 1. Application Schematic Diagram
Table 1. RECOMMENDED EXTERNAL COMPONENTS
Name
Description
Typical Value
Units
Rating
Tolerance
Comment
R1
Resonator Damping
Optimal value
kW
5 %
Value depends on used transducer &
transformer
R2
R3
Battery Filter Resistor
I/O Line Protection
100
470
W
W
Note ⇒
Note ⇒
5 %
5 %
Power rating according to required EMC
robustness
It may be omitted but system ESD robust-
ness is reduced
Power rating according to required EMC
robustness
R4
R5
I/O Line Pull Up
10
47
kW
100 mW
5 %
5 %
Optional. It is not used if I/O Line internal
pull-up resistor is enabled
(see Config RAM item IO_PUP_ENA)
I/O Line High Frequency
Protection
W
Note ⇒
Optional
It improves high frequency EMC robust-
ness
Power rating according to required EMC
robustness
RF1
RF2
Input EMC Filter Resistor
(Note 1)
100
W
Note ⇒
5 %
Optional
It improves high frequency EMC
robustness
Power rating according to required EMC
robustness
C1
C2
C3
Receiver Input Coupling
Receiver Input Coupling
680
680
pF
pF
pF
100 V
100 V
100 V
10 %
10 %
5 %
Serial and Parallel
Resonances Matching
optimal
value
Value depends on used transducer &
transformer
CF1
Input EMC Filter Capacitor
(Note 1)
10
pF
50 V
10 %
Optional
It improves high frequency EMC
robustness
C6
C7
Battery Filter Capacitor
100
22
nF
50 V
35 V
10 %
10 %
Tank Capacitor for
Transmitting Current
mF
2x ceramic type capacitor
1. Some of RF1, RF2 and CF1 components may be omitted. Use them according to required EMC robustness.
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NCV75215
Table 1. RECOMMENDED EXTERNAL COMPONENTS (continued)
Name
C8
Description
VBAT HF Filter
Typical Value
Units
nF
Rating
50 V
Tolerance
10 %
Comment
100
330
C9
I/O Line Capacitor
pF
50 V
10 %
Standard I/O Line slope (60 ms)
IO_SLP_FAST = 0
C9
Tr1
I/O Line Capacitor
100
pF
mH
kHz
50 V
100V
100V
10 %
5%
Fast I/O Line slope (20 ms)
IO_SLP_FAST = 1
Push-pull Transformer
Ultrasonic Transducer
Transducer
specific
PZ1
MA40MF14−1B
MA55AF15−07NA
MA48AF15−07N
the lower muRata series
the better
D1
Reverse Polarity Protection
BAS321
−
50 V
−
1. Some of RF1, RF2 and CF1 components may be omitted. Use them according to required EMC robustness.
Table 2. PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
RXN (Note 2)
RXP
Type
Input
Description
Analog Receiver Negative Input
1
2
Input
Analog Receiver Positive Input
Analog Ground
3
GNDA
n.c.
Ground
4
n.c.
Pin not connected
5
GND
Ground
TX Ground, Digital Ground
Driver Output A
6
DRVA
Output
7
DRVC
Output
Driver Output C (Center of winding)
Driver Output B
8
DRVB
Output
9
VSUP
Power Supply
Input/Output
Ground
Main Power Supply
10
11
12
13
14
15
16
IO
I/O Line Bidirectional Interface to Master ECU
I/O Line Ground
GNDIO
TST3
Input/Output
Input/Output
Input/Output
Input/Output
Input
Test pin 3/Custom Diagnostic Interface
Test pin 2/Custom Diagnostic Interface
Test pin 1/Custom Diagnostic Interface
Test pin 0/Custom Diagnostic Interface
Manufacturer Test Mode Enable
TST2
TST1
TST0
TSTEN (Note 3)
2. Both receiver inputs are equal. Anyone of them can be used for signal input and the other for ground reference. But, using outer package
pin for signal input may result in worse EMC robustness.
3. TSTEN pin has to be always grounded in customer application. There is no customer functionality.
NCV75215
R2
D1
VSUP
IO
IO_CMP
CMP
VBAT
R_PU_IOL
~320 kW
~8.5 kΩ
R4
C6
C7 C7 C8
IO_DRV
R3
~500 W
IO_SLP
Control
IO Line
IO_DRV_ENA
C9
Figure 2. I/O Line Driver Structure and External Network
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NCV75215
Table 3. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Units
V
Supply Voltage Range VSUP (Note 4)
I/O Line Voltage Range
V
SUP
−0.3 to 40
−5 to 40
V
IO
V
I/O Line Voltage Range (T = 25°C)
V
−15 to 40
−30 to 40
V
A
IO,A
I/O Line Voltage Range (t
< 1 second, T = 25°C)
V
IO,PA
V
PULSE
A
Transmitter DRVA, DRVB voltage
Transmitter DRVC voltage
V
−0.3 to (2 × V
+ 0.3) or 40
V
DRV
DRV
SUP
V
−0.3 to (V
+ 0.3) or 40
V
SUP
Receiver Input P, N Voltage
V , V
RXP RXN
−0.3 to 0.3
V
Testmode Pin Voltage
V
TST0
− V
0 to (V + 0.3) or 3.6
V
TST3
DD
Maximum Junction Temperature
Storage Temperature Range
ESD Capability, Human Body Model (Note 5)
T
125
−40 to 125
2
°C
°C
kV
V
J(max)
TSTG
ESDHBM
ESDCDM−O
ESDCDM−E
LU25C
ESD Capability, Charge Device Model, All Pins (Note 5)
ESD Capability, Charge Device Model, Corner Pins (Note 5)
Latch-up Immunity at 25°C (Note 5)
500
750
V
200
mA
mA
°C
Latch-up Immunity at 125°C (Note 5)
LU125C
100
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb-Free Versions (Note6)
T
260
SLD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
5. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latch-up Current Maximum Rating: per JEDEC standard JESD78
6. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
Table 4. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Units
Thermal Characteristics, TSSOP16 (Note 7)
Thermal Resistance, Junction-to-Air (Note 8)
°C/W
R
135
q
JA
7. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
2
2
8. Values based on copper area of 645 mm (or 1 in ) of 1 oz. copper thickness and FR4 PCB substrate.
Table 5. RECOMMENDED OPERATING RANGES
Symbol
VSUP
VIO
Description
Min
6
Typ
Max
Units
DC Supply Voltage
I/O Line Voltage
12
18
V
V
0
VSUP
(Note 9)
T
Ambient Temperature under Bias
Junction Temperature under Bias
−40
−40
85
°C
°C
A
T
125
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
9. VSUP minimum voltage level might decrease the transmit burst ultrasonic power, it is external circuitry dependent. Transducer equivalent
serial resistance is transformed on DRVA,B,C ASSP inputs and might be too high to satisfy both minimum VSUP and maximum TX current.
In such a case, transmit driving current proportionally declines.
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NCV75215
Table 6. ELECTRICAL CHARACTERISTICS
(VSUP = 6 V to 18 V, TA = *40_C to 85_C, external devices as in application circuit of Figure 1.)
Symbol
Description
Min
Typ
Max
Units
mA
I
Total VSUP Current Consumption (Normal Mode, No Transmission)
Total VSUP Current Consumption (Low Power Mode)
Wake-up Time from Low Power Mode to Normal Mode
8
1
1
VSUP
VSUP, LOW_PWR
I
mA
t
ms
WAKE
RECEIVER AMPLIFIER
RX
RX
RX
Receiver Input Resistance
Receiver Input Capacitance
Programmable Receiver Gain
Receiver Gain Step
87
kW
pF
dB
dB
R_IN
C_IN
GAIN
100
50
110
RX
0.5
GSTEP
NSTEP
RX
Receiver Number of Gain Steps
Receiver Sensitivity at Maximum Gain
Receiver Bandwidth
127
RX
12
35
mV
PP
SENS
RX
90
kHz
BW
TRANSDUCER DRIVER
TX
Programmable Transmitter Current
Transmitter Current Step
50
350
mA
mA
CURR
CSTEP
NSTEP
SPREC
TX
TX
TX
4.76
63
Transmitter Number of Current Steps
Transmitter Current Tolerance
−20
20
%
SUPPLY VOLTAGE AND ITS MONITORING
VDD
VDD
Internal VDD Supply Voltage
VDD Level for Power-on-Reset
3.15
2.7
3.3
3.5
3.1
5.7
V
V
V
POR
VSUP
VSUP Level for Power-on-Reset Release at Start-up,
Under-voltage Threshold
5.1
UV
VSUP
VSUP Level for TX Driver Disable (to Protect Drivers),
Over-voltage Threshold
18
20
V
OV
INTERNAL OSCILLATOR
Internal Oscillator Frequency
I/O LINE INTERFACE
F
OSC
9.7
10
10.3
MHz
IO
Threshold Voltage for Digital Low
Threshold Voltage for Digital High
Output Voltage Low at I/O Pin
0.3
0.62
0.4
0.33
0.66
0.65
0.36
0.7
1
VSUP
VSUP
V
ILV
IHV
OLV
IO
IO
(I
OUT
= 1 mA, Internal Pull-up Activated, R4 Not Used)
IO
Output Slew Rate (Standard I/O Line Slope)
Output Slew Rate (Fast I/O Line Slope)
I/O Short Circuit Current
0.2
1
0.5
1.7
0.8
2.5
50
V/ms
V/ms
mA
kW
SR, STD
IO
SR, FAST
IO
10
200
6
SCC
IO
Fixed Internal Pull-up Resistor (R_PU_IOL)
Selectable Internal Pull-up Resistor
320
8.5
450
11
PU
PU, SEL
IO
kW
TEMPERATURE MEASUREMENT AND SHUTDOWN
T
Temperature Measurement Range
−60
150
°C
°C
°C
°C
°C
°C
MR
T
MRES
Temperature Measurement Resolution
1
T
A41
Temperature Measurement Accuracy at T = 42°C
−7
7
J
T
A125
Temperature Measurement Accuracy at T = 125°C
−10
−10
140
10
J
T
A40−
Temperature Measurement Accuracy at T = −40°C
10
J
T
Thermal Shutdown
190
SD
EEPROM
EE
Data Retention Time
Write Endurance
15
100
1M
year
RT
EE
cycles
cycles
WE
EE
Refresh and Read Endurance
RE
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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NCV75215
DIGITAL FUNCTIONALITY DESCRIPTION
The digital circuitry consists of the following blocks:
• RST_GEN − based on POR (power-on reset) signals,
generates internal reset of digital blocks
• EEPROM_CTRL − EEPROM controller for accessing
EEPROM memory
• I/O_LINE_CTRL − protocol and application layer for
communication with I/O Line master (ECU) via
I/O Line
• CLK_GEN − generates CLK_IO_LINE and
CLK_EEPROM from internal oscillator
• CFG_MEM − configuration parameters storage for the
chip functionality (EEPROM shadow RAM)
• DSP_TOP − ultrasonic receiver and transmitter control,
digital signal processing for ultrasonic receiver
Configuration
commands
CFG_MEM
Measurement
data
Configuration
data
IO_TXD
IO_RXD
IO_LINE_CTRL
EEPROM Meas.
commands
EEPROM Control
EEPROM DATA
commands
Ultrasonic receiver control
Ultrasonic transmitter control
ADC_DATA
DSP_TOP
EEPROM_CTRL
CLK_EEPROM
CLK_OSC
CLK_IO_LINE
CLK
CLK_GEN
POR_VDD_B
RST_CLK_GEN_B
RST_B
RST_GEN
Figure 3. Digital Block Diagram
CLK_GEN (Clock Generator)
RST_GEN (Reset Generator)
It generates internal reset signals according to VSUP and
VDD levels. In case of thermal shutdown all major blocks,
such as RX, TX, and IO_LINE, go to power-down mode.
This means that the chip doesn’t communicate via I/O Line
and its functionality is blocked. Functionality is restored
when temperature falls back to a safe level.
This block generates the timing and internal clock signals
based on an on-chip clock oscillator nominally running at
10 MHz (100 ns period).
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NCV75215
DSP_TOP (Digital Signal Processing)
This block contains the core of the digital functionality of
the NCV75215. The signal from ultrasonic transducer is
amplified, converted to digital and fed to DSP_TOP. Then,
it is digitally processed and compared to a time-dependent
threshold. The echo is reported on I/O Line when the signal
magnitude exceeds the threshold. Distance to the obstacle
can be determined from the time of the echo arrival. This
block also controls transmission and reception at the
ultrasonic transducer frequency. A simplified internal
diagram of DSP_TOP module is depicted in Figure 4.
Magnitude
Memory
ADC_DATA
ADC_DATA
Digital Magnitude
Detector
DSP
filter
TST3
Analog Signal
Debug
Output
External
Low-pass
Threshold
Magnitude
I/O Line
I/O Line
Digital
comparator
I/O Line
driver
Threshold
Threshold
RAM
Figure 4. Block Diagram of DST TOP Module (Simplified)
Figure 5. Understanding Internal Digital Magnitude, Thresholds and Debug Amplitude
(the Processing is Fully Digital; Voltages Apply to PDM Debugging Outputs TST2 and TST3)
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NCV75215
Figure 6. Block Diagram from Signal Processing Point of View
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NCV75215
CFG_MEM (Configuration Memory)
when available. For CFG_MEM locations not associated to
the EEPROM, default value is preloaded after reset.
Data is transferred over I/O Line LSBit first and
lowest sub-index first (in case of data arrays).
Bit structure of configuration memory is described in
Table7. EEPROM Refresh is executed during reset and reset
values of CFG_MEM cells are preloaded from EEPROM
Table 7. STRUCTURE OF CONFIGURATION MEMORY
Conf.
Memory
index
No
EEPROM
of
(Note 11)
bits
Name
Short Name
Description
Default
R/W
0
1
Measured Junction
Temperature
TEMP [7:0]
8
8
Junction temperature code
Actual
value
R
only
Sensor Status
(sub-index 0)
SENSOR_STATUS
[7:0]
Refer to Encoding of Sensor
Status Section
Actual
value
R
only
Measured
Reverberation Period
(sub-index 1)
MEASURED_
REVERB_PER [10:0]
11
1−LSB ~ 25 ns
0
R
(Note 12)
only
Carrier TX / RX
Period
CARRIER_PER [10:0]
11
1−LSB ~ 25 ns
Yes
R/W
Transmission & Reverberation:
TX_CARRIER_PER =
CARRIER_PER + 2 ×
DTX_PER
Reception:
RX_CARRIER_PER =
CARRIER_PER + 2 ×
DRX_PER
Valid range: <30 kHz, 95 kHz>
1−LSB ~ 50 ns
Delta TX Period
(sub-index 0)
DTX_PER [7:0]
8
0
R/W
Two’s complement signed
number
Range: <−6.4 ms, 6.35 ms>
See CARRIER_PER for
explanation
Delta Rx Period
(sub-index 1)
DRX_PER [7:0]
8
5
The same coding as DTX_PER
0
R/W
R/W
See CARRIER_PER for
explanation
3
4
TX Burst Pulse Count
BURST_PULSE_
CNT [4:0]
Number of TX pulses (0...31)
0: TX driver is not activated
1: 1 × TX pulse
16
…
31: 31 × TX pulses
Measurement
Duration
MEAS_DUR [3:0]
4
0 – T
and T
I/O Line
0
R/W
SNDx
RECx
commands disabled (default)
1 – 6 ms, 2 – 12 ms
3 – 18 ms,
5 – 30 ms,
7 – 42 ms,
9 – 54 ms,
4 – 24 ms
6 – 36 ms
8 – 48 ms
10 – 60 ms
other values – 60 ms
5
6
THR1
THR2
THR1_LVL0 [5:0] /
DT0 [3:0]
…
120
120
Thresholds – THR1 table
See section THRESHOLDS
THR1_
LVLx
= 32
R/W
R/W
THR1_LVL11 / DT11
DTx = 0
THR2_LVL0 [5:0] /
DT0 [3:0]
…
Thresholds – THR2 table
See section THRESHOLDS
THR2_
LVLx
= 32
THR2_LVL11 / DT11
DTx = 0
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NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
RX Gain Code
1−LSB ~ 0.476 dB
Default
R/W
7
Static RX Gain Code
(sub-index 0)
RX_GAIN_CODE
[6:0]
7
1
Yes
Yes
R/W
Dynamic Gain
Control Enable
(sub-index 1)
DYN_GAIN_ENA
Enables / disables dynamic
gain
R/W
Noise Threshold
(sub-index 2)
NOISE_THR [5:0]
6
6
Threshold applied during noise
monitoring
32
4
R/W
R/W
Noise Floor
NOISE_FLOOR [5:0]
All thresholds below
(sub-index 3)
NOISE_FLOOR[5:0] are
clamped to
NOISE_FLOOR[5:0]. Signal be-
low NOISE_FLOOR[5:0] is con-
sidered as noise.
The same coding as thresh-
olds.
8
Dynamic Gain –
Delta Gain #0
(sub-index 0)
DELTA_GAIN0 [6:0]
DELTA_GAIN0_SIGN
DELTA_GAIN1 [6:0]
DELTA_GAIN1_SIGN
DELTA_GAIN2 [6:0]
DELTA_GAIN2_SIGN
DELTA_GAIN3 [6:0]
DELTA_GAIN3_SIGN
DELTA_GAIN4 [6:0]
DELTA_GAIN4_SIGN
7
1
7
1
7
1
7
1
7
1
4
4
4
4
4
See DYNAMIC GAIN section.
Range 0…127
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Dynamic Gain –
Delta Gain Sign #0
(sub-index 1)
See DYNAMIC GAIN section.
0…positive, 1…negative
Dynamic Gain –
Delta Gain #1
(sub-index 2)
See DYNAMIC GAIN section.
Range 0…127
Dynamic Gain –
Delta Gain Sign #1
(sub-index 3)
See DYNAMIC GAIN section.
0…positive, 1…negative
Dynamic Gain –
Delta Gain #2
(sub-index 4)
See DYNAMIC GAIN section.
Range 0…127
Dynamic Gain –
Delta Gain Sign #2
(sub-index 5)
See DYNAMIC GAIN section.
0…positive, 1…negative
Dynamic Gain –
Delta Gain #3
(sub-index 6)
See DYNAMIC GAIN section.
Range 0…127
Dynamic Gain –
Delta Gain Sign #3
(sub-index 7)
See DYNAMIC GAIN section.
0…positive, 1…negative
Dynamic Gain –
Delta Gain #4
(sub-index 8)
See DYNAMIC GAIN section.
Range 0…127
Dynamic Gain –
Delta Gain Sign #4
(sub-index 9)
See DYNAMIC GAIN section.
0…positive, 1…negative
Dynamic Gain –
Delta Time Code #0
(sub-index 10)
DELTA_GAIN_DT0
[3:0]
See DYNAMIC GAIN section.
See DYNAMIC GAIN section.
See DYNAMIC GAIN section.
See DYNAMIC GAIN section.
See DYNAMIC GAIN section.
Dynamic Gain –
Delta Time Code #1
(sub-index 11)
DELTA_GAIN_DT1
[3:0]
Dynamic Gain –
Delta Time Code #2
(sub-index 12)
DELTA_GAIN_DT2
[3:0]
Dynamic Gain –
Delta Time Code #3
(sub-index 13)
DELTA_GAIN_DT3
[3:0]
Dynamic Gain –
Delta Time Code #4
(sub-index 14)
DELTA_GAIN_DT4
[3:0]
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10
NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
Default
R/W
8
Dynamic Gain
Control Start
(sub-index 15)
DYN_GAIN_START
[3:0]
4
2
DYN_GAIN_START × 204.8 ms
0
R/W
Dynamic Gain – Filter
BW
DYN_GAIN_BW [1:0]
USER_DATA [119:0]
See DYNAMIC GAIN section.
0
R/W
R/W
(sub-index 16)
9
Generic User Data
120
120 bits of user data.
User can select any structure.
The chip doesn’t internally use
this data.
Yes
Yes
10
Reverberation /
Decay Monitoring
Window Duration
(sub-index 0)
REVERB_MON_DUR
[7:0]
8
1−LSB ~ 25.6 ms
R/W
Current Adjustment
(sub-index 1)
TX_CURR [5:0]
6
2
Default value is
pre-loaded after POR.
Yes
Yes
R/W
R/W
Reverberation Period
Variation Limit
REVERB_PER_
VAR_LIMIT [1:0]
0 – 2.34 %
1 – 5.4 %
2 – 8.2 %
3 – 12.5 %
(sub-index 2)
Monitoring Window
Start
MON_WIN_START
[11:0]
12
2
Start time of echo magnitude
logging into measurement
memory
0
1
R/W
R/W
(sub-index 3)
1−LSB ~ 25.6 ms
Monitoring Window
Step
MON_WIN_STEP
[1:0]
Magnitude sampling period
0: 25.6 ms
1: 51.2 ms
(sub-index 4)
2: 102.4 ms
3: 204.8 ms
Automatic Carrier
Period Control
(sub-index 5)
CARRIER_PER_
AUTO_ENA
1
When 1:
Yes
R/W
CARRIER_PER is used as car-
rier period for 1 ultrasonic
st
measurement only resp. each
time CARRIER_PER is updat-
ed.
Following measurements will
drive TX with measured MEA-
SURED_REVERB_PER auto-
matically only if difference be-
tween CARRIER_PER and
measured reverberation period
is less than RE-
VERB_PER_VAR_LIMIT other-
wise CARRIER_PER is used.
In case of indirect measure-
ment the CARRIER_PER will
be exclusively used for echo re-
ception.
When 0:
TX_CARRIER_PER resp.
RX_CARRIER_PER is used.
Noise Suppression
Enable
NOISE_SUPP_ENA
TOF_CALIB [5:0]
1
6
Echo magnitude is suppressed
if it is below noise background
level
Yes
Yes
R/W
R/W
(sub-index 6)
10
ToF Calibration
(sub-index 7)
The time is subtracted from
measured ToF prior storing it in-
to the measurement result reg-
isters.
It needs to be adjusted for se-
lected Q factor.
1−LSB ~ 25.6 ms
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11
NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
Default
R/W
Reverberation
Debounce Time
(sub-index 8)
END_OF_REVERB
[1:0]
2
Debounce time is improving ro-
bustness towards chattering
phenomena
1
R/W
0: 60 ms
1: 100 ms
2: 140 ms
3: 180 ms
DSP Filter Q Factor
Selection
QF_SEL [1:0]
2
0: Q = 5
1: Q = 10
2: Q = 20
1
R/W
(sub-index 9)
3: Q = depending on number
of TX pulses
TX pulses
0…11
Q
5
12…23
24…31
10
20
DSP Filter Auto Q
Factor Control Enable
(sub-index 10)
AUTO_QF_CTRL_
ENA
1
0: Fixed Q factor according to
QF_SEL [1:0]
1: Q is automatically switched
at 14.8 ms after start of
measurement
0
R/W
QF_SEL Q start Q after
14.8 ms
0
1
2
3
5
5
10
5
10
20
20
Depends
on TX
pulses
Automatic Echo
Debounce Time
Control Enable
(sub-index 11)
AUTO_ECHO_DEB_
CTRL_ENA
1
1
0: Fixed 60 ms
0
R/W
R/W
1: Fixed 60 ms is automatically
switched to 200 ms at
14.8 ms after start of
measurement
Internal I/O Line
Pull-up Enable
(sub-index 12)
IO_PUP_ENA
0: Internal I/O Line pull-up
disabled
1: Internal I/O Line pull-up
enabled
Yes
Yes
I/O Line Slope
Control
(sub-index 13)
IO_SLP_FAST
ADV_IO_ENA
1
1
0: Standard I/O Line slope
(60 ms)
1: Fast I/O Line slope (20Ăms)
R/W
R/W
Advance I/O Line
Protocol Enable
(sub-index 14)
0: Standard I/O Line protocols
1: Advanced I/O Line protocol
Please, see index 13 & 14 for
more details.
0
0
T
Threshold
TREC1_THR_CTRL_
ENA
1
0:
1:
T
T
utilizes THR1 curve
utilizes fixed
R/W
REC1
REC1
REC1
Control Enable
(sub-index 15)
threshold NOISE_THR and
fixed static gain
RX_GAIN_CODE.
SENSOR_STATUS [0]
(Acoustic Noise Flag) is ORed
with SENSOR_STATUS[0] of
following T
/T
resp.
SND1 SND2
T
REC2
.
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12
NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
Time-out of
end-of-reverberation.
Default
R/W
10
End of Reverberation
Time-out
END_OF_REVERB_
TOUT [5:0]
6
39
(~2 ms)
R/W
(sub-index 16)
In presence of high noise, the
signal magnitude at analog
front-end may avoid proper de-
tection of end-of-reverberation.
Detection of end-of-reverbera-
tion is mandatory prior to start
of echo detection. This function
stops end-of-reverberation
measurement by time-out. Im-
proper use may lead to fake
echo detection (reverberation
detected as echo).
1−LSB ~ 51.2 ms
It is measured from TX end,
end-of-reverberation time-out =
TX end + END_OF_RE-
VERB_TOUT[5:0]× 51.2 ms
SENSOR_STATUS[5] is set in
case the reverberation time-out
is detected.
st
Advanced I/O Line
Indirect Measurement
Skip First Echo
ADV_IO_IND_SFE
1
0: ToF1 = 1 echo;
1
R/W
nd
ToF2 = 2 echo
nd
1: ToF1 = 2 echo;
rd
(sub-index 17)
ToF2 = 3 echo (valid for
advanced I/O Line indirect
measurement mode only)
Comment: In case of indirect
st
measurement, 1 echo is echo
from sensor performing direct
measurement. This option is
valid for indirect measurement
only.
I/O Line Transducer
Diagnostic Reporting
Enable
IO_TRANS_DIAG_
ENA
1
0: Reporting of transducer
diagnostic at I/O Line
disabled
1: Reporting of transducer
diagnostic at I/O Line
enabled
1
R/W
(sub-index 18)
Comment: Transducer diagnos-
tic is always enabled when Ad-
vanced I/O Line protocol is en-
abled (ADV_IO_ENA = 1)
End of Reverberation
Threshold
END_OF_REVERB_
THR
1
0: 75% of full-scale
1: 50% of full-scale
0
R/W
(sub-index 19)
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13
NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
0: Disabled
1: Enabled, valid only when
ADV_IO_ENA = 0.
Default
R/W
10
I/O Line 99.2 ms Echo
Duration Enabled
(sub-index 20)
IO_ECHO_PULSE_
ENA
1
0
R/W
When enabled, echo is always
reported by 99.2 ms pulse on
I/O Line.
Measurement is stopped If I/O
Line is pulled low for at least
350 ms during active measure-
ment.
Once active measurement is
stopped, I/O Line has to be re-
leased to idle state (high) for at
least T
time to re-enable the
DEB
detection of next I/O Line com-
mand.
In case of T
, I/O Line is
SNDx
driven low for 99.2 ms at the de-
tected end of reverberations,
then I/O Line is again driven
low for 99.2 ms each time when
valid echo is detected (this is
identical with T
).
RECx
Min. time is 99.2 ms between
two echoes in this mode. If dis-
tance between echoes is less
than 99.2 ms just single echo is
reported.
Comment: This mode enables
fully programmable measure-
ment duration (by stopping of
on-going measurement) while it
is still transparently propagating
detected echo (ToF) on I/O
Line.
Parasitic Echo Peak
Magnitude to
Suppress at the End
of Reverberations
(sub-index 21)
PARASITIC_PEAK_
MAG [1:0]
2
0: Parasitic echo peak
suppression is disabled at
the end of reverberations
1: Parasitic echo peak low
suppression
0
R/W
2: Parasitic echo peak
medium suppression
3: Parasitic echo peak high
suppression
Index 2 Format
Selection
(sub-index 22)
TX_RX_PER_ENA
WIDTH_PEAK_ENA
1
1
0: Selects format 2a
1: Selects format 2b
0
0
R/W
R/W
R/W
Index 14 Format
Selection
(sub-index 23)
0: Selects format 14a
1: Selects format 14b
11
Super Read/Write
Index
n.a.
(Note 10)
READ:
n.a.
Sequential read of the following
indexes in the following order:
2a, 7. RX_GAIN_CODE, 7.
DYN_GAIN_ENA, 10 (items ini-
tialized from EEPROM only)
WRITE:
Sequential write to the following
indexes in the following order:
2a, 3, 4, 7, 10
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14
NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
Default
R/W
12
Magnitude Data
MEAS_DATA0 [5:0]
…
MEAS_DATA59 [5:0]
360
Sampled echo magnitude.
n.a.
R
Echo magnitude logging is con-
trolled by parameters
only
MON_WIN_START
and MON_WIN_STEP.
MEAS_DATA0 =
echo magnitude at time
MON_WIN_START × 25.6 ms
…
MEAS_DATA59 =
echo magnitude at time
MON_WIN_START × 25.6 ms
+ 59 × LUT[MON_WIN_STEP]
13
Measurement
Results – Short
MEAS_RES_SHR_
SENSOR_STATUS
[7:0]
8
Refer to Encoding of Sensor
Status Section
n.a.
0
R
only
This index is only
functional when
ADV_IO_ENA = 1.
(sub-index 0)
st
MEAS_RES_SHR_
TOF1 [9:0]
10
ToF1 – time of 1 echo
R
1−LSB ~ 51.2 ms
only
Otherwise, there is
no response for this
index.
(sub-index 1)
ToF =
floor (echo detection time) –
(TOF_CALIB × 25.6 ms)
st
Echo time − 1 (ToF1) rising
edge of ECHO_DET signal af-
ter detected end of reverbera-
tion
ToF1 = 0
in case the echo is not detected
Measurement
Results – Long
MEAS_RES_LNG_
SENSOR_STATUS
[7:0]
8
Refer to Encoding of Sensor
Status Section
n.a
0
R
only
This index is only
functional when
ADV_IO_ENA = 1.
Otherwise, there is
no response for this
index.
(sub-index 0)
st
MEAS_RES_LNG_
TOF1 [9:0]
10
ToF1 – time of 1 echo
R
1−LSB ~ 51.2 ms
only
(sub-index 1)
See index 13.
ToFx = 0
in case when any echo is not
detected
nd
MEAS_RES_LNG_
TOF2 [9:0]
10
ToF2 – time of 2 echo
0
R
only
(sub-index 2)
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NCV75215
Table 7. STRUCTURE OF CONFIGURATION MEMORY (continued)
Conf.
Memory
index
No
of
EEPROM
(Note 11)
bits
Name
Short Name
Description
Default
R/W
Measurement
Results – Long
MEAS_RES_LNG_
SENSOR_STATUS
[7:0]
8
Refer to Encoding of Sensor
Status Section
n.a
R
only
This index is only
functional when
ADV_IO_ENA = 1.
Otherwise, there is
no response for this
index.
(sub-index 0)
st
MEAS_RES_LNG_
TOF1 [9:0]
10
ToF1 – time of 1 echo
0
R
1−LSB ~ 51.2 ms
only
(sub-index 1)
See index 13.
ToFx = 0
in case when any echo is not
detected
st
MEAS_RES_LNG_
PEAK1 [5:0]
6
Maximal magnitude of 1 echo.
0
0
R
The same encoding as echo
magnitude in MEAS_DATA.
In case of no echo, it is 0.
only
(sub-index 2)
st
MEAS_RES_LNG_
WIDTH1 [5:0]
6
8
Width of 1 echo.
R
1−LSB ~ 12.8 ms
only
(sub-index 3)
In case of no echo, it is 0.
15
Command Byte
(Write)
CMD[7:0] /
IC_ID_xx[7:0]
See Data communication sec-
tion.
IC_ID_xx
[7:0]
R/W
IC Revision ID
(Read)
WRITE:
CMD [7:0] … command byte
READ:
IC_ID_xx [7:4]:
Full mask version
Allowed range from 1 to15.
IC_ID_xx [3:0]:
Metal tune version
Allowed range from 1 to15.
st
Comment: 1 silicon version is
IC_ID_xx = 0x11 hex
10.n.a. = not applicable
11. Configuration memory start-up values:
EEPROM Column Value in Table 1
Configuration Memory Item Start-up Value
The value is preloaded from EEPROM at start-up.
Yes
−
Default value is loaded at start-up or actual value is reported (read only items).
12.MEASURED_REVERB_PER values:
MEASURED_REVERB_PER Value
Value Meaning
The period not measured.
0
1
The period measurement failed because of low signal.
Measured period.
Others
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NCV75215
ENCODING OF SENSOR_STATUS [7:0] REGISTER
SENSOR_STATUS [0] = Acoustic Noise Flag
SENSOR_STATUS [7] = EEPROM Two-Bit Error or
EEPROM CRC Error or POR flag
Flag is set if an acoustic noise is above the noise threshold
(NOISE_THR) in noise monitoring time window.
Flag is automatically cleared by any measurement.
EEPROM Two-Bit Error Flag:
Flag is updated by refreshing Configuration RAM from
EEPROM (at start-up or initialized by Refresh
Configuration RAM from EEPROM command). Flag is set
if two-bit error is detected at any EEPROM address
(single-bit error is automatically corrected by ECC code).
SENSOR_STATUS [1] = VSUP Under-voltage or
Over-voltage during TX
Flag is set if VSUP voltage is below under-voltage
threshold or crosses the over-voltage threshold during TX.
If the VSUP voltage is higher than over-voltage threshold
before TX, then the flag is not set.
EEPROM CRC Error Flag:
Flag is updated by refreshing Configuration RAM from
EEPROM (at start-up or initialized by Refresh
Configuration RAM from EEPROM command). EEPROM
data (ECC bits not included) CRC code is automatically
calculated and stored into EEPROM as a part of Program
EEPROM process. CRC stored in EEPROM is compared
with CRC calculated during Refresh Configuration RAM
from EEPROM process. Flag is set if stored and calculated
CRC don’t match. CRC is also protected by ECC.
In any case when over-voltage was detected during TX,
transmission is automatically stopped, but measurement
normally continues.
Flag is automatically cleared by direct measurement only.
SENSOR_STATUS [2] = TX Period Update Required
Flag is set if MEASURED_REVERB_PER is outside the
range set by REVERB_PER_VAR_LIMIT and
CARRIER_PER. Flag is updated by direct measurement
only. Flag is automatically cleared by direct measurement
only.
8
5
3
2
The CRC8−C2 polynomial is x +x +x +x +x+1. The
initial value is “1111_1111” binary.
Flag is set after POR.
POR Flag:
The flag is set at POR and it is cleared-by-read.
SENSOR_STATUS [3] = TX Period Update Direction
Flag indicates if MEASURED_REVERB_PER is greater
than CARRIER_PER.
Flag is updated by direct measurement only. Flag is
automatically cleared by direct measurement only.
NOTES: a.) If flags are updated in case of direct (transmit
and receive) measurement only, they are kept
unchanged in case of indirect (receive only)
measurement.
SENSOR_STATUS [4] = Unexpected Decay Time
(decay time too short)
Flag is set if transducer decay time (reverberation) is
shorter than REVERB_MON_DUR time.
b.) Clear-by-read flags are cleared by reading of
Configuration RAM index 1.
Flag is updated by direct measurement only. Flag is
automatically cleared by direct measurement only.
SENSOR_STATUS [5] = End of Reverberation Time-out
Flag is set if transducer decay time is longer than
end-of-reverberation
time-out
(TX
end
+
END_OF_REVERB_TOUT * 51.2 ms). Flag is updated by
direct measurement only. Flag is automatically cleared by
direct measurement only.
SENSOR_STATUS [6] = THS_ERROR Flag
(Thermal Shutdown Error)
Flag is set if thermal shutdown is detected. Flag is
automatically cleared by any measurement.
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NCV75215
CONFIGURATION MEMORY DETAILED DATA STRUCTURES
Table 8. INDEX 0 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
TEMPERATURE_CODE [0]
…
0
0
…
7
TEMPERATURE_CODE [7]
Table 9. INDEX 1 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
SENSOR_STATUS [0]
…
0
0
…
7
SENSOR_STATUS [7]
MEASURED_REVERB_PER [0]
…
1
2
8
…
15
16
17
18
MEASURED_REVERB_PER [7]
MEASURED_REVERB_PER [8]
MEASURED_REVERB_PER [9]
MEASURED_REVERB_PER [10]
Table 10. INDEX 2A DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
CARRIER_PER [0]
…
0
0
…
7
CARRIER_PER [7]
CARRIER_PER [8]
CARRIER_PER [9]
CARRIER_PER [10]
1
8
9
10
Table 11. INDEX 2B DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
DTX_PER [0]
…
0
0
…
7
DTX_PER [7]
DRX_PER [0]
…
1
8
…
15
DRX_PER [7]
Table 12. INDEX 7 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
RX_GAIN_CODE [0]
…
0
0
…
6
RX_GAIN_CODE [6]
DYN_GAIN_ENA
7
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18
NCV75215
Table 12. INDEX 7 DATA STRUCTURE (Data are transferred LSBit first.) (continued)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
NOISE_THR [0]
…
1
8
…
13
14
15
16
17
18
19
NOISE_THR [5]
NOISE_FLOOR [0]
NOISE_FLOOR [1]
NOISE_FLOOR [2]
NOISE_FLOOR [3]
NOISE_FLOOR [4]
NOISE_FLOOR [5]
2
Table 13. INDEX 10 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
REVERB_MON_DUR [0]
…
0
0
…
7
REVERB_MON_DUR [7]
TX_CURR [0]
1
8
…
13
14
15
16
…
23
24
…
27
28
29
30
31
32
…
37
38
39
40
41
42
43
44
45
46
47
…
TX_CURR [5]
REVERB_PER_VAR_LIMIT [0]
REVERB_PER_VAR_LIMIT [1]
MON_WIN_START [0]
…
2
3
MON_WIN_START [7]
MON_WIN_START [8]
MON_WIN_START [11]
MON_WIN_STEP [0]
MON_WIN_STEP [1]
CARRIER_PER_AUTO_ENA
NOISE_SUPP_ENA
TOF_CALIB [0]
4
5
…
TOF_CALIB [5]
END_OF_REVERB [0]
END_OF_REVERB [1]
QF_SEL [0]
QF_SEL [1]
AUTO_QF_CTRL_ENA
AUTO_ECHO_DEB_CTRL_ENA
IO_PUP_ENA
IO_SLP_FAST
ADV_IO_ENA
TREC1_THR_CTRL_ENA
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19
NCV75215
Table 13. INDEX 10 DATA STRUCTURE (Data are transferred LSBit first.) (continued)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
END_OF_REVERB_TOUT [0]
…
6
48
…
53
54
55
56
57
58
59
60
61
END_OF_REVERB_TOUT [5]
ADV_IO_IND_SFE
IO_TRANS_DIAG_ENA
END_OF_REVERB_THR
IO_ECHO_PULSE_ENA
PARASITIC_PEAK_MAG [0]
PARASITIC_PEAK_MAG [1]
TX_RX_PER_ENA
7
WIDTH_PEAK_ENA
Table 14. INDEX 12 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
MEAS_DATA0 [0]
…
0
0
…
5
MEAS_DATA0 [5]
MEAS_DATA1 [0]
MEAS_DATA1 [1]
MEAS_DATA1 [2]
…
6
7
1
8
…
11
12
…
15
16
17
18
…
23
…
352
353
354
…
359
MEAS_DATA1 [5]
MEAS_DATA2 [0]
…
MEAS_DATA2 [3]
MEAS_DATA2 [4]
MEAS_DATA2 [5]
MEAS_DATA3 [0]
…
2
MEAS_DATA3 [5]
…
…
44
MEAS_DATA58 [4]
MEAS_DATA58 [5]
MEAS_DATA59 [0]
…
MEAS_DATA59 [5]
NOTES:
• The content of registers MEAS_DATA0..59 is
undefined and lost if I/O Line short to
VBAT/GND is detected during reading from
configuration memory index 12.
• The registers are updated during measurement.
They can be read as many times as required, but
their content is lost when any index data write
transfer is issued on I/O Line.
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20
NCV75215
Actual
TX
Current
TX driver
current mode.
VSUP = 12V
350
300
[mA]
Desired operation.
VSUP = 9V
TX driver voltage
saturation !
200
VSUP = 7V
VSUP = 5V
Lower TX power.
Narrower bandwidth.
100
50
0
0
32
63 TX_CURR[5:0] Code
Figure 7. An EXAMPLE of TX Driver Current Characteristics
Figure 7 depicts an EXAMPLE of TX driver current
characteristic. The characteristic doesn’t depend on
NCV75215 but it depends on utilized transformer and the
piezo impedance transformed to primary winding.
Table 15. INDEX 13 DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
SENSOR_STATUS [0]
…
0
0
…
7
SENSOR_STATUS [7]
MEAS_RES_SHR_TOF1 [0]
…
1
2
8
…
15
16
17
MEAS_RES_SHR_TOF1 [7]
MEAS_RES_SHR_TOF1 [8]
MEAS_RES_SHR_TOF1 [9]
Table 16. INDEX 14A DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
SENSOR_STATUS [0]
…
0
0
…
7
SENSOR_STATUS [7]
MEAS_RES_LNG_TOF1 [0]
…
1
2
8
…
15
16
17
18
..
MEAS_RES_LNG_TOF1 [7]
MEAS_RES_LNG_TOF1 [8]
MEAS_RES_LNG_TOF1 [9]
MEAS_RES_LNG_TOF2 [0]
…
23
24
...
MEAS_RES_LNG_TOF2 [5]
MEAS_RES_LNG_TOF2 [6]
…
3
27
MEAS_RES_LNG_TOF2 [9]
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NCV75215
Table 17. INDEX 14B DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
SENSOR_STATUS [0]
…
0
0
…
7
SENSOR_STATUS [7]
MEAS_RES_LNG_TOF1 [0]
…
1
2
8
…
15
16
17
18
..
MEAS_RES_LNG_TOF1 [7]
MEAS_RES_LNG_TOF1 [8]
MEAS_RES_LNG_TOF1 [9]
MEAS_RES_LNG_PEAK1 [0]
…
23
24
...
MEAS_RES_LNG_PEAK1 [5]
MEAS_RES_LNG_WIDTH1 [0]
…
3
29
MEAS_RES_LNG_WIDTH1 [5]
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NCV75215
TEMPERATURE MEASUREMENT
It is possible to monitor junction temperature by reading
configuration memory index 0.
Table 18. JUNCTION TEMPERATURE CONVERSION
Junction Temperature
TEMP[7:0] − Config. Mem. Idx 0
−60
−40
−20
0
16
36
56
76
20
95
40
116
136
156
176
197
217
238
248
60
80
100
120
140
160
170
200
180
160
140
120
100
80
y = 0.9915x − 75.225
60
40
20
0
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
−20
−40
−60
−80
Temperature Code (−)
Figure 8. Junction Temperature Transfer Function
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NCV75215
THRESHOLDS
DSP Filter Threshold (signal magnitude threshold) is
controlled by values in 1 of 2 threshold Look-Up Tables
(THR1 or THR2). The last threshold interval ends at 60ms
(measured from the beginning of TX Ultrasonic
transmission). Each threshold table consists of 12 data pairs.
Each pair contains threshold level (6 bit) and delta time code
(4 bit), which defines a time for linear interpolation to the
particular threshold level. Threshold levels are interpreted
using linear scale.
Table 21. THRESHOLD DELTA TIME THRx_DTy[3:0]
(Note 13)
THRx_DTy
Code
Delta Time
THRx_DTy
Code
Delta Time
[ms]
[ms]
0
1
2
3
4
5
6
7
100
200
8
1600
2000
2400
3200
4000
5200
6400
8000
9
300
10
11
12
13
14
15
400
600
Table 19. THRESHOLD TABLE SELECTION
Command Pulse
800
(Measurement Type)
1000
1200
Threshold Table Used
T
SND1
T
SND2
or T
or T
THR1
THR2
REC1
REC2
13.x stands for index 1 or 2
y stands for index from 0 to 11
Table 20. THRESHOLD LEVELS THRx_LVLy[5:0]
(Note 13)
Value
0
Interpretation
Lowest threshold level
…
…
63
Highest threshold level
(0x3F)
(equivalent of full ADC range signal)
THRx_LVL 1
Threshold
THRx_LVL 4
level
THRx_LVL 3
THRx_LVL 2
THRx_LVL 5
THRx_LVL 6
THRx_LVL0
THRx_LVL 7
THRx_LVL 8
THRx_LVL 9
THRx_LVL 10
THRx_LVL 11
Time
THRx_ DT6
THRx_ DT3
THRx_ DT9
THRx_ DT11
THRx_ DT10
Figure 9. Threshold Curve Example
Threshold levels are piecewise approximated inside the
thresholds intervals.
THR1_LVL11[5:0] resp. THR2_LVL11[5:0] threshold is
applied until end of measurement if last delta time expires
prior end of measurement.
NOISE_THR[5:0] is used during noise monitoring
(the same threshold for both direct and indirect
measurement).
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NCV75215
Table 22. THRESHOLD TABLE DATA IN CONFIGURATION MEMORY (INDEX 5 AND 6)
(Data are transferred LSBit first)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
THRx_LVL0 [0]
…
0
0
…
5
THRx_LVL0 [5]
THRx_LVL3 [0]
THRx_LVL3 [1]
THRx_LVL1 [0]
…
6
7
1
2
8
…
13
14
15
16
…
21
22
23
…
48
…
53
54
55
56
…
61
62
63
64
…
69
70
71
72
…
75
76
…
79
…
112
…
115
116
…
119
THRx_LVL1 [5]
THRx_LVL3 [2]
THRx_LVL3 [3]
THRx_LVL2 [0]
…
THRx_LVL2 [5]
THRx_LVL3 [4]
THRx_LVL3 [5]
…
…
6
THRx_LVL8 [0]
…
THRx_LVL8 [5]
THRx_LVL11 [0]
THRx_LVL11 [1]
THRx_LVL9 [0]
…
7
8
9
THRx_LVL9 [5]
THRx_LVL11 [2]
THRx_LVL11 [3]
THRx_LVL10 [0]
…
THRx_LVL10 [5]
THRx_LVL11 [4]
THRx_LVL11 [5]
THRx_DT0 [0]
…
THRx_DT0 [3]
THRx_DT1 [0]
…
THRx_DT1 [3]
…
…
14
THRx_DT10 [0]
…
THRx_DT10 [3]
THRx_DT11 [0]
…
THRx_DT11 [3]
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NCV75215
DYNAMIC GAIN
Dynamic gain curve principle is depicted in Figure 10. It
is similar to threshold interpolation algorithm.
See Table 1 index 8 for dynamic gain parameters. Other
details are depicted in Figure 10.
Figure 10. Dynamic Gain Principle
Table 23. DYNAMIC GAIN DELTA TIME DELTA_GAIN_DTz[3:0] CODE LUT (LOOK-UP TABLE)
DELTA_GAIN_DTz[3:0] Code
Delta Time [ms]
102.4
DELTA_GAIN_DTz[3:0] Code
Delta Time [ms]
3276.8
0
8
1
204.8
9
4505.6
2
409.6
10
11
12
13
14
15
5939.2
3
819.2
7987.2
4
1228.8
1638.4
2048
10035.2
12697.6
15974.4
20070.4
5
6
7
2457.6
14.z stands for index from 0 to 4
Dynamic gain curve is smoothed in low-pass filter which
runs at 2.5 MHz. The filter formula is:
where:
• y = output dynamic gain curve
• x = input signal from dynamic gain interpolator
• s = shift coefficient which defines filter bandwidth
1
2s
1
+ ǒ1 *
Ǔ
yn)1
yn ) xn
2s
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NCV75215
Table 24. DYNAMIC GAIN FILTER COEFFICIENT DYN_GAIN_BW[1:0] CODE LUT (LOOK-UP TABLE):
DYN_GAIN_BW[1:0]
Filter Bandwidth
Coefficient “s”
0
1
2
3
No filter, pass through
0
8
Fast
Normal
Slow
9
10
Dynamic Gain Start Delay
The range is from 0 ms to 3072 ms. Equivalent
Dynamic gain curve starts at begin of measurement cycle
approximate distance is from 0 cm to 52.2 cm.
but it is delayed by the time:
“Dyn. Gain Start Time” = DYN_GAIN_START[3:0] *
204.8 ms
Table 25. DYNAMIC GAIN IN CONFIGURATION MEMORY (INDEX 8) (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Data Bit
DELTA_GAIN0 [0]
…
0
0
…
6
DELTA_GAIN0 [6]
DELTA_GAIN0_SIGN
DELTA_GAIN1 [0]
…
7
1
8
…
14
15
…
32
…
38
39
40
…
43
44
…
47
48
…
51
52
…
55
56
…
59
60
…
63
64
65
DELTA_GAIN1 [6]
DELTA_GAIN1_SIGN
…
…
4
DELTA_GAIN4 [0]
…
DELTA_GAIN4 [6]
DELTA_GAIN4_SIGN
DELTA_GAIN_DT0 [0]
…
5
6
7
8
DELTA_GAIN_DT0 [3]
DELTA_GAIN_DT1 [0]
…
DELTA_GAIN_DT1 [3]
DELTA_GAIN_DT2 [0]
…
DELTA_GAIN_DT2 [3]
DELTA_GAIN_DT3 [0]
…
DELTA_GAIN_DT3 [3]
DELTA_GAIN_DT4 [0]
…
DELTA_GAIN_DT4 [3]
DYN_GAIN_START [0]
…
DYN_GAIN_START [3]
DYN_GAIN_BW [0]
DYN_GAIN_BW [1]
15.DELTA_GAINx_SIGN = 0 … positive DELTA_GAINx
16.DELTA_GAINx_SIGN = 1 … negative DELTA_GAINx
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NCV75215
SUPER READ, SUPER WRITE
Super read data transfer is very useful at ultrasonic system
Then, the communication master (ECU) can use super
write data transfer to initialize most of configuration
memory items.
startup. It enables to read all configuration memory items in
one transaction which are initialized from EEPROM
memory at power-on reset.
Table 26. INDEX 11 READ DATA STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
CARRIER_PER [0]
…
0
0
…
7
CARRIER_PER [7]
CARRIER_PER [8]
CARRIER_PER [9]
CARRIER_PER [10]
RX_GAIN_CODE [0]
…
1
2
3
4
8
9
10
11
…
15
16
17
18
19
…
23
24
25
26
27
…
31
32
33
34
35
36
37
38
39
40
41
42
43
44
RX_GAIN_CODE [4]
RX_GAIN_CODE [5]
RX_GAIN_CODE [6]
DYN_GAIN_ENA
REVERB_MON_DUR [0]
…
REVERB_MON_DUR [4]
REVERB_MON_DUR [5]
REVERB_MON_DUR [6]
REVERB_MON_DUR [7]
TX_CURR [0]
…
TX_CURR [4]
TX_CURR [5]
REVERB_PER_VAR_LIMIT [0]
REVERB_PER_VAR_LIMIT [1]
CARRIER_PER_AUTO_ENA
NOISE_SUPP_ENA
TOF_CALIB [0]
TOF_CALIB [1]
TOF_CALIB [2]
5
TOF_CALIB [3]
TOF_CALIB [4]
TOF_CALIB [5]
IO_PUP_ENA
IO_SLP_FAST
Index 11 write data structure. Data are transferred LSBit
first.
It is a sequential write to the following indexes in the
following order: 2a, 3, 4, 7 and 10.
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NCV75215
COMMAND BYTE
The chip is commanded to requested action by writing the
protected by 8-bits coding, Hamming distance, checksum
and number of message bits. Unwanted execution is
practically impossible.
particular Command Code to the command byte item in
configuration memory at index 15. The Command Byte
cannot be read back, it is write only access. Commands are
Table 27. COMAND BYTE
Command Code
Action
hex: 29
bin: 0010 1001
Unlock EEPROM – unlocks EEPROM for next I/O Line command. EEPROM has to be unlocked first
to successfully execute Program EEPROM and Refresh Configuration RAM. EEPROM is automati-
cally locked after the finishing of any following command.
hex: D6
bin: 1101 0110
Program EEPROM − store data in configuration memory marked “Yes” in EEPROM column in Table 1
into EEPROM
hex: 73
bin: 0111 0011
Refresh Configuration RAM from EEPROM (items stored in EEPROM only)
Write TP_ENA bits − TP_ENA[3:0] <= CommandByte[3:0]
hex: Ax
bin: 1010 xxxx
hex: E7
bin: 1110 0111
Unlock reading from Conf. RAM index <5012> – enables reading from Conf. RAM indexes <5…12>,
otherwise there will be no response to I/O Line read command for Conf. RAM indexes <5…12>
hex: 18
bin: 0001 1000
Lock reading from Conf. RAM index <5012> – disables reading from Conf. RAM indexes <5…12>
hex: 92
bin: 1001 0010
Activate low power mode − The chip enters low consumption mode and it only accepts IO Line com-
mand bytes “De-activate low power mode” and “SW reset”. Normal operation is not possible.
hex: 5
bin: 0000 0101
De-activate low power mode − Normal mode is re-entered from low power mode and normal opera-
tion is restored. See Electrical Characteristic section for required wake time (t
) to re-enter normal
wake
mode.
hex: 5A
SW reset – Software activation of power-on reset (POR). This command effect is equal to POR.
bin: 0101 1010
others
no reaction
17.Reading from Conf. RAM indexes <5…12> is enabled after POR.
Store Data to EEPROM:
Refresh Data from EEPROM:
st
st
1 command Unlock EEPROM
1 command Unlock EEPROM
nd
nd
2
command Program EEPROM
2
command Refresh Configuration RAM
CHIP ID
The chip ID can be read from index 15. It is read only
access.
Table 28. INDEX 15 DATA READ STRUCTURE (Data are transferred LSBit first.)
Data Frame Byte
Data Frame Bit
Threshold Table Bit
IC_ID_MT [0]
…
0
0
…
3
IC_ID_MT [3]
IC_ID_FM [0]
…
4
…
7
IC_ID_FM [3]
18.IC_ID_FM: Full mask silicon version. Completely modified silicon version.
19.IC_ID_MT: Metal tune silicon subversion. Small bugs can be fixed by different active components interconnection. Metal layers are modified
but active silicon components remain the same.
20.The first silicon version is: IC_ID_FM = 1, IC_ID_MT = 1
21.The second silicon version is: IC_ID_FM = 2, IC_ID_MT = 1
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NCV75215
CUSTOMER TEST OUTPUTS, TP_ENA
Custom diagnostic test (debugging) output/input
(TST1...4) signals are selected by TP_ENA bits. TP_ENA
bits are set via appropriate Command byte. DSP internal
“analog” signals are PDM modulated. External low-pass
filters are required. See table below for valid test signal
combinations.
Table 29. CUSTOMER TEST OUTPUTS, TP_ENA
TP_ENA[3:0]
TST0
TST1
TST2
TST3
0000
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
(Default)
0001
0010
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
THRESHOLD[9:0]
PDM2
ECHO_MAG[9:0]
PDM1
ECHO_ENVELOPE
PDM2
ECHO_MAG[9:0]
PDM1
0011
0100
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Not Defined
ECHO_DET
Not Defined
ECHO_MAG[9:0]
PDM1
0101
0110
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Hi−Z / 4 kW
Not Defined
Not Defined
GAIN[7:0]
PDM2
ECHO_MAG[9:0]
PDM1
0111
1000
Hi−Z / 4 kW
Hi−Z / 4 kW
IO_RXD
IO_DRV (input)
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
Hi−Z / 4kΩ
Hi−Z / 4kΩ
1001
1010
1011
1100
1101
1110
1111
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
THRESHOLD[9:0]
PDM2
ECHO_MAG[9:0]
PDM1
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
ECHO_ENVELOPE
PDM2
ECHO_MAG[9:0]
PDM1
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
Not Defined
ECHO_DET
Not Defined
Not Defined
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
ECHO_MAG[9:0]
PDM1
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
Not Defined
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
GAIN[7:0]
PDM2
ECHO_MAG[9:0]
PDM1
Single Ended Analog
RX Output
Permanent Digital
Output Set to “1”
IO_RXD
IO_DRV (Input)
22.Hi−Z / 4 kW = IO is not driven but pull down active
23.VGA_Gain = (analog(PDM2) / 20 mV) * (30 / 63) dB
24.Initial/POR value shall be 0 decimal (“0000” binary) – test outputs are disabled
25.GAIN[7:0] is effectively using half of the full-scale of PDM output
26.Threshold[9:0] is effectively using half of the full-scale of PDM output
Recommended External Low-pass Filter
TST2 or 3
(PDM1 or 2)
10 kΩ
10 kΩ
…to scope probe
470 pF
470 pF
Figure 11. Recommended PDM External Low-pass Filter
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NCV75215
EEPROM PROGRAMMING SEQUENCE
EEPROM programming operation is performed in 12
successive steps:
1. Power-on the device.
7. Wait 25 ms. It is needed to complete programming
of the EEPROM memory.
8. Unlock EEPROM – Write Command Code
0x29hex into Configuration RAM index 15.
9. Refresh Configuration RAM − Write Command
Code 0x73hex into Configuration RAM index 15.
10. Read Configuration RAM index 1 to get
SENSOR_STATUS. SENSOR_STATUS[7]
(EEPROM ERROR or HW_ERROR) should be 0.
If SENSOR_STATUS[7] is 1, EEPROM failure
occurred, then, go-to step 3.
11. Verify EEPRPOM shadow registers content by
reading back Configuration RAM index 11 (super
read) and index 9. If mismatch detected, go-to step
3.
2. Read Configuration RAM index 1 to clear
SENSOR_STATUS (SENSOR_STATUS[7] =
HW ERROR).
3. Write data into Configuration RAM
(EEPROM shadow registers).
4. Verify EEPRPOM shadow registers content by
reading back Configuration RAM index 11
(super read) and index 9. If mismatch detected,
go-to step 2.
5. Unlock EEPROM – Write Command Code
0x29hex into Configuration RAM index 15.
6. Program EEPROM − Write Command Code
0xD6hex into Configuration RAM index 15.
12. Power-off the device.
EEPROM ERROR CORRECTION BLOCK
The error correction block utilizes SECDED coding for
one bit error correction and 2 bits error detection. As data are
split in words 16 bits long each, 5 extra bits are required for
encoding ECC (Hamming code) and one extra bit for parity
check (two bits error detection). The encoding bits are
spread into the bit matrix accordingly to the Tab.2.
Figure 12. 16-bits Word SECDED Encoding
Error correction is based on the calculation of the parity
bits. The parity bits are spread in such a way, that if the parity
fails, the position of the error bit is defined directly by the
position of the failing bits.
Example 2:
Error is on parity bit P4 – the word is 10000 = bit 16
decimal (that is directly the parity bit P4).
If two bits error is detected, invalid data of the impacted
address in the shadow registers will not be updated.
Example 1:
If the failure appears on bit 9 (D4), the parity of P0 and P3
will be wrong (column for bit 9, X’s are for P0 and P3).
Putting one on the wrong positions of the parity when
writing parity word would be:
P4, P3, P2, P1, P0 = 01001 binary = 9 decimal.
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NCV75215
IO_LINE_CTRL (COMMAND PULSE, MEASUREMENT CONTROL, DATA COMMUNICATION)
I/O Line is a master-slave point-to-point communication
link. If more than one chip is connected to master (ECU)
unit, it creates star topology.
Every I/O Line communication starts with particular
command pulse. Its length and meaning is in table below:
Table 30. IO_LINE COMMAND PULSE
Command
Pulse
Min. Pulse
Length [ms]*
Typ. Pulse
Length [ms]
Max. Pulse
Length [ms]*
Addressing
Description
T
T
T
T
328
503
697
920
1172
400
580
472
657
−
TX+RX (direct measurement with THR1 table)
RX only (indirect measurement with THR2 table)
RX only (indirect measurement with THR1 table)
TX+RX (direct measurement with THR2 table)
Data communication
SND1
REC2
REC1
SND2
−
780
863
−
−
1010
1270
1100
1368
T
R/nW, xxxx
DATA
*I/O Line command pulse, which is generated by ECU master, has to be always in range from minimal pulse length to maximal pulse length under
any applicable condition (especially EMC disturbance, which may shift I/O Line edges by tens of microseconds). It is strongly recommended
to generate command pulses as close as possible to typical pulse length to keep maximal command recognition margin.
400
580
780
1010
I/O Line
1270
Figure 13. I/O Line Command Pulses
IO LINE SHORT TO VBAT/GND DETECTION
If the chip detects that I/O Line logical value (dominant or
recessive level) differs from the value driven by the chip for
time ≥ 350 ms then I/O Line short circuit condition is
detected. In this case, the chip immediately stops driving the
I/O Line.
On-going measurement respective I/O Line data
communication is immediately interrupted. I/O Line has to
be in recessive level for at least T
I/O Line command.
time to accept the next
DEB
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NCV75215
MEASUREMENT CONTROL
The measurement can be started by T
, T
, T
selected in Configuration Memory. The figure below depicts
these modes.
SND1 REC2 REC1
or T
command pulse. Measured ultrasonic echoes can
SND2
be reported on I/O Line in 3 different modes. Modes are
Figure 14. I/O Line Measurement Modes Comparison
Table 31. I/O LINE MEASUREMENT MODES COMPARISON
Measurement
IO Line Mode
Diagnostic Pulse
IO_TRANS_DIAG_ENA
Echo Width
Information
Measurement
Can be Stopped
Echo IO Line Reporting
Standard
Yes
(optional)
Dominant pulse
Yes
No
IO_ECHO_PULSE_ENA = 0
ADV_IO_ENA = 0
Pulse Echo Reporting
Yes
(optional)
Dominant pulse
No
Yes
of 99,2 ms
IO_ECHO_PULSE_ENA = 1
ADV_IO_ENA = 0
…by at least 350 ms
dominant pulse which is
generated by the I/O Line
master.
Advanced IO Line
Yes
IO Line is idle during
measurement =>
No
Yes
(always, it is used for
acknowledge)
IO_ECHO_PULSE_ENA = 0
ADV_IO_ENA = 1
…by 100 ms dominant
pulse or any command
pulse which is generated
by the I/O Line master.
No Disturbance
Echoes times are
reported in configuration
memory index 13 and 14.
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NCV75215
TSND1/TSND2 Command (Direct Measurement); ADV_IO_ENA = 0
reveberation time
valid echo detected :
Corresponds to echo
duration (ECHO >=
THRESHOLD), min. low
pulse is corresponding to
Td
TSNDx
Tve
ECU Transmitt request
Normal state
(140 ms)
Td
IO
ECHO_DET
(Td+Tve...Td+Tdly)
BURST_PULSE_CNT[4:0]
Tdly
TX DRVA/B
ADC_DATA
Noise
monitoring
Max level
Noise
monitoring
min Tve
ECHO
start
THRESHOLD
0
valid
echo
detected
Noise free Rx input
Tx overdrives Rx
ms
Tve = typ 60
Tdly = Tve+Tfilt (max 280
Td = IO LINE debounce time
ms)
ECHO_DET signal is identifying that echo magnitude is above threshold (signal is debounced with
Tve time)
Figure 15. Send Command Sequence with Threshold Table 1 (TSND1) and Threshold Table 2 (TSND2
)
Noise Free and Defect Free Case
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NCV75215
TSND1/TSND2 Command (Direct Measurement); ADV_IO_ENA = 1
No communication during measurement.
Measured echo times are read−out from
Configuration RAM at index 13 resp. 14.
Measurement is stopped when
MEAS_DUR[3:0] time elapsed or
when IO LINE is pulled low.
reveberation time
Diag.
pulse
TSNDx
Diagnostic
response
(140 ms)
ECU Transmitt request
Td
IO
ECHO_DET
Reported ToF1
Tdly
BURST_PULSE_CNT[4:0]
TX DRVA/B
ADC_DATA
Noise
monitoring
end
Max level
ECHO
Noise
monitoring
start
min Tve
THRESHOLD
0
valid
echo
detected
Noise free Rx input
Tve = typ 60
ms
Tx overdrives Rx
Tdly = Tve+Tfilt (max 280 ms)
Td = IO LINE debounce time
ECHO_DET signal is identifying that echo magnitude is above threshold (signal is debounced with
Tve time)
Figure 16. Send Command Sequence with Threshold Table 1 (TSND1) and Threshold Table 2 (TSND2
)
Noise Free and Defect Free Case
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35
NCV75215
TREC1/TREC2 Command (Indirect Measurement); ADV_IO_ENA = 0
Trec
valid echo detected :
Corresponds to echo
duration (ECHO >=
THRESHOLD), min. low
pulse is corresponding
Normal state (140 ms)
ECU Receive request
to Tve
Td
Td
IO
Tve
ECHO_DET
Tdly
TX DRVA/B
ECHO
min Tve
NOISE monitoring end
THRESHOLD
0
valid echo
detected
Noise free Rx input
ms
Tve = typ 60
ms)
Tdly = Tve+Tfilt (max 280
Td = IO LINE debounce time
ECHO_DET signal is identifying that echo magnitude is above threshold (signal is debounced with Tve time)
Figure 17. Receive Command Sequence
Noise Free and Defect Free Case
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36
NCV75215
TREC1/TREC2 Command (Indirect Measurement); ADV_IO_ENA = 1
No communication during measurement. Measured echo times are
read−out from Configuration RAM at index 13 resp. 14.
Measurement is stopped when MEAS_DUR[3:0] time elapsed or
when IO LINE is pulled low.
Trec
Diag.
pulse
Diagnostic response (140 ms)
ECU Receive request
Td
99.2us
IO
ECHO_DET
Reported ToF1
Tdly
NOISE monitoring start
TX DRVA/B
ECHO
min Tve
NOISE monitoring end
THRESHOLD
0
valid echo
detected
Noise free Rx input
Tve = typ 60
ms
Tdly = Tve+Tfilt (max 280 ms)
Td = IO LINE debounce time
ECHO_DET signal is identifying that echo magnitude is above threshold (signal is debounced with Tve time)
Figure 18. Receive Command Sequence
Noise Free and Defect Free Case
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37
NCV75215
I/O Line
Driven by ECU
/T
T
Driven by ASSP
SNDX RECX
T
deb
= 51.2 ms
Noise: (60 ms)
OK: (140 ms)
Direct,
TD1: (230 ms)
Indirect
TX period updated required OR
Unexpected decay time OR
Reverberation time-out
TD2: (320 ms)
Under/Overvoltage OR
Thermal Shutdown OR
HW Error/EEPROM Error
T
rev
− reverberation time
T
TX
= <period> * <number of pulses>
“Known Deterministic Time”
Note: All NCV75215 generated timing has accuracy of 3%.
Figure 19. I/O Line Noise Reporting and Sensor Defect Reporting (Diagnostic Pulse)
for TSNDx and TRECx Commands
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38
NCV75215
DATA COMMUNICATION
Every I/O Line data communication starts by T
DATA
command pulse. The chip supports index data read and write
transfers.
Read index data:
1
I/O Line
R/nW
1 bit
Index
4 bits
Data payload
up to 120 (360) bits
Checksum
8 bits
TDATA
I/O Line Driven by Master (ECU)
I/O Line Driven by the Chip
Write index data:
I/O Line
0
R/nW
1 bit
Index
4 bits
Data payload
up to 120 bits
Checksum
8 bits
ACK
1 bit
TDATA
I/O Line Driven by the Chip
I/O Line Driven by Master (ECU)
Figure 20. Read and Write Index Data
Table 32. I/O LINE DATA COMMUNICATIONS COMMAND
Command Part
Command pulse T
No. of Bits
Typical Time [ms]
1270
Note
−
−
I/O Line low
I/O Line high (idle)
DATA
Data separator*
R/nW bit
100
1
300
0 … write operation, 1 … read
4 address bits
Configuration memory index
Data payload
4
1200
x
300 * x
2400
x … number of bits
Enhanced check sum
Acknowledge bit
8
(1)
−
(300)
Write operation only
I/O Line high (idle)
Command separator
> 100
*When reception of data separator is finished (identified by I/O Line falling edge of R/nW bit) temperature measurement is executed. Typical
duration of temperature measurement is 10 ms.
Total data write command time in [ms] :
The ECU should drive I/O Line low for t
[ms]
= 2/3 * T , where
typ
T
(DATA_WRITE) = 5670 + 300 * <number of data
(T
= 1/3 * T , T
BIT BIT_HIGH
DATA
BIT_LOW
BIT
payload bits>
T
= 300 ms).
BIT
Data rate is accepted from 2.7 kbit/s to 4.4 kbit/s
(typically 3.3 kbit/s).
Every data bit is modulated as I/O Line PWM pulse
according to the Figure 21.
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39
NCV75215
BIT 0
~1/3 * T
~2/3 * T
BIT
BIT
T
> 75 ms
T
BIT_HIGH
BIT_LOW
BIT 1
~2/3 * T
~1/3 * T
BIT
BIT
T
T
> 75 ms
BIT_LOW
BIT_HIGH
T
BIT
= 225…300…375 ms
Figure 21. BIT0/BIT1 Coding
Meaning of R/nW + Address bits and overview of
Configuration Memory indexes is in table below:
Table 33.
Addressing: R/nW + 4 Index
Address Bits
Config Memory Index
Configuration Memory Index Description
Temperature
R 0000
0
1
R 0001
Status byte + Reverberation period
Carrier Period
R/nW 0010
R/nW 0011
R/nW 0100
R/nW 0101
R/nW 0110
R/nW 0111
R/nW 1000
R/nW 1001
R/nW 1010
R/nW 1011
R 1100
2
3
TX burst pulse count
4
Measurement duration
5
Threshold table #1
6
Threshold table #2
7
Gain + Noise measurement setting
Dynamic gain
8
9
User data
10
11
12
13
14
15
Reverberation + TX current + other setting
Super read / write
Measurement echo magnitude data (sampled echo magnitude)
Measurement results − short
Measurement results − long
Command Byte/Chip ID
R 1101
R 1110
R/nW 1111
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40
NCV75215
CHECKSUM
Validity of data transferred over I/O Line is ensured by
Enhanced 8-bit Checksum. The checksum calculation is
explained in example below.
Example:
R/nW = 1 (read operation)
Index = 2 = 0010 bin
CARRIER_PER [10:0] = 3EA hex
11 data payload bits => 2 bytes for checksum calculation
1. 8-bit Checksum Initial Value
Bit
7
R/nW
1
6
Index bit 3
0
5
Index bit 2
0
4
Index bit 1
1
3
Index bit 0
0
2
0
0
1
0
0
0
0
0
Data
Example = 0x90
2. Data
Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
CP7
CP6
CP5
CP4
CP3
CP2
CP1
CP0
(Note 28)
Example = 0xEA
1
1
1
0
1
0
1
0
1
0
0
0
0
0
CP10
CP9
CP8
(Note 27)
(Note 27)
(Note 27)
(Note 27)
(Note 27)
Example = 0x03
0
0
0
0
0
0
1
1
27.Incomplete byte is padded by 0 s.
28.“CP” stands for CARRIER_PER.
3. Checksum Calculation
Algorithm:
4. Checksum Inversion
check_sum = 0x7E xor 0xFF = 0x81
unsigned int check_sum =
Checksum to transmit is inversion of final checksum
accumulator (not 0x7E => 0x81 to transmit/check as
checksum).
(RnW << 7) | (index << 3);
for (i=0; i<byte_count; i++)
{ check_sum = check_sum + data_byte[i];
if (check_sum > 255)
check_sum = check_sum – 255;
}
check_sum = check_sum ^ 0xFF;
Example:
check_sum = 0x90 (initial value in this example)
byte #0:
check_sum = 0x90 + 0xEA = 0x17A
check_sum = 0x17A – 0xFF = 0x7B
byte #1:
check_sum = 0x7B + 0x03 = 0x7E
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41
NCV75215
ACKNOWLEDGE BIT
Meaning of Acknowledge bit is explained in Figure 22.
Negative ACK (Error, Data Ignored)
~1/3 * T
BIT
~100 ms
Positive ACK (Data Accepted)
~2/3 * T
BIT
~ 200 ms
Figure 22. I/O Data Communication − Meaning of Acknowledge Bit
The chip transmits acknowledge bit after reception of the
last checksum bit. Acknowledge bit is transmitted after data
write transfer only.
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42
NCV75215
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F
ISSUE B
16X KREF
NOTES:
1. DIMENSIONING AND TOLERANCING PER
M
S
S
0.10 (0.004)
T
U
V
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
U
0.15 (0.006) T
K
K1
16
9
2X L/2
J1
SECTION N−N
B
−U−
L
J
PIN 1
IDENT.
N
8
0.25 (0.010)
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T
U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
N
−V−
A
B
C
4.90
4.30
−−−
5.10 0.193 0.200
4.50 0.169 0.177
F
1.20
−−− 0.047
DETAIL E
D
F
0.05
0.50
0.15 0.002 0.006
0.75 0.020 0.030
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28 0.007 0.011
−W−
C
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.10 (0.004)
DETAIL E
H
SEATING
PLANE
−T−
6.40 BSC
0.252 BSC
D
G
M
0
8
0
8
_
_
_
_
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
www.onsemi.com
43
NCV75215
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NCV75215/D
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