NCV890204MWTXG [ONSEMI]
IC SWITCHING REGULATOR, Switching Regulator or Controller;
| 型号： | NCV890204MWTXG |
| 厂家： | 
ONSEMI |
| 描述： | IC SWITCHING REGULATOR, Switching Regulator or Controller 开关 光电二极管 输出元件 |
| 文件： | 总15页 (文件大小：230K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV890204
Product Preview
2.0 A, 2 MHz Automotive
Buck Switching Regulator
with Programmable Spread
Spectrum and Adjustable
RSTB
http://onsemi.com
MARKING DIAGRAM
V8902
04
The NCV890204 is a fixed−frequency, monolithic, Buck switching
regulator intended for Automotive, battery−connected applications
that must operate with up to a 36 V input supply. The regulator is
suitable for systems with low noise and small form factor
requirements often encountered in automotive driver information
systems. The NCV890204 is capable of converting the typical 4.5 V to
18 V automotive input voltage range to outputs as low as 3.3 V at a
constant switching frequency above the sensitive AM band,
eliminating the need for costly filters and EMI countermeasures. The
NCV890204 also provides several protection features expected in
Automotive power supply systems such as current limit, short circuit
protection, and thermal shutdown. In addition, the high switching
frequency produces low output voltage ripple even when using small
inductor values and an all−ceramic output filter capacitor − forming a
space−efficient switching regulator solution.
1
ALYWG
DFN12
CASE 506CE
G
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Device
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of
this data sheet.
Features
• Internal N−Channel Power Switch
• Low V Operation Down to 4.5 V
IN
• High V Operation to 36 V
IN
• Withstands Load Dump to 40 V
• 2 MHz Free−running Switching Frequency
• Adjustable Spread Spectrum
• Thermal Shutdown (TSD)
• Low Shutdown Current
• Wettable Flanks DFN (pin edge plating)
• Reset with Adjustable Delay
• NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change
• Logic level Enable Input Can be Directly Tied to
Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Audio
• Infotainment
• Safety − Vision Systems
• Instrumentation
Battery
• 2.2 A (min) Cycle−by−Cycle Peak Current Limit
• Short Circuit Protection enhanced by Frequency
Foldback
•
1.75% Output Voltage Tolerance
• Output Voltage Adjustable Down to 0.8 V
• 1.4 Millisecond Internal Soft−Start
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
December, 2013 − Rev. P4
NCV890204/D
NCV890204
CDRV
DBST
NCV890204
L1
VOUT
COUT
VIN
VIN
SW
1
2
3
4
5
6
12
11
10
9
CBST
CIN
DFW
DRV
RSTB
GND
BST
RSTB
EN
RFB1
DELAY
FB
CDELAY
EN
COMP
RMOD
8
RFB2
RCOMP
CCOMP
RDEPTH
7
RMOD
RDEPTH
Figure 1. Typical Application
CDRV
SW
DBST
VIN
VIN
L1
VOUT
3 V
CBST
Reg
DFW
COUT
DRV
BST
Oscillator
PWM
LOGIC
ON
OFF
RSTB
RSTB
DELAY
CDELAY
+
+
+
−
Reset
Delay
FB
GND
−
COMP
Clamp
+
+
TSD
Soft−Start
RESET
COMP
Voltages
Monitors
−
RCOMP
+
EN
Enable
+
CCOMP
RMOD
RDEPTH
Spread
Spectrum
RDEPTH
RMOD
Figure 2. NCV890204 Block Diagram
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2
NCV890204
MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 40
40
Unit
V
Min/Max Voltage VIN, BST
Max Voltage VIN to SW
Min/Max Voltage SW
V
−0.7 to 40
−3.0
V
Min Voltage SW − 20 ns
Min/Max Voltage BST to SW
Min/Max Voltage on EN
Min/Max Voltage COMP
Min/Max Voltage FB
V
−0.3 to 3.6
−0.3 to 40
−0.3 to 2
−0.3 to 18
−0.3 to 3.6
−0.3 to 6
50
V
V
V
V
Min/Max Voltage DRV, DELAY, RMOD, RDEPTH
Min/Max Voltage RSTB
V
V
Thermal Resistance, 3x3 DFN Junction−to−Ambient*
Storage Temperature Range
R
°C/W
°C
°C
kV
q
JA
−55 to +150
−40 to +150
Operating Junction Temperature Range
T
J
ESD withstand Voltage
Human Body Model
Charge Device Model
V
ESD
2.0
>1.0
Moisture Sensitivity
MSL
Level 1
260
Peak Reflow Soldering Temperature
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*Mounted on 1 sq. in. of a 4−layer PCB with 1 oz. copper thickness.
RECOMMENDED OPERATING CONDITIONS
Rating
Value
Unit
V
V
IN
Range
4.5 to 36
−40 to 105
Ambient Temperature Range
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
NCV890204
VIN
SW
12
11
1
2
3
4
5
6
DRV
RESET
GND
BST
10 DELAY
FB
9
8
7
EN
COMP
RMOD
RDEPTH
(Top View)
Figure 3. Pin Connections
PIN FUNCTION DESCRIPTIONS
Pin No.
Symbol
VIN
Description
1
2
3
Input voltage from battery. Place an input filter capacitor in close proximity to this pin.
Output voltage to provide a regulated voltage to the Power Switch gate driver.
DRV
RSTB
RSTB open drain output. Goes high impedance when the output is above 94% of its regulation level,
after the delay set by the DELAY pin times out. Goes low when the output is below 92% of its regulation
level (sensed on the FB signal)
4
5
GND
EN
Battery return, and output voltage ground reference.
This TTL compatible Enable input allows the direct connection of Battery as the enable signal. Grounding
this input stops switching and reduces quiescent current draw to a minimum.
6
7
RDEPTH
RMOD
COMP
FB
Modulation depth adjustment for spread spectrum. Set with a resistor to GND.
Modulation frequency adjustment for spread spectrum. Set with a resistor to GND.
8
Error Amplifier output, for tailoring transient response with external compensation components.
Feedback input pin to program output voltage, and detect pre−charged or shorted output conditions.
Delay adjust input. Connecting an external capacitor adjusts the delay for the RSTB function.
Bootstrap input provides drive voltage higher than VIN to the N−channel Power Switch for optimum
9
10
11
DELAY
BST
switch R
and highest efficiency.
DS(on)
12
SW
Switching node of the Regulator. Connect the output inductor and cathode of the freewheeling diode to
this pin.
Exposed
Pad
Connect to Pin 4 (electrical ground) and to a low thermal resistance path to the ambient temperature
environment.
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4
NCV890204
ELECTRICAL CHARACTERISTICS (V = 4.5 V to 28 V, V = 5 V, V
= V
+ 3.0 V, C
= 0.1 mF, Min/Max values are valid
IN
EN
BST
SW
DRV
for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
J
Parameter
QUIESCENT CURRENT
Symbol
Conditions
Min
Typ
Max
Unit
Quiescent Current, shutdown
Quiescent Current, enabled
UNDERVOLTAGE LOCKOUT − VIN (UVLO)
UVLO Start Threshold
I
I
V
IN
= 13.2 V, V = 0 V, T = 25°C
5
3
mA
qSD
EN
J
V
IN
= 13.2 V
mA
qEN
V
V
V
rising
falling
4.1
3.2
0.5
4.5
3.6
1.3
V
V
V
UVLSTT
UVLSTP
UVLOHY
IN
UVLO Stop Threshold
V
IN
UVLO Hysteresis
V
ENABLE (EN)
Logic Low (Voltage input needed to guarantee
logic low)
V
0.8
V
V
ENLO
Logic High (Voltage input needed to
guarantee logic high)
V
2
8
ENHI
Input Current
I
30
2.0
mA
EN
SOFT−START (SS)
Soft−Start Completion Time
VOLTAGE REFERENCE
FB Pin Voltage during regulation
ERROR AMPLIFIER
FB Bias Current
t
SS
0.8
0.786
0.25
1.4
0.8
ms
V
V
COMP shorted to FB
0.814
1
FBR
I
V
FB
= 0.8 V
mA
FBBIAS
Transconductance
V
= 1.3 V
IN
IN
mmho
COMP
g
4.5 V < V < 18 V
0.6
0.3
1
0.5
1.5
0.75
m
g
20 V < V < 28 V
m(HV)
Output Resistance
R
1.4
MW
mA
OUT
SOURCE
COMP Source Current Limit
I
V
FB
= 0.63 V, V
= 1.3 V
COMP
4.5 V < V < 18 V
75
40
IN
20 V < V < 28 V
IN
COMP Sink Current Limit
I
V
FB
= 0.97 V, V
= 1.3 V
mA
SINK
COMP
4.5 V < V < 18 V
75
40
IN
20 V < V < 28 V
IN
Minimum COMP voltage
OSCILLATOR
V
F
V
= 0.97 V
0.05
0.55
V
CMPMIN
FB
Frequency
F
4.5 < V < 18 V
20 V < V < 28 V
1.8
0.9
2.0
1.0
2.2
1.1
MHz
SW
SW(HV)
IN
IN
VIN FREQUENCY FOLDBACK MONITOR
Frequency Foldback Threshold
V
FB
= 0.63 V
V
V
V
IN
V
IN
rising
falling
V
18.4
18
20
FLDUP
FLDDN
V
19.8
Frequency Foldback Hysteresis
RESET
V
FLDHY
0.2
0.3
0.4
K
V
V
going down
going up
90
92
92
94.5
94
97
Threshold (in percentage of targeted regula-
RESD
OUT
%
tion V
).
K
RESU
V
OUT
OUT
Filtering delay (high-to-low transitions)
Sink current
t
going down
1.5
1
2.0
3.0
ms
RESD
OUT
I
V
= 0.4 V
mA
RES
RESET
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Not tested in production. Limits are guaranteed by design.
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5
NCV890204
ELECTRICAL CHARACTERISTICS (V = 4.5 V to 28 V, V = 5 V, V
= V
+ 3.0 V, C
= 0.1 mF, Min/Max values are valid
IN
EN
BST
SW
DRV
for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
J
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DELAY
Upper charging level
V
V
> K
x V
FBR
1.6
0.7
4.1
22
1.9
0.9
4.4
29
2.15
1.1
6.0
35
V
V
DELU
FB
RESU
Lower detection threshold
Discharging current
V
V
decreasing
DELTH
DELAY
DELAY
I
V
= 1.5 V
mA
ms
DELAY
Reset delay (low-to-high transition)
SPREAD SPECTRUM
t
V
OUT
going up, C
= 100 pF
RESU
DELAY
Frequency Spread Upward
Modulating Frequency
F
RDEPTH = 5.0 kW
RMOD = 5.0 kW
24
40
33
50
42
60
%
kHz
V
depth
F
mod
RMOD Pin Voltage
V
RMOD
0.6
0.6
RDEPTH Pin Voltage
V
V
RDEPTH
Spread Spectrum Disable Resistance High
Spread Spectrum Disable Resistance Low
SLOPE COMPENSATION
R
RDEPTH and RMOD
RDEPTH and RMOD
200
kW
kW
SSDH
R
1.9
SSDL
Ramp Slope (Note 1)
(With respect to switch current)
S
4.5 < V < 18 V
1.70
0.80
3.20
1.60
A/ms
ramp
IN
S
20 V < V < 28 V
ramp(HV)
IN
POWER SWITCH
ON Resistance
R
V
= V + 3.0 V
SW
650
10
mW
mA
ns
DSON
BST
Leakage current VIN to SW
Minimum ON Time
Minimum OFF Time
I
V
= 0 V, V
= 0, V = 18 V
SW IN
LKSW
EN
t
Measured at SW pin
Measured at SW pin
45
70
ONMIN
t
ns
OFFMIN
At F
= 2 MHz (normal)
30
50
SW
At F
= 500 kHz (max duty cycle)
30
70
SW
PEAK CURRENT LIMIT
Current Limit Threshold
I
3.1
3.25
3.7
A
LIM
SHORT CIRCUIT FREQUENCY FOLDBACK
Lowest Foldback Frequency
F
V
= 0 V, 4.5 V < V < 18 V
400
200
24
500
250
32
600
300
40
kHz
SWAF
FB
IN
Lowest Foldback Frequency − High V
F
V
= 0 V, 20 V < V < 28 V
in
SWAFHV
FB IN
Hiccup Mode
F
V
SW
= 0 V
SWHIC
GATE VOLTAGE SUPPLY (DRV pin)
Output Voltage
V
3.1
2.7
2.5
16
3.3
2.9
2.8
3.5
3.05
3.0
45
V
V
DRV
DRV POR Start Threshold
DRV POR Stop Threshold
DRV Current Limit
V
V
DRVSTT
DRVSTP
DRVLIM
V
I
V
DRV
= 0 V
mA
OUTPUT PRECHARGE DETECTOR
Threshold Voltage
V
SSEN
20
35
50
mV
THERMAL SHUTDOWN
Activation Temperature (Note 1)
Hysteresis (Note 1)
T
150
5
190
20
°C
°C
SD
T
HYS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Not tested in production. Limits are guaranteed by design.
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6
NCV890204
TYPICAL CHARACTERISTICS CURVES
8
7
6
5
4
3
2
1
2.6
V
= 13.2 V
IN
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0
−50 −25
0
25
50
75
100
125
150
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 4. Shutdown Quiescent Current vs.
Junction Temperature
Figure 5. Enabled Quiescent Current vs.
Junction Temperature
4.7
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
3.8
3.7
TBD
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 6. UVLO Start Threshold vs. Junction
Temperature
Figure 7. UVLO Stop Threshold vs. Junction
Temperature
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.85
0.84
0.83
0.82
0.81
0.80
0.79
0.78
0.77
0.76
0.75
−50 −25
0
25
50
75
100
125
150
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 8. Soft−Start Duration vs. Junction
Figure 9. FB Regulation Voltage vs. Junction
Temperature
Temperature
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NCV890204
TYPICAL CHARACTERISTICS CURVES
1.4
1.2
1.0
0.8
0.6
0.4
0.2
100
90
V
IN
= 4.5 V
80
V
= 4.5 V
IN
70
60
50
40
30
20
V
IN
= 28 V
V
IN
= 28 V
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 10. Error Amplifier Transconductance
vs. Junction Temperature
Figure 11. Error Amplifier Max Sourcing
Current vs. Junction Temperature
100
90
80
70
60
50
40
30
20
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
V
= 13.2 V
IN
V
= 4.5 V
IN
V
= 28 V
IN
V
= 28 V
IN
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 12. Error Amplifier Max Sinking Current
vs. Junction Temperature
Figure 13. Oscillator Frequency vs. Junction
Temperature
19.6
19.4
19.2
19.0
18.8
18.6
18.4
18.2
900
800
700
600
500
400
300
200
100
0
V
V
FLDUP
FLDDN
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
15
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 14. Rising Frequency Foldback
Threshold vs. Junction Temperature
Figure 15. Power Switch RDS(on) vs. Junction
Temperature
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NCV890204
TYPICAL CHARACTERISTICS CURVES
80
75
70
65
60
55
50
45
40
75
70
65
60
55
50
45
40
35
−50
−25
0
25
50
75
100
125
150
150
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
T . JUNCTION TEMPERATURE (°C)
J
J
Figure 16. Minimum On Time vs. Junction
Temperature
Figure 17. Minimum Off Time vs. Junction
Temperature
2.90
2.80
2.70
2.60
2.50
2.40
2.30
2.20
2.10
2.00
600
V
= 4.5 V
IN
550
500
450
400
350
300
250
200
V
= 28 V
IN
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
T . JUNCTION TEMPERATURE (°C)
J
J
Figure 18. Current Limit Threshold vs.
Junction Temperature
Figure 19. Short−Circuit Foldback Frequency
vs. Junction Temperature
40
38
36
34
32
30
28
26
24
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
I
= 0 mA
DRV
I
= 16 mA
DRV
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 20. Hiccup Mode Frequency vs.
Junction Temperature
Figure 21. DRV Voltage vs. Junction
Temperature
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NCV890204
TYPICAL CHARACTERISTICS CURVES
3.1
3.0
2.9
2.8
2.7
2.6
2.5
30
29
28
27
V
V
DRVSTT
26
25
24
23
22
21
DRVSTP
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 22. DRV Reset Threshold vs. Junction
Temperature
Figure 23. DRV Current Limit vs. Junction
Temperature
55
50
45
40
35
30
25
20
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
Figure 24. Output Precharge Detector
Threshold vs. Junction Temperature
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NCV890204
GENERAL INFORMATION
INPUT VOLTAGE
Current Mode control method employed by the NCV890204
allows the use of a simple, Type II compensation to optimize
the dynamic response according to system requirements.
An Undervoltage Lockout (UVLO) circuit monitors the
input, and inhibits switching and resets the Soft−start circuit
if there is insufficient voltage for proper regulation. The
NCV890204 can regulate a 3.3 V output with input voltages
above 4.5 V and a 5.0 V output with an input above 6.5 V.
The NCV890204 withstands input voltages up to 40 V.
To limit the power lost in generating the drive voltage for
the Power Switch, the switching frequency is reduced by a
factor of 2 when the input voltage exceeds the V
Frequency Foldback threshold V
Frequency reduction is automatically terminated when the
input voltage drops back below the V Frequency Foldback
SLOPE COMPENSATION
A fixed slope compensation signal is generated internally
and added to the sensed current to avoid increased output
voltage ripple due to bifurcation of inductor ripple current
at duty cycles above 50%. The fixed amplitude of the slope
compensation signal requires the inductor to be greater than
a minimum value, depending on output voltage, in order to
avoid sub−harmonic oscillations. For 3.3 V and 5 V output
voltages, the recommended inductor value is 4.7 mH.
IN
(see Figure 25).
FLDUP
IN
threshold V
.
FLDDN
SHORT CIRCUIT FREQUENCY FOLDBACK
During severe output overloads or short circuits, the
NCV890204 automatically reduces its switching frequency.
This creates duty cycles small enough to limit the peak
current in the power components, while maintaining the
ability to automatically reestablish the output voltage if the
overload is removed. If the current is still too high after the
switching frequency folds back to 500 kHz, the regulator
enters an auto−recovery burst mode that further reduces the
dissipated power.
Fsw
(MHz)
2
1
CURRENT LIMITING
Due to the ripple on the inductor current, the average
output current of a buck converter is lower than the peak
current setpoint of the regulator. Figure 26 shows − for a
4.7 mH inductor − how the variation of inductor peak current
with input voltage affects the maximum DC current the
NCV890204 can deliver to a load.
4
18 20
36
VIN (V)
Figure 25. NCV890204 Switching Frequency
Reduction at High Input Voltage
2.3
2.2
ENABLE
The NCV890204 is designed to accept either a logic level
signal or battery voltage as an Enable signal. EN low induces
a ’sleep mode’ which shuts off the regulator and minimizes
(3.3 V
)
OUT
2.1
2.0
1.9
1.8
1.7
1.6
(5 V
)
OUT
its supply current to a couple of mA typically (I ) by
qSD
disabling all functions. Upon enabling, voltage is
established at the DRV pin, followed by a soft−start of the
switching regulator output.
SOFT−START
Upon being enabled or released from a fault condition,
and after the DRV voltage is established, a soft−start circuit
ramps the switching regulator error amplifier reference
voltage to the final value. During soft−start, the average
switching frequency is lower than its normal mode value
(typically 2 MHz) until the output voltage approaches
regulation.
0
5
10
15
20
25
30
35
40
INPUT VOLTAGE (V)
Figure 26. NCV890204 Load Current Capability
with 4.7 mH Inductor
ERROR AMPLIFIER
RESET WITH ADJUSTABLE DELAY
The error amplifier is a transconductance type amplifier.
The output voltage of the error amplifier controls the peak
inductor current at which the power switch shuts off. The
The RSTB pin is pulled low as long as the voltage on the
FB pin is lower than 92% (typical) of the reference voltage
(which corresponds to the output voltage being lower than
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11
NCV890204
92% of its regulation level). It is high impedence when the
voltage goes above 94% (typical) of the regulation level,
after a delay adjusted by the capacitor on the DELAY pin.
The capacitor is held at ground until the output enters
A small filtering delay (of duration t ) ensures that the
PG
RSTB signal doesn’t toggle from high to low in case of high
frequency noise when the output is in regulation.
A pull-up resistor is needed on the RSTB pin, as it features
an open collector output, capable of sinking 1 mA minimum
at 400 mV.
regulation: C
is then quickly charged to the internal
DELAY
rail voltage (V
), then discharged by the I
current
RESU
delay
until its voltage reaches the lower threshold V
. Only
The RSTB pin is also pulled low in case of UVLO (V
DELTH
IN
at this moment the RSTB pin voltage goes high, indicating
the end of the Reset condition.
below the UVLO threshold), TSD (temperature shutdown)
or Disable (V below the enable threshold) events.
EN
VOUT
time
DELAY
VDELU
VDELTH
time
RSTB
tRESU
time
Figure 27. Typical Operation of the Reset with Delay Function
SPREAD SPECTRUM
can be set from 5 kHz up to 50 kHz using a resistor from the
RMOD pin to GND. The modulation depth can be set from
3% up to 30% of the nominal switching frequency using a
resistor from the RDEPTH pin to GND. Please see the
curves below for typical values:
Spread spectrum modulates the 2 MHz internal oscillator
frequency with a triangle wave to control the depth and
frequency of modulation.
52
47
42
37
32
27
22
17
12
7
2
0
10
20
30
, (kW)
40
50
60
R
MOD
The modulation depth and modulation frequency are set
by 2 external resistors to GND. The modulation frequency
Figure 28. Modulation Frequency vs. RMOD
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12
NCV890204
30%
25%
20%
15%
10%
When operating in continuous conduction mode (CCM),
the output voltage is equal to the input voltage multiplied by
the duty ratio. Because the NCV890204 needs a sufficient
bootstrap voltage to operate, its duty cycle cannot be 100%:
it needs a minimum off time (t
) to periodically re−fuel
OFFmin
the bootstrap capacitor C . This imposes a maximum duty
BST
ratio
D
MAX + 1 * tOFFmin @ FSW(min),
with the switching frequency being folded back down to
= 500 kHz to keep regulating at the lowest input
voltage possible.
5%
0%
F
SW(min)
The drop due to the on−state resistance is simply the
0
10
20
30
40
50
60
voltage drop across the Switch resistance R
given output current:
at the
DSON
R
, (kW)
DEPTH
Figure 29. Modulation Depth vs. RDEPTH
V
SWdrop + IOUT @ RDSon
Spread spectrum is automatically turned off when there is
a short to GND or an open circuit on either the RMOD pin
or the RDEPTH pin.
Which leads to the maximum output voltage in low Vin
condition:
V
OUT + DMAX @ VIN(min) * VSWdrop
BOOTSTRAP
At the DRV pin an internal regulator provides a
EXPOSED PAD
ground−referenced voltage to an external capacitor (C
to allow fast recharge of the external bootstrap capacitor
(C ) used to supply power to the power switch gate driver.
BST
),
The exposed pad (EPAD) on the back of the package must
be electrically connected to the electrical ground (GND pin)
for proper, noise−free operation.
DRV
If the voltage at the DRV pin goes below the DRV UVLO
DESIGN METHODOLOGY
Threshold V , switching is inhibited and the
DRVSTP
The NCV890204 being a fixed−frequency regulator with
the switching element integrated, is optimized for one value
of inductor. This value is set to 4.7 mH, and the slope
compensation is adjusted for this inductor. The only
components left to be designed are the input and output
capacitor and the freewheeling diode.
Output capacitor:
The minimum output capacitor value can be calculated
based on the specification for output voltage ripple:
Soft−start circuit is reset, until the DRV pin voltage goes
back up above V
.
DRVSTT
In order for the bootstrap capacitor to stay charged, the
Switch node needs to be pulled down to ground regularly. In
very light load condition, the NCV890204 skips switching
cycles to ensure the output voltage stays regulated. When the
skip cycle repetition frequency gets too low, the bootstrap
voltage collapses and the regulator stops switching.
Practically, this means that the NCV890204 needs a
minimum load to operate correctly: to cover all conditions of
input voltage and temperature, this minimum load is 8 mA.
DIL
(eq. 1)
COUTmin
+
8 @ DVOUT @ FSW
OUTPUT PRECHARGE DETECTION
Prior to Soft−start, the FB pin is monitored to ensure the
SW voltage is low enough to have charged the external
With
− DI the inductor ripple current:
L
bootstrap capacitor (C ). If the FB pin is higher than
BST
V
OUT
V
, restart is delayed until the output has discharged.
ǒ
Ǔ
V
OUT @ 1 *
SSEN
V
IN
(eq. 2)
DIL +
THERMAL SHUTDOWN
L @ FSW
A thermal shutdown circuit inhibits switching, resets the
Soft−start circuit, and removes DRV voltage if internal
temperature exceeds a safe level. Switching is automatically
restored when temperature returns to a safe level.
− DV
the desired voltage ripple.
However, the ESR of the output capacitor also contributes
to the output voltage ripple, so to comply with the
OUT
requirement, the ESR cannot exceed R
:
ESRmax
MINIMUM DROPOUT VOLTAGE
DVOUT @ L @ FSW
RESRmax
+
When operating at low input voltages, two parameters
play a major role in imposing a minimum voltage drop
across the regulator: the minimum off time (that sets the
maximum duty cycle), and the on state resistance.
(eq. 3)
V
OUT
ǒ1 *
Ǔ
VOUT
V
IN
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13
NCV890204
Finally, the output capacitor must be able to sustain the ac
current (or RMS ripple current):
Then, knowing the thermal resistance of the package and
the amount of heatsinking on the PCB, the temperature rise
corresponding to this power dissipation can be estimated.
DIL
(eq. 4)
IOUTac
+
Ǹ
2 3
Input capacitor:
Typically, with the recommended 4.7 mH inductor, two
ceramic capacitors of 10 mF each in parallel give very good
results.
The input capacitor must sustain the RMS input ripple
current I
:
INac
DIL
D
(eq. 7)
Ǹ
IINac
+
2
3
Freewheeling diode:
It can be designed in combination with an inductor to build
an input filter to filter out the ripple current in the source, in
order to reduce EMI conducted emissions.
For example, using a 4.7 mH input capacitor, it is easy to
calculate that an inductor of 200 nH will ensure that the
input filter has a cut−off frequency below 200 kHz (low
enough to attenuate the 2 MHz ripple).
The diode must be chosen according to its maximum
current and voltage ratings, and to thermal considerations.
As far as max ratings are concerned, the maximum reverse
voltage the diode sees is the maximum input voltage (with
some margin in case of ringing on the Switch node), and the
maximum forward current the peak current limit of the
NCV890204, I
.
LIM
The power dissipated in the diode is P
:
Dloss
PCB LAYOUT RECOMMENDATION
VOUT
As with any switching power supplies, there are some
guidelines to follow to optimize the layout of the printed
circuit board for the NCV890204. However, because of the
high switching frequency extra care has to be taken.
− Minimize the area of the power current loops:
♦ Input capacitor ³ NCV890204 switch ³ Inductor
³ output capacitor ³ return through Ground
♦ Freewheeling diode ³ inductor ³ Output capacitor
³ return through ground
(eq. 5)
@ VF ) IDRMS @ RD
@ ǒ1 * Ǔ
P
Dloss + IOUT
VIN
with:
− I
the average (dc) output current
− V the forward voltage of the diode
OUT
F
− I
the RMS current in the diode:
DRMS
2
DIL
2
(
)
IOUT
(eq. 6)
1 * D ǒ
Ǔ
IDRMS
+
)
Ǹ
12
− Minimize the length of high impedance signals, and
route them far away from the power loops:
♦ Feedback trace
− R the dynamic resistance of the diode (extracted from
D
the V/I curve of the diode in its datasheet).
♦ Comp trace
ORDERING INFORMATION
†
Device
NCV890204MWTXG
Package
DFN12 with wettable flanks
Shipping
3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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14
NCV890204
PACKAGE DIMENSIONS
DFN12, 4x4, 0.65P
CASE 506CE
ISSUE O
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
A B
D
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
DETAIL A
PIN ONE
REFERENCE
E
ALTERNATE TERMINAL
CONSTRUCTIONS
MILLIMETERS
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
2X
A
0.15
2X
C
A3
b
D
0.20 REF
EXPOSED Cu
MOLD CMPD
0.25
0.35
4.00 BSC
0.15
C
D2 3.30
3.50
TOP VIEW
E
4.00 BSC
E2 2.40
2.60
DETAIL B
e
K
0.65 BSC
0.10
C
C
DETAIL B
0.20
0.30
−−−
−−−
0.50
0.15
ALTERNATE
A
L
CONSTRUCTION
L1
0.08
(A3)
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
A1
SOLDERING FOOTPRINT*
M
0.10
C A B
12X
DETAIL A
0.63
3.54
1
6
K
M
0.10
C A B
E2
4.30
2.64
12
7
12X b
12X L
e
0.10 C A B
12X
0.36
0.65
PITCH
0.05
C
NOTE 3
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NCV890204/D
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