NGB18N40CLBT4 [ONSEMI]
18 Amps, 400 Volts N−Channel D2PAK; 18安培， 400伏特N沟道D2PAK
| 型号： | NGB18N40CLBT4 |
| 厂家： | 
ONSEMI |
| 描述： | 18 Amps, 400 Volts N−Channel D2PAK |
| 文件： | 总10页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NGB18N40CLBT4
Ignition IGBT
18 Amps, 400 Volts
N−Channel D2PAK
This Logic Level Insulated Gate Bipolar Transistor (IGBT) features
monolithic circuitry integrating ESD and Over−Voltage clamped
protection for use in inductive coil drivers applications. Primary uses
include Ignition, Direct Fuel Injection, or wherever high voltage and
high current switching is required.
• Ideal for Coil−on−Plug Applications
• Gate−Emitter ESD Protection
• Temperature Compensated Gate−Collector Voltage Clamp Limits
Stress Applied to Load
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18 AMPS
400 VOLTS
VCE(on) 3 2.0 V @
IC = 10 A, VGE . 4.5 V
C
• Integrated ESD Diode Protection
• New Design Increases Unclamped Inductive Switching (UIS) Energy
Per Area
• Low Threshold Voltage to Interface Power Loads to Logic or
Microprocessor Devices
G
R
GE
• Low Saturation Voltage
• High Pulsed Current Capability
E
• Integrated Gate−Emitter Resistor (R
• Emitter Ballasting for Short−Circuit Capability
)
GE
2
D PAK
CASE 418B
STYLE 4
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Collector−Emitter Voltage
Collector−Gate Voltage
Gate−Emitter Voltage
Symbol Value
Unit
V
CES
V
CER
430
430
18
V
V
V
DC
DC
DC
MARKING
DIAGRAM
V
4
GE
Collector
Collector Current−Continuous
I
18
50
A
DC
A
AC
C
@ T = 25°C − Pulsed
C
GB
18N40B
YWW
ESD (Human Body Model)
ESD
kV
R = 1500 W, C = 100 pF
8.0
ESD (Machine Model) R = 0 W, C = 200 pF
ESD
800
V
Total Power Dissipation @ T = 25°C
P
115
0.77
Watts
W/°C
1
Gate
3
C
D
Derate above 25°C
Emitter
2
Collector
Operating and Storage Temperature Range
T , T
−55 to
+175
°C
J
stg
GB18N40B = NGB18N40CLB
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Y
WW
= Year
= Work Week
ORDERING INFORMATION
†
Device
NGB18N40CLBT4
Package
Shipping
2
D PAK
800/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
March, 2005 − Rev. 1
NGB18N40CLB/D
NGB18N40CLBT4
UNCLAMPED COLLECTOR−TO−EMITTER AVALANCHE CHARACTERISTICS (−55° ≤ T ≤ 175°C)
J
Characteristic
Symbol
Value
Unit
Single Pulse Collector−to−Emitter Avalanche Energy
E
mJ
AS
V
V
= 50 V, V = 5.0 V, Pk I = 21.1 A, L = 1.8 mH, Starting T = 25°C
400
300
CC
CC
GE L J
= 50 V, V = 5.0 V, Pk I = 18.3 A, L = 1.8 mH, Starting T = 125°C
GE
L
J
Reverse Avalanche Energy
= 100 V, V = 20 V, Pk I = 25.8 A, L = 6.0 mH, Starting T = 25°C
E
mJ
AS(R)
V
2000
CC
GE
L
J
MAXIMUM SHORT−CIRCUIT TIMES (−55°C ≤ T ≤ 150°C)
J
Characteristic
Symbol
Value
750
Unit
ms
Short Circuit Withstand Time 1 (See Figure 17, 3 Pulses with 10 ms Period)
Short Circuit Withstand Time 2 (See Figure 18, 3 Pulses with 10 ms Period)
t
t
sc1
sc2
5.0
ms
THERMAL CHARACTERISTICS
Characteristic
Symbol
Value
1.3
Unit
°C/W
°C/W
°C
Thermal Resistance, Junction−to−Case
R
q
JC
2
Thermal Resistance, Junction−to−Ambient
D PAK (Note 1)
R
q
JA
50
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds
T
275
L
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2
NGB18N40CLBT4
ELECTRICAL CHARACTERISTICS
Characteristic
OFF CHARACTERISTICS
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
Collector−Emitter Clamp Voltage
BV
T = −40°C to
380
390
395
405
420
430
V
DC
CES
J
I
= 2.0 mA
= 10 mA
C
150°C
T = −40°C to
J
I
C
150°C
Zero Gate Voltage Collector Current
I
I
T = 25°C
−
−
2.0
10
1.0
0.7
12
0.1
33
36
32
13
20
40*
10
mA
DC
CES
J
V
= 350 V,
GE
CE
T = 150°C
J
V
= 0 V
T = −40°C
J
−
Reverse Collector−Emitter Leakage Current
Reverse Collector−Emitter Clamp Voltage
T = 25°C
J
−
2.0
25*
1.0
37
mA
ECS
T = 150°C
J
−
V
= −24 V
CE
T = −40°C
J
−
B
T = 25°C
J
27
30
25
11
V
VCES(R)
DC
T = 150°C
J
40
I
= −75 mA
C
T = −40°C
J
35
Gate−Emitter Clamp Voltage
Gate−Emitter Leakage Current
Gate Emitter Resistor
BV
T = −40°C to
15
V
GES
J
DC
I
= 5.0 mA
G
150°C
I
T = −40°C to
384
10
640
16
1000
26
mA
DC
GES
J
V
= 10 V
GE
150°C
R
T = −40°C to
GE
J
kW
−
150°C
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
V
T = 25°C
1.1
0.75
1.2
−
1.4
1.0
1.6
3.4
1.9
1.4
2.1*
−
V
DC
GE(th)
J
I
= 1.0 mA,
C
V
T = 150°C
J
= V
GE
CE
T = −40°C
J
Threshold Temperature Coefficient (Nega-
tive)
−
−
−
mV/°C
Collector−to−Emitter On−Voltage
V
T = 25°C
1.0
0.9
1.1
1.3
1.2
1.4
1.4
1.5
1.4
1.8
2.0
1.7
1.3
1.3
1.4
1.4
1.3
1.45
1.6
1.55
1.6
1.8
1.8
1.8
2.2
2.4
2.1
1.8
1.75
1.8
1.6
1.6
V
DC
CE(on)
J
I
= 6.0 A,
GE
C
T = 150°C
J
V
= 4.0 V
T = −40°C
J
1.7*
1.9*
1.8
T = 25°C
J
I
V
= 8.0 A,
C
T = 150°C
J
= 4.0 V
GE
T = −40°C
J
1.9*
2.05
2.0
T = 25°C
J
I
V
= 10 A,
C
T = 150°C
J
= 4.0 V
GE
T = −40°C
J
2.1*
2.5
T = 25°C
J
I
V
= 15 A,
C
T = 150°C
J
2.6*
2.5
= 4.0 V
GE
T = −40°C
J
T = 25°C
J
2.0*
2.0*
2.0*
I
V
= 10 A,
C
T = 150°C
J
= 4.5 V
GE
T = −40°C
J
*Maximum Value of Characteristic across Temperature Range.
1. When surface mounted to an FR4 board using the minimum recommended pad size.
2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%.
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3
NGB18N40CLBT4
ELECTRICAL CHARACTERISTICS
Characteristic
ON CHARACTERISTICS (Note 2)
Forward Transconductance
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
gfs
V
= 5.0 V, I = 6.0 A
T = −40°C to
8.0
14
25
Mhos
CE
C
J
150°C
DYNAMIC CHARACTERISTICS
Input Capacitance
C
400
50
800
75
1000
100
10
pF
ISS
T = −40°C to
J
V
= 25 V, V = 0 V
CC
GE
Output Capacitance
C
OSS
RSS
150°C
f = 1.0 MHz
Transfer Capacitance
C
4.0
7.0
SWITCHING CHARACTERISTICS
Turn−Off Delay Time (Resistive)
t
t
V
G
= 300 V, I = 6.5 A
T = 25°C
−
−
−
−
4.0
9.0
0.7
4.5
10
15
mSec
mSec
d(off)
CC
C
J
R
= 1.0 kW, R = 46 W,
L
Fall Time (Resistive)
Turn−On Delay Time
Rise Time
t
V
= 300 V, I = 6.5 A
T = 25°C
J
f
CC
C
R
= 1.0 kW, R = 46 W,
G
G
G
L
V
R
= 10 V, I = 6.5 A
T = 25°C
J
4.0
7.0
d(on)
CC
C
= 1.0 kW, R = 1.5 W
L
t
V
R
= 10 V, I = 6.5 A
T = 25°C
J
r
CC
C
= 1.0 kW, R = 1.5 W
L
*Maximum Value of Characteristic across Temperature Range.
1. When surface mounted to an FR4 board using the minimum recommended pad size.
2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%.
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4
NGB18N40CLBT4
TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted)
60
50
40
30
20
10
0
60
V
= 10 V
GE
5 V
V
= 10 V
GE
50
40
30
20
10
0
5 V
4.5 V
4.5 V
4 V
T = −40°C
J
4 V
T = 25°C
J
3.5 V
3.5 V
3 V
3 V
2.5 V
2.5 V
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
CE
V
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
CE
Figure 1. Output Characteristics
Figure 2. Output Characteristics
60
55
50
45
40
35
30
25
20
15
10
60
50
40
30
20
10
0
V
= 10 V
GE
V
= 10 V
CE
T = 150°C
T = −40°C
J
J
5 V
T = 150°C
J
4.5 V
4 V
T = 25°C
J
3.5 V
3 V
2.5 V
5
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
CE
V
, GATE TO EMITTER VOLTAGE (VOLTS)
GE
Figure 3. Output Characteristics
Figure 4. Transfer Characteristics
4.0
3.5
3
T = 25°C
J
V
= 5 V
GE
2.5
I
= 25 A
= 20 A
= 15 A
= 10 A
= 5 A
C
I
= 15 A
= 10 A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
C
I
C
2
1.5
1
I
C
I
C
I
= 5 A
C
I
C
I
C
0.5
0
−50
−25
0
25
50
75
100
125 150
3
4
5
6
7
8
9
10
T , JUNCTION TEMPERATURE (°C)
J
GATE−TO−EMITTER VOLTAGE (VOLTS)
Figure 5. Collector−to−Emitter Saturation
Voltage versus Junction Temperature
Figure 6. Collector−to−Emitter Voltage versus
Gate−to−Emitter Voltage
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5
NGB18N40CLBT4
10000
3
2.5
2
T = 150°C
J
C
iss
I
I
= 15 A
= 10 A
= 5 A
1000
100
10
C
C
C
oss
1.5
1
I
C
C
rss
1
0
0.5
0
0
20
40 60 80 100 120 140 160 180 200
3
4
5
6
7
8
9
10
GATE TO EMITTER VOLTAGE (VOLTS)
V
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
CE
Figure 7. Collector−to−Emitter Voltage versus
Gate−to−Emitter Voltage
Figure 8. Capacitance Variation
30
25
20
15
10
2
V
V
R
= 50 V
= 5.0 V
= 1000 W
1.8
1.6
1.4
1.2
CC
GE
V
+ 4 s
TH
V
TH
G
L = 2 mH
V
− 4 s
TH
1
0.8
0.6
0.4
L = 3 mH
L = 6 mH
5
0
0.2
0
−50 −30 −10
10 30 50 70 90 110 130 150
−50 −25
0
25
50
75 100 125 150 175
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. Gate Threshold Voltage versus
Temperature
Figure 10. Minimum Open Secondary Latch
Current versus Temperature
30
25
20
15
10
12
10
8
V
V
R
= 50 V
= 5.0 V
= 1000 W
CC
GE
V
V
R
= 300 V
= 5.0 V
= 1000 W
CC
GE
L = 2 mH
L = 3 mH
G
t
G
f
I
= 10 A
C
L = 300 mH
6
L = 6 mH
t
d(off)
4
5
0
2
0
−50 −25
0
25
50
75 100 125 150 175
−50 −30 −10
10
30 50 70 90 110 130 150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Typical Open Secondary Latch
Current versus Temperature
Figure 12. Inductive Switching Fall Time
versus Temperature
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6
NGB18N40CLBT4
100
10
100
DC
DC
10
100 ms
1 ms
1
1
100 ms
10 ms
1 ms
10 ms
100 ms
100
0.1
0.1
100 ms
0.01
0.01
1
10
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (VOLTS)
COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 13. Single Pulse Safe Operating Area
Figure 14. Single Pulse Safe Operating Area
(Mounted on an Infinite Heatsink at TA = 255C)
(Mounted on an Infinite Heatsink at TA = 1255C)
100
10
1
100
10
1
t = 1 ms, D = 0.05
1
t = 1 ms, D = 0.05
1
t = 2 ms, D = 0.10
1
t = 2 ms, D = 0.10
1
t = 3 ms, D = 0.30
1
t = 3 ms, D = 0.30
1
0.1
0.1
0.01
0.01
1
10
100
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (VOLTS)
COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 15. Pulse Train Safe Operating Area
Figure 16. Pulse Train Safe Operating Area
(Mounted on an Infinite Heatsink at TC = 255C)
(Mounted on an Infinite Heatsink at TC = 1255C)
V
= 16 V
BATT
V
= 16 V
BATT
R = 0.1 W
L
R = 0.1 W
L
L = 10 mH
L = 10 mH
5.0 V
V
R = 1 kW
G
IN
5.0 V
V
R = 1 kW
G
IN
R
S
= 55 mW
Figure 17. Circuit Configuration for
Short Circuit Test #1
Figure 18. Circuit Configuration for
Short Circuit Test #2
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NGB18N40CLBT4
100
10
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
1
0.1
0.01
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
P
(pk)
Single Pulse
READ TIME AT t
1
t
1
0.001
0.0001
t
T
R
− T = P
@ R(t) for t ≤ 0.2 s
R
(t)
2
J(pk)
A
(pk) qJA
q
JC
DUTY CYCLE, D = t /t
1
2
0.00001
0.0001
0.001
0.01
0.1
1
t,TIME (S)
Figure 19. Transient Thermal Resistance
(Non−normalized Junction−to−Ambient mounted on
minimum pad area)
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8
NGB18N40CLBT4
PACKAGE DIMENSIONS
D2PAK 3
CASE 418B−04
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
C
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
E
V
W
−B−
INCHES
DIM MIN MAX
MILLIMETERS
4
MIN
MAX
A
B
C
D
E
F
G
H
J
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
8.64
9.65 10.29
4.06
0.51
1.14
7.87
9.65
4.83
0.89
1.40
8.89
A
S
1
2
3
2.54 BSC
0.080
0.018 0.025
0.090 0.110
0.110
2.03
0.46
2.29
1.32
7.11
5.00 REF
2.00 REF
0.99 REF
2.79
0.64
2.79
1.83
8.13
−T−
SEATING
PLANE
K
W
J
K
L
G
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625 14.60 15.88
0.045 0.055 1.14 1.40
M
N
P
R
S
V
H
D 3 PL
M
M
T B
0.13 (0.005)
STYLE 4:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
P
U
L
M
F
VIEW W−W
3
SOLDERING FOOTPRINT*
8.38
0.33
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
NGB18N40CLBT4
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NGB18N40CLB/D
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