NL27WZ125USG [ONSEMI]
Dual Buffer with 3−State Outputs; 双缓冲器，具有三态输出
| 型号： | NL27WZ125USG |
| 厂家： | 
ONSEMI |
| 描述： | Dual Buffer with 3−State Outputs |
| 文件： | 总5页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NL27WZ125
Dual Buffer with 3−State
Outputs
The NL27WZ125 is a high performance dual noninverting buffer
operating from a 1.65 V to 5.5 V supply.
Features
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MARKING
• Extremely High Speed: t 2.6 ns (typical) at V = 5 V
PD
CC
• Designed for 1.65 V to 5.5 V V Operation
CC
DIAGRAM
8
8
• Over Voltage Tolerant Inputs and Outputs
• LVTTL Compatible − Interface Capability With 5 V TTL Logic with
1
V
CC
= 3 V
M0 M G
US8
G
• LVCMOS Compatible
US SUFFIX
CASE 493
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current Substantially Reduces System
1
Power Requirements
M0
M
G
= Device Code
= Date Code*
= Pb−Free Package
• 3−State OE Input is Active−Low
• Replacement for NC7WZ125
• Chip Complexity = 72 FETs
• Pb−Free Package is Available
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon
manufacturing location.
PIN ASSIGNMENT
Pin
Function
OE
8
7
6
OE
A
V
CC
1
2
1
1
1
2
3
4
5
6
7
8
A
1
Y
2
OE
1
2
GND
A
2
Y
1
Y
1
Y
3
4
2
OE
V
2
5
A
2
GND
CC
FUNCTION TABLE
Input
Figure 1. Pinout (Top View)
Output
OE
L
A
Y
n
n
n
L
L
L
H
X
H
Z
A
1
1
Y
Y
1
H
OE
EN
1
X = Don’t Care
n = 1, 2
A
2
2
OE
2
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 5
NL27WZ125/D
NL27WZ125
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
No. of
Temp
Device Order
Number
Device
Function
Package
Suffix
Package
Type
Tape and
Reel Size
Circuit
Gates per
Range
†
Indicator Package Identifier
Technology
NL27WZ125US
NL
2
7
WZ
125
US
US8
178 mm, 3000 Unit
US8
(Pb−Free)
NL27WZ125USG
NL
2
7
WZ
125
US
178 mm, 3000 Unit
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
*0.5 to )7.0
*0.5 to )7.0
V
I
V
V
O
V
Output in High Impedance State
Output in HIGH or LOW State
*0.5 to )7.0
−0.5 to V + 0.5
CC
I
DC Input Diode Current
V < GND
*50
mA
mA
mA
mA
mA
°C
IK
I
I
DC Output Diode Current
V
O
< GND
*50
OK
I
DC Output Sink Current
$50
O
I
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
$100
CC
I
$100
GND
T
*65 to )150
STG
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
260
°C
L
T
)150
°C
J
q
(Note 1)
250
250
°C/W
mW
JA
P
D
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
MSL
Level 1
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
Supply Voltage
Operating
Data Retention Only
1.65
1.5
5.5
5.5
V
V
Input Voltage
(Note 5)
0
0
5.5
5.5
V
V
I
V
O
Output Voltage
(HIGH or LOW State)
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
*40
)85
°C
A
Dt/DV
V
CC
V
CC
V
CC
= 2.5 V $0.2 V
= 3.0 V $0.3 V
= 5.0 V $0.5 V
0
0
0
20
10
5
ns/V
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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2
NL27WZ125
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
*405C v T v 855C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
Parameter
Condition
Unit
V
IH
High−Level Input Voltage
1.65
2.3 to 5.5
0.75 V
0.75 V
0.7 V
V
CC
CC
CC
0.7 V
CC
V
Low−Level Input Voltage
High−Level Output Voltage
1.65
2.3 to 5.5
0.25 V
0.3 V
0.25 V
0.3 V
V
V
IL
CC
CC
CC
CC
V
OH
I
I
= 100 mA
= −3 mA
= −8 mA
= −12 mA
= −16 mA
= −24 mA
= −32 mA
1.65 to 5.5
1.65
2.3
V
CC
− 0.1
1.29
V
V
CC
−0.1
OH
OH
CC
V
IN
= V or V
1.52
2.1
2.4
2.7
2.5
4.0
1.29
1.9
2.2
2.4
2.3
3.8
IL
IH
I
1.9
2.2
2.4
2.3
3.8
OH
I
2.7
3.0
3.0
4.5
OH
I
OH
I
OH
I
OH
V
OL
Low−Level Output Voltage
= V
I
= 100 mA
= 3 mA
= 8 mA
= 12 mA
= 16 mA
= 24 mA
= 32 mA
1.65 to 5.5
0.1
0.24
0.3
0.4
0.4
0.55
0.55
0.1
0.24
0.3
0.4
0.4
0.55
0.55
V
OL
V
I
OL
0.08
0.20
0.22
0.28
0.38
0.42
IN
IL
I
OL
2.3
2.7
3.0
3.0
4.5
I
OL
I
OL
I
OL
I
OL
I
Input Leakage Current
V
= V or GND
5.5
0
$0.1
$1.0
mA
mA
IN
IN
CC
I
Power Off
Leakage Current
V
V
= 5.5 V
= 5.5 V
1.0
10
OFF
OUT
IN
IN
IN
I
Quiescent Supply Current
3−State Output Leakage
V
V
= V or GND
5.5
1.0
10
mA
mA
CC
CC
I
= V or V
2.3 to 5.5
$0.5
$5
OZ
IL
IH
0V v V
v 5.5 V
OUT
AC ELECTRICAL CHARACTERISTICS (t = t = 3.0 ns)
R
F
T
A
= 255C
Typ
*405C v T v 855C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
Parameter
Condition
R = 1 MW C = 15 pF
Unit
t
Propagation Delay
AN to YN
(Figures 3 and 4)
1.8 $ 0.15
2.5 $ 0.2
2.0
1.0
12
7.5
2.0
1.0
13
8
ns
PLH
L
L
t
PHL
3.3 $ 0.3
5.0 $ 0.5
3.3 $ 0.3
0.8
1.2
0.5
0.8
5.2
5.7
4.5
5.0
1.0
0.8
0.8
1.2
0.5
0.8
5.5
6.0
4.8
5.3
1.0
0.8
R = 1 MW
L
C = 15 pF
L
R = 500 W
L
C = 50 pF
L
R = 1 MW
L
C = 15 pF
L
R = 500 W
L
C = 50 pF
L
t
t
Output to Output Skew
(Note 6)
ns
ns
R = 500 W
L
C = 50 pF
L
OSLH
OSHL
R = 500 W
L
C = 50 pF 5.0 $ 0.5
L
t
t
Output Enable Time
(Figures 5, 6 and 7)
1.8 $ 0.15
2.5 $ 0.2
3.0
1.8
14
8.5
3.0
1.8
15
9.0
PZH
t
PZL
3.3 $ 0.3
5.0 $ 0.5
1.2
0.8
6.2
5.5
1.2
0.8
6.5
5.8
Output Enable Time
(Figures 5, 6 and 7)
1.8 $ 0.15
2.5 $ 0.2
2.5
1.5
12
8.0
2.5
1.5
13
8.5
ns
PHZ
t
PLZ
3.3 $ 0.3
5.0 $ 0.5
0.8
0.3
5.7
4.7
0.8
0.3
6.0
5.0
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
This specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
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3
NL27WZ125
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
7.0
Unit
pF
C
Input Capacitance
Output Capacitance
V
V
= 5.5 V, V = 0 V or V
I
IN
CC
CC
CC
C
= 5.5 V, V = 0 V or V
7.0
pF
OUT
CC
I
C
Power Dissipation Capacitance
(Note 7)
10 MHz, V = 3.3 V, V = 0 V or V
18
27
pF
PD
CC
I
CC
10 MHz, V = 5.5 V, V = 0 V or V
CC
I
CC
7. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
power consumption; P = C ꢀ V
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
t = 3 ns
f
t = 3 ns
f
OE = GND
V
CC
90%
50%
90%
50%
INPUT
OUTPUT
INPUT
A and B
10%
10%
C *
L
R
L
GND
t
t
PHL
PLH
V
V
OH
*Includes all probe and jig capacitance.
A 1 MHz square input wave is recommended for
50%
50%
OUTPUT Y
propagation delay tests.
OL
Figure 3. Switching Waveform
Figure 4. TPLH or TPHL
V
CC
50%
50%
OE
0 V
t
t
PHZ
PZH
V
CC
V
− 10%
OH
50%
50%
On
≈ 0 V
t
t
PLZ
PZL
≈ V
CC
On
V
+ 10%
OL
GND
Figure 5. AC Output Enable and Disable Waveform
2 V
CC
INPUT
INPUT
R = 500 W
1
V
CC
OUTPUT
R = 500 W
OUTPUT
R = 250 W
C = 50 pF
L
C = 50 pF
L
L
L
A 1 MHz square input wave is recommended for
propagation delay tests.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 7. TPZH or TPHZ
Figure 6. TPZL or TPL
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4
NL27WZ125
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 493−02
ISSUE B
−X−
−Y−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
A
J
8
5
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
DETAIL E
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
B
L
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED 0.0508 (0.0002 “).
1
4
R
S
G
P
U
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
H
J
K
L
M
N
P
MIN
1.90
2.20
0.60
0.17
0.20
0.50 BSC
0.40 REF
0.10
MAX
2.10
2.40
0.90
0.25
0.35
MIN
MAX
0.083
0.094
0.035
0.010
0.014
C
0.075
0.087
0.024
0.007
0.008
0.020 BSC
0.016 REF
0.004
H
−T−
SEATING
PLANE
0.10 (0.004)
T
K
N
D
R 0.10 TYP
M
M
0.10 (0.004)
T
X Y
0.18
0.10
3.20
6
0.007
0.004
0.126
6
V
0.00
3.00
0
0.000
0.118
0
_
_
_
_
5
10
5
10
_
_
_
_
0.23
0.23
0.37
0.60
0.34
0.33
0.47
0.80
0.010
0.009
0.015
0.024
0.013
0.013
0.019
0.031
F
R
S
U
V
DETAIL E
0.12 BSC
0.005 BSC
SOLDERING FOOTPRINT*
3.8
0.15
1.8
0.07
0.50
0.0197
0.30
0.012
1.0
0.0394
mm
inches
ǒ
Ǔ
SCALE 8:1
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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Order Literature: http://www.onsemi.com/litorder
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NL27WZ125/D
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