NSBC115EPDXV6T1G [ONSEMI]
Complementary Bias Resistor Transistors R1 = 100 kΩ, R2 = 100 kΩ;型号: | NSBC115EPDXV6T1G |
厂家: | ONSEMI |
描述: | Complementary Bias Resistor Transistors R1 = 100 kΩ, R2 = 100 kΩ |
文件: | 总6页 (文件大小:109K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MUN5336DW1
Complementary Bias
Resistor Transistors
R1 = 100 kW, R2 = 100 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
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PIN CONNECTIONS
(2)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
(3)
(1)
R
1
R
2
Q
1
Features
Q
2
• Simplifies Circuit Design
R
2
R
1
• Reduces Board Space
• Reduces Component Count
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
(4)
(5)
(6)
MARKING
DIAGRAM
MAXIMUM RATINGS
A
(T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
1
2
6
1
Rating
Symbol
Max
50
Unit
Vdc
SOT−363
CASE 419B
36 M G
Collector-Base Voltage
Collector-Emitter Voltage
V
CBO
V
CEO
G
50
Vdc
Collector Current − Continuous
Input Forward Voltage
I
100
40
mAdc
Vdc
C
V
36
M
G
=
=
=
Specific Device Code
Date Code*
Pb-Free Package
IN(fwd)
Input Reverse Voltage
V
IN(rev)
10
Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
†
Device
Package
Shipping
MUN5336DW1T1G
SOT−363
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
January, 2014 − Rev. 0
DTC115EP/D
MUN5336DW1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
MUN5336DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
P
D
T = 25°C
(Note 1)
187
256
1.5
2.0
mW
A
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
670
490
°C/W
q
JA
MUN5336DW1 (SOT−363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
250
385
2.0
3.0
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
R
°C/W
°C/W
°C
q
JA
(Note 1)
(Note 2)
493
325
Thermal Resistance,
Junction to Lead
R
q
JL
(Note 1)
(Note 2)
188
208
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 × 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
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2
MUN5336DW1
ELECTRICAL CHARACTERISTICS (T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.05
−
CB
E
Collector-Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter-Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector-Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector-Emitter Breakdown Voltage (Note 4)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 4)
h
FE
(I = 5.0 mA, V = 10 V)
80
150
−
C
CE
Collector-Emitter Saturation Voltage (Note 4)
(I = 10 mA, I = 0.3 mA)
V
V
CE(sat)
−
−
0.25
C
B
Input Voltage (Off)
(V = 5.0 V, I = 100 mA) (NPN)
V
Vdc
i(off)
i(on)
−
−
1.2
1.2
0.5
0.5
CE
C
(V = 5.0 V, I = 100 mA) (PNP)
CE
C
Input Voltage (On)
(V = 0.3 V, I = 3.0 mA) (NPN)
V
Vdc
3.0
3.0
1.7
1.6
−
−
CE
C
(V = 0.3 V, I = 3.0 mA) (PNP)
CE
C
Output Voltage (On)
(V = 5.0 V, V = 5.5 V, R = 1.0 kW)
V
Vdc
Vdc
kW
OL
−
−
0.2
CC
B
L
Output Voltage (Off)
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
70
−
−
CC
B
L
Input Resistor
R1
R /R
100
1.0
130
1.2
Resistor Ratio
0.8
1
2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
400
350
300
(1)
250
(1) SOT−363; 1.0 × 1.0 Inch Pad
200
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
MUN5336DW1
TYPICAL CHARACTERISTICS
MUN5336DW1 − NPN
1
1000
V
CE
= 10 V
I /I = 10
C
B
T = −25°C
A
75°C
25°C
25°C
75°C
T = −25°C
A
0.1
100
10
0.01
0
5
10
15
20
25
30
35
40
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
100
3.6
3.2
75°C
f = 10 kHz
= 0 A
T = 25°C
A
T = −25°C
A
l
E
2.8
2.4
2.0
1.6
1.2
0.8
10
1
25°C
V
O
= 5 V
35
0.4
0
0.1
0
10
20
30
40
50
0
5
10
15
20
25
30
40
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
25°C
75°C
V
O
= 0.2 V
T = −25°C
A
10
1
0.1
0
5
10
15
20
25
30
35
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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4
MUN5336DW1
TYPICAL CHARACTERISTICS
MUN5336DW1 − PNP
10
1
1000
100
25°C
I /I = 10
C
B
150°C
−55°C
25°C
150°C
0.1
10
1
−55°C
V
CE
= 10 V
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
12
10
100
10
1
150°C
f = 10 kHz
= 0 A
T = 25°C
A
I
E
−55°C
8
6
4
25°C
0.1
2
0
V
O
= 5 V
0.01
0
10
20
30
40
50
0
4
8
12
16
20
24
28
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
−55°C
25°C
10
150°C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
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5
MUN5336DW1
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
0.15
2.00
2.10
A2
DETAIL A
A
E1 1.15
e
1.25
0.65 BSC
L
L2
aaa
bbb
ccc
ddd
0.26
0.36
0.15 BSC
0.15
0.30
0.10
0.46 0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
6X
ccc C
0.10
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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DTC115EP/D
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