NSVMUN5111DW1T3G [ONSEMI]
双路 PNP 双极数字晶体管 (BRT);
| 型号： | NSVMUN5111DW1T3G |
| 厂家： | 
ONSEMI |
| 描述： | 双路 PNP 双极数字晶体管 (BRT) 数字晶体管 |
| 文件： | 总8页 (文件大小：123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MUN5111DW1,
NSBA114EDXV6,
NSBA114EDP6
Dual PNP Bias Resistor
Transistors
R1 = 10 kW, R2 = 10 kW
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PIN CONNECTIONS
(2)
PNP Transistors with Monolithic Bias
Resistor Network
(3)
(1)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
R
1
R
2
Q
1
Q
2
R
2
R
1
(4)
(5)
(6)
Features
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
MARKING DIAGRAMS
• Simplifies Circuit Design
• Reduces Board Space
6
SOT−363
CASE 419B
0A M G
• Reduces Component Count
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
1
1
Compliant
MAXIMUM RATINGS
SOT−563
CASE 463A
(T = 25°C, common for Q1 and Q2, unless otherwise noted)
0A M G
A
G
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Symbol
Max
50
Unit
Vdc
V
CBO
CEO
V
50
Vdc
SOT−963
CASE 527AD
F
M G
I
C
100
40
mAdc
Vdc
G
V
IN(fwd)
1
Input Reverse Voltage
V
10
Vdc
IN(rev)
0A/F
M
G
=
=
=
Specific Device Code
Date Code*
Pb−Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
†
Device
Package
Shipping
MUN5111DW1T1G,
SMUN5111DW1T1G
SOT−363
3,000 / Tape & Reel
NSBA114EDXV6T1G
NSBA114EDP6T5G
SOT−563
SOT−963
4,000 / Tape & Reel
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 0
DTA114ED/D
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
MUN5111DW1 (SOT−363) One Junction Heated
Total Device Dissipation
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
187
256
1.5
2.0
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
670
490
°C/W
q
JA
MUN5111DW1 (SOT−363) Both Junction Heated (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
250
385
2.0
3.0
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
493
325
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
R
188
208
q
JL
Junction and Storage Temperature Range
NSBA114EDXV6 (SOT−563) One Junction Heated
Total Device Dissipation
T , T
J
−55 to +150
stg
P
D
T = 25°C
(Note 1)
(Note 1)
357
2.9
mW
mW/°C
A
Derate above 25°C
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
D
(Note 1)
350
NSBA114EDXV6 (SOT−563) Both Junction Heated (Note 3)
Total Device Dissipation
P
T = 25°C
(Note 1)
(Note 1)
500
4.0
mW
mW/°C
A
Derate above 25°C
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
(Note 1)
250
Junction and Storage Temperature Range
NSBA114EDP6 (SOT−963) One Junction Heated
Total Device Dissipation
T , T
−55 to +150
°C
J
stg
P
D
T = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
231
269
1.9
2.2
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
R
540
464
°C/W
q
JA
NSBA114EDP6 (SOT−963) Both Junction Heated (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
339
408
2.7
3.3
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
R
369
306
°C/W
°C
q
JA
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
2
2
4. FR−4 @ 100 mm , 1 oz. copper traces, still air.
5. FR−4 @ 500 mm , 1 oz. copper traces, still air.
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2
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
ELECTRICAL CHARACTERISTICS (T = 25°C, common for Q and Q , unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.5
−
CB
E
Collector−Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector−Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector−Emitter Breakdown Voltage (Note 6)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 6)
h
FE
(I = 5.0 mA, V = 10 V)
35
−
60
−
−
0.25
−
C
CE
Collector−Emitter Saturation Voltage (Note 6)
(I = 10 mA, I = 0.3 mA)
V
Vdc
Vdc
Vdc
Vdc
Vdc
kW
CE(sat)
C
B
Input Voltage (off)
(V = 5.0 V, I = 100 mA)
V
V
i(off)
−
1.2
2.2
−
CE
C
Input Voltage (on)
(V = 0.2 V, I = 10 mA)
i(on)
−
−
CE
C
Output Voltage (on)
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
−
0.2
CC
B
L
Output Voltage (off)
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
7.0
0.8
−
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
10
1.0
13
1.2
1
2
6. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
400
350
300
250
(1) SOT−363; 1.0 x 1.0 inch Pad
(2) SOT−563; Minimum Pad
2
(3) SOT−963; 100 mm , 1 oz. copper trace
200
(1) (2) (3)
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
TYPICAL CHARACTERISTICS
MUN5111DW1, NSBA114EDXV6
1
1000
I /I = 10
V
CE
= 10 V
C
B
T = −25°C
A
25°C
T = 75°C
A
75°C
0.1
0.01
10
100
10
−25°C
25°C
20
0
40
60
80
1
10
100
I , COLLECTOR CURRENT (mA)
I , COLLECTOR CURRENT (mA)
C
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
100
10
1
25°C
T = −25°C
75°C
f = 10 kHz
= 0 A
9
8
7
6
5
4
3
2
1
l
E
A
T = 25°C
A
0.1
0.01
V
O
= 5 V
9
0
0
0.001
10
20
30
40
50
0
1
2
3
4
5
6
7
8
10
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 5. Output Current vs. Input Voltage
Figure 4. Output Capacitance
100
V
O
= 0.2 V
T = −25°C
A
10
25°C
75°C
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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4
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
TYPICAL CHARACTERISTICS
NSBA114EDP6
1
1000
100
I /I = 10
C
B
25°C
150°C
−55°C
25°C
150°C
0.1
10
1
−55°C
V
CE
= 10 V
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
7
6
100
10
1
150°C
f = 10 kHz
= 0 A
T = 25°C
A
−55°C
I
E
5
4
3
2
25°C
0.1
1
0
V
O
= 5 V
7
0.01
0
10
20
30
40
50
0
1
2
3
4
5
6
8
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
25°C
10
−55°C
1
150°C
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
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5
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
D
e
MILLIMETERS
DIM MIN NOM MAX
0.80
INCHES
NOM MAX
1.10 0.031 0.037 0.043
0.10 0.000 0.002 0.004
0.008 REF
MIN
A
0.95
0.05
A1 0.00
6
1
5
2
4
3
A3
0.20 REF
0.21
0.14
2.00
1.25
b
C
D
E
e
0.10
0.10
1.80
1.15
0.30 0.004 0.008 0.012
0.25 0.004 0.005 0.010
2.20 0.070 0.078 0.086
1.35 0.045 0.049 0.053
0.026 BSC
H
−E−
E
0.65 BSC
L
0.10
2.00
0.20
2.10
0.30 0.004 0.008 0.012
2.20 0.078 0.082 0.086
H
E
b 6 PL
M
M
E
0.2 (0.008)
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
SC−88/SC70−6/SOT−363
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
−X−
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
A
L
6
5
2
4
3
MILLIMETERS
DIM MIN NOM MAX
INCHES
NOM MAX
E
−Y−
MIN
H
E
A
b
C
D
E
e
0.50
0.17
0.08
1.50
1.10
0.55
0.22
0.12
1.60
1.20
0.5 BSC
0.20
0.60 0.020 0.021 0.023
0.27 0.007 0.009 0.011
0.18 0.003 0.005 0.007
1.70 0.059 0.062 0.066
1.30 0.043 0.047 0.051
0.02 BSC
1
b 56 PL
C
e
M
0.08 (0.003)
X Y
L
0.10
1.50
0.30 0.004 0.008 0.012
1.70 0.059 0.062 0.066
H
1.60
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MUN5111DW1, NSBA114EDXV6, NSBA114EDP6
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
NOTES:
D
X
Y
1. DIMENSIONING AND TOLERANCING PER ASME
A
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
6
5
4
3
H
E
E
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
0.80
0.35 BSC
1.00
0.19 REF
0.10
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
C
D
E
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
6X
L
e
HE
0.95
0.05
1.05
0.15
L
L2
6X
b
6X
L2
0.08
X Y
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT
6X
6X
0.35
0.20
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
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DTA114ED/D
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