NTLJD4150P [ONSEMI]

Power MOSFET -30 V, -3.4 A, uCool TM Dual P-Channel,2x2 mm WDFN Package; 功率MOSFET -30 V, -3.4 A, uCool TM双P沟道, 2×2毫米的WDFN封装
NTLJD4150P
型号: NTLJD4150P
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET -30 V, -3.4 A, uCool TM Dual P-Channel,2x2 mm WDFN Package
功率MOSFET -30 V, -3.4 A, uCool TM双P沟道, 2×2毫米的WDFN封装

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NTLJD4150P  
Power MOSFET  
−30 V, 3.4 A, mCoolt Dual P−Channel,  
2x2 mm WDFN Package  
Features  
http://onsemi.com  
WDFN 2x2 mm Package Provides Exposed Drain Pad for  
Excellent Thermal Conduction  
R
DS(on)  
Max  
I
Max (Note 1)  
D
V
(BR)DSS  
Footprint Same as SC−88 Package  
135 mW @ 10 V  
200 mW @ 4.5 V  
−30 V  
−3.4 A  
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments  
Bidirectional Current Flow with Common Source Configuration  
This is a Pb−Free Device  
S1  
S2  
Applications  
Li−Ion Battery Charging and Protection Circuits  
LED Backlight, Flashlight  
Dual−High Side Load Switch  
G1  
G2  
D1  
D2  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
P−CHANNEL MOSFET P−CHANNEL MOSFET  
Parameter  
Drain−to−Source Voltage  
Symbol Value Unit  
V
−30  
20  
V
V
A
DSS  
MARKING  
DIAGRAM  
D2  
D1  
Gate−to−Source Voltage  
V
GS  
Continuous Drain Current  
(Note 1)  
I
D
T = 25°C  
−2.7  
−2.0  
−3.4  
1.5  
A
Steady  
State  
1
2
3
6
5
4
JE M G  
T = 85°C  
A
WDFN6  
G
CASE 506AN  
Pin 1  
t 5 s  
T = 25°C  
A
Power Dissipation  
(Note 1)  
P
W
Steady  
State  
D
D
JE  
M
G
= Specific Device Code  
= Date Code  
T = 25°C  
A
t 5 s  
2.3  
−1.8  
−1.4  
0.7  
= Pb−Free Package  
Continuous Drain Current  
(Note 2)  
I
A
T = 25°C  
A
D
(Note: Microdot may be in either location)  
T = 85°C  
A
Steady  
State  
Power Dissipation  
(Note 2)  
P
W
PIN CONNECTIONS  
D1  
T = 25°C  
A
Pulsed Drain Current  
t = 10 ms  
p
I
−14  
A
DM  
S1  
G1  
D2  
D1  
G2  
S2  
1
2
3
6
5
4
Operating Junction and Storage Temperature  
T ,  
−55 to  
150  
°C  
J
T
STG  
Source Current (Body Diode) (Note 2)  
I
−1.8  
260  
A
S
D2  
Lead Temperature for Soldering Purposes  
T
°C  
L
(1/8from case for 10 s)  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
(Top View)  
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq  
[2 oz] including traces).  
2. Surface Mounted on FR4 Board using the minimum recommended pad size.  
ORDERING INFORMATION  
Device  
NTLJD4150PTBG  
Package  
Shipping  
WDFN6  
3000 / Tape &  
Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
January, 2007 − Rev. 0  
NTLJD4150P/D  
 
NTLJD4150P  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Max  
Unit  
SINGLE OPERATION (SELF−HEATED)  
Junction−to−Ambient – Steady State (Note 3)  
Junction−to−Ambient – Steady State Min Pad (Note 4)  
Junction−to−Ambient – t 5 s (Note 3)  
R
83  
177  
54  
q
JA  
q
JA  
q
JA  
R
R
°C/W  
DUAL OPERATION (EQUALLY HEATED)  
Junction−to−Ambient – Steady State (Note 3)  
Junction−to−Ambient – Steady State Min Pad (Note 3)  
Junction−to−Ambient – t 5 s (Note 3)  
R
q
JA  
R
q
JA  
R
q
JA  
58  
133  
40  
°C/W  
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).  
2
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm , 2 oz Cu).  
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage  
V
V
= 0 V, I = −250 mA  
−30.0  
V
(BR)DSS  
GS  
D
Drain−to−Source Breakdown Voltage  
Temperature Coefficient  
V
/T  
(BR)DSS  
I
= −250 mA, Ref to 25°C  
1.9  
mV/°C  
J
D
Zero Gate Voltage Drain Current  
I
T = 25°C  
−1.0  
−5.0  
100  
mA  
DSS  
J
V
= −24 V, V = 0 V  
GS  
DS  
T = 85°C  
J
Gate−to−Source Leakage Current  
ON CHARACTERISTICS (Note 5)  
Gate Threshold Voltage  
I
V
= 0 V, V =  
GS  
20 V  
nA  
GSS  
DS  
V
V
= V , I = −250 mA  
−1.0  
−1.5  
0.4  
−2.0  
V
GS(TH)  
GS  
DS  
D
Gate Threshold  
Temperature Coefficient  
V
/T  
mV/°C  
GS(TH)  
J
Drain−to−Source On−Resistance  
Forward Transconductance  
R
V
= −10 V, I = −4.0 A  
95  
156  
1.5  
135  
200  
mW  
mW  
S
DS(on)  
GS  
GS  
D
V
= −4.5 V, I = −3.0 A  
D
g
FS  
V
= −10 V, I = −1.0 A  
DS D  
CHARGES, CAPACITANCES AND GATE RESISTANCE  
Input Capacitance  
C
300  
50  
pF  
nC  
ISS  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge  
C
OSS  
C
RSS  
V
= 0 V, f = 1 MHz, V = −15 V  
DS  
GS  
30  
Q
3.6  
4.5  
G(TOT)  
Threshold Gate Charge  
Gate−to−Source Charge  
Gate−to−Drain Charge  
Gate Resistance  
Q
0.44  
0.79  
1.54  
10.6  
G(TH)  
V
=−4.5 V, V = −15 V, I = −2.0 A  
DS D  
GS  
Q
GS  
GD  
Q
R
G
W
SWITCHING CHARACTERISTICS (Note 6)  
Turn−On Delay Time  
t
7.0  
16.2  
11.8  
8.8  
ns  
d(ON)  
Rise Time  
t
r
V
= −4.5 V, V = −24 V,  
DD  
GS  
I
= −3.0 A, R = 2 W  
D
G
Turn−Off Delay Time  
Fall Time  
t
d(OFF)  
t
f
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NTLJD4150P  
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)  
J
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
DRAIN−SOURCE DIODE CHARACTERISTICS  
Forward Recovery Voltage  
V
T = 25°C  
−0.85  
−0.77  
8.9  
−1.0  
SD  
J
V
= 0 V,  
= −2.0 A  
GS  
V
I
S
T = 85°C  
J
Reverse Recovery Time  
Charge Time  
t
RR  
t
6.2  
ns  
a
V
= 0 V, d /d = 100 A/ms,  
ISD t  
GS  
I = −2.0 A  
S
Discharge Time  
t
2.9  
b
Reverse Recovery Time  
Q
3.0  
nC  
RR  
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
3
NTLJD4150P  
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)  
J
10  
8
−6 V  
−4.8 V  
T = 25°C  
−10V  
to  
−7V  
J
V
10 V  
DS  
9
8
7
6
5
4
3
7
6
5
4
3
2
−4.6 V  
−4.2 V  
−3.8 V  
−3.4 V  
T = 125°C  
J
−3.0 V  
−2.6 V  
T = 85°C  
J
2
1
T = 25°C  
J
1
0
T = −55°C  
J
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8  
1
2
3
4
5
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)  
GS  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.20  
0.18  
0.16  
0.14  
0.12  
0.10  
0.08  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
V
= −10 V  
T = 25°C  
GS  
J
T = 125°C  
J
T = 85°C  
J
V
= −4.5 V  
GS  
0.3  
0.2  
0.1  
0
T = 25°C  
J
V
= −10 V  
9
GS  
0.06  
0.04  
T = −55°C  
J
1.0  
2.0  
3.0  
4.0  
1
2
3
4
5
6
7
8
10  
−I , DRAIN CURRENT (AMPS)  
D
−I , DRAIN CURRENT (AMPS)  
D
Figure 3. On−Resistance versus Drain Current  
Figure 4. On−Resistance versus Drain Current  
and Gate Voltage  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
1000  
100  
V = 0 V  
GS  
I
V
= −3.0 A  
D
= −10 V  
GS  
T = 125°C  
J
T = 100°C  
J
10  
1
T = 85°C  
J
0.8  
0.7  
0.1  
−50  
−25  
0
25  
50  
75  
100 125  
150  
0
5
10  
15  
20  
25  
30  
T , JUNCTION TEMPERATURE (°C)  
J
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−to−Source Leakage Current  
versus Voltage  
http://onsemi.com  
4
NTLJD4150P  
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)  
J
500  
400  
300  
200  
6
20  
16  
12  
8
V
= 0 V  
GS  
QT  
T = 25°C  
V
J
DS  
5
4
C
iss  
Q
Q
V
GS  
GD  
GS  
3
2
C
oss  
100  
0
4
0
1
0
I
= −3.0 A  
D
T = 25°C  
J
C
rss  
0
5
10  
15  
20  
25  
30  
0 0.20.40.60.8 1 1.21.41.61.8 2 2.22.42.62.8 3 3.23.43.6  
DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
Q , TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate−To−Source and Drain−To−Source  
Voltage versus Total Charge  
100  
10  
1
4
3
2
V
I
V
= −24 V  
= −3.0 A  
= −4.5 V  
V
= 0 V  
GS  
DD  
T = 25°C  
D
J
GS  
t
r
t
d(off)  
t
f
t
d(on)  
1
0
1
10  
100  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0  
R , GATE RESISTANCE (OHMS)  
G
−V , SOURCE−TO−DRAIN VOLTAGE (VOLTS)  
SD  
Figure 9. Resistive Switching Time  
Variation versus Gate Resistance  
Figure 10. Diode Forward Voltage versus Current  
10  
10 ms  
100 ms  
1 ms  
1
10 ms  
*See Note 2 on Page 1  
= 25°C  
T
C
T = 150°C  
J
0.1  
SINGLE PULSE  
dc  
R
DS(on)  
LIMIT  
THERMAL LIMIT  
PACKAGE LIMIT  
0.01  
0.1  
1
10  
100  
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
5
NTLJD4150P  
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)  
J
1000  
100  
D = 0.5  
0.2  
0.1  
*See Note 2 on Page 1  
10  
P
(pk)  
0.05  
0.02  
0.01  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
READ TIME AT t  
1
1
t
1
T
− T = P  
R (t)  
q
JA  
J(pk)  
A
(pk)  
t
2
SINGLE PULSE  
0.00001 0.0001  
DUTY CYCLE, D = t /t  
1
2
0.1  
0.000001  
0.001  
0.01  
t, TIME (s)  
0.1  
1
10  
100  
1000  
Figure 12. Thermal Response  
http://onsemi.com  
6
NTLJD4150P  
PACKAGE DIMENSIONS  
WDFN6 2x2  
CASE 506AN−01  
ISSUE C  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED  
TERMINAL AND IS MEASURED BETWEEN  
0.15 AND 0.20mm FROM TERMINAL.  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
D
A
B
E
MILLIMETERS  
PIN ONE  
REFERENCE  
DIM  
A
MIN  
0.70  
0.00  
MAX  
0.80  
0.05  
A1  
A3  
b
0.20 REF  
2X  
0.10  
C
0.25  
0.35  
D
2.00 BSC  
D2  
E
0.57  
2.00 BSC  
0.77  
2X  
0.10  
C
E2  
e
0.90  
1.10  
0.65 BSC  
0.25 REF  
0.20 0.30  
0.15 REF  
K
A3  
L
0.10  
C
J
A
SOLDERMASK DEFINED  
MOUNTING FOOTPRINT*  
6X  
0.08  
C
A1  
D2  
SEATING  
C
PLANE  
6X  
2.30  
D2  
6X  
0.35  
0.43  
4X  
e
6X  
L
1
3
1
0.65  
PITCH  
2XE2  
6
4
6X  
0.25  
K
b
6X  
0.10  
0.05  
C
C
A
B
6X J  
2X  
NOTE 3  
BOTTOM VIEW  
0.72  
1.05  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
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ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NTLJD4150P/D  

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