NTMFD4901NFT3G [ONSEMI]

Dual N-Channel Power MOSFET;
NTMFD4901NFT3G
型号: NTMFD4901NFT3G
厂家: ONSEMI    ONSEMI
描述:

Dual N-Channel Power MOSFET

开关 脉冲 光电二极管 晶体管
文件: 总12页 (文件大小:113K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NTMFD4901NF  
Dual N-Channel Power  
MOSFET with Integrated  
Schottky  
30 V, High Side 18 A / Low Side 30 A, Dual  
N−Channel SO8FL  
http://onsemi.com  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
Features  
6.5 mW @ 10 V  
10 mW @ 4.5 V  
2.35 mW @ 10 V  
3.5 mW @ 4.5 V  
Q1 Top FET  
30 V  
Co−Packaged Power Stage Solution to Minimize Board Space  
Low Side MOSFET with Integrated Schottky  
Minimized Parasitic Inductances  
Optimized Devices to Reduce Power Losses  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
18 A  
30 A  
Q2 Bottom  
FET  
30 V  
D1  
(2, 3, 4, 9)  
Applications  
DC−DC Converters  
System Voltage Rails  
Point of Load  
(1) G1  
S1/D2 (10)  
(8) G2  
S2 (5, 6, 7)  
PIN CONNECTIONS  
D1 4  
5 S2  
6 S2  
7 S2  
8 G2  
D1 3  
D1 2  
G1 1  
9
D1  
10  
S1/D2  
(Bottom View)  
MARKING  
DIAGRAM  
1
DFN8  
CASE 506BX  
4901NF  
AYWZZ  
1
4901NF = Specific Device Code  
A
Y
= Assembly Location  
= Year  
W
ZZ  
= Work Week  
= Lot Traceability  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
June, 2014 − Rev. 6  
NTMFD4901NF/D  
NTMFD4901NF  
MAXIMUM RATINGS (T = 25°C unless otherwise stated)  
J
Parameter  
Symbol  
Value  
Unit  
Drain−to−Source Voltage  
Drain−to−Source Voltage  
Gate−to−Source Voltage  
Gate−to−Source Voltage  
Q1  
Q2  
Q1  
Q2  
Q1  
V
30  
V
DSS  
V
20  
V
GS  
Continuous Drain Current R  
(Note 1)  
T = 25°C  
I
D
13.5  
9.7  
q
JA  
A
T = 85°C  
A
A
T = 25°C  
A
Q2  
23.4  
16.9  
1.90  
2.07  
18.2  
13.1  
30.3  
21.8  
3.45  
3.45  
10.3  
7.4  
T = 85°C  
A
Power Dissipation R  
(Note 1)  
T = 25°C  
A
Q1  
Q2  
Q1  
P
W
q
D
D
D
JA  
Continuous Drain Current R  
10 s (Note 1)  
T = 25°C  
A
I
D
q
JA  
T = 85°C  
A
A
T = 25°C  
A
Q2  
Steady  
State  
T = 85°C  
A
Power Dissipation R  
10 s (Note 1)  
T = 25°C  
A
Q1  
Q2  
Q1  
P
I
W
q
JA  
Continuous Drain Current R  
(Note 2)  
T = 25°C  
A
q
D
JA  
T = 85°C  
A
A
T = 25°C  
A
Q2  
17.9  
12.9  
1.10  
1.20  
60  
T = 85°C  
A
Power Dissipation R  
(Note 2)  
T = 25 °C  
A
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
P
W
A
q
JA  
Pulsed Drain Current  
T = 25°C  
I
DM  
A
t = 10 ms  
p
100  
Operating Junction and Storage Temperature  
Source Current (Body Diode)  
Drain to Source dV/dt  
T , T  
J
−55 to +150  
°C  
A
STG  
I
S
3.4  
4.9  
6
dV/dt  
EAS  
EAS  
V/ns  
mJ  
Single Pulse Drain−to−Source Avalanche Energy (T = 25C, V  
24 A  
48 A  
Q1  
Q2  
28.8  
115  
260  
J
DD  
= 50 V, V = 10 V, I = XX A , L = 0.1 mH, R = 25 W)  
GS  
L
pk  
G
Lead Temperature for Soldering Purposes  
(1/8” from case for 10 s)  
T
°C  
L
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.  
2. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm .  
2
http://onsemi.com  
2
 
NTMFD4901NF  
THERMAL RESISTANCE MAXIMUM RATINGS  
Parameter  
FET  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Symbol  
Value  
65.9  
60.5  
113.2  
104  
Unit  
Junction−to−Ambient – Steady State (Note 3)  
R
q
q
q
JA  
JA  
JA  
Junction−to−Ambient – Steady State (Note 4)  
R
R
°C/W  
Junction−to−Ambient – (t 10 s) (Note 3)  
36.2  
36.2  
3. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.  
4. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm .  
2
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
FET  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Break-  
down Voltage  
Q1  
Q2  
Q1  
Q2  
Q1  
V
30  
30  
V
V
= 0 V, I = 250 mA  
(BR)DSS  
GS  
D
V
= 0 V, I = 1 mA  
D
GS  
Drain−to−Source Break-  
down Voltage Temperature  
Coefficient  
V
18  
15  
mV /  
°C  
(BR)DSS  
/ T  
J
Zero Gate Voltage Drain  
Current  
I
V
V
= 0 V,  
= 24 V  
T = 25°C  
J
1
mA  
DSS  
GS  
DS  
T = 125°C  
J
10  
Q2  
V
V
= 0 V,  
= 24 V  
T = 25°C  
J
500  
GS  
DS  
Gate−to−Source Leakage  
Current  
Q1  
Q2  
I
V
= 0 V, VDS = 20 V  
100  
100  
nA  
V
GSS  
GS  
ON CHARACTERISTICS (Note 5)  
Gate Threshold Voltage  
Q1  
V
V
= V , I = 250 mA  
1.2  
1.2  
2.2  
2.2  
GS(TH)  
GS  
DS  
D
Q2  
Q1  
Q2  
Q1  
Negative Threshold Temper-  
ature Coefficient  
V
/
4.5  
4.0  
5.2  
8.0  
1.9  
2.8  
28  
mV /  
°C  
GS(TH)  
T
J
Drain−to−Source On Resist-  
ance  
R
V
= 10 V  
= 4.5 V  
= 10 V  
= 4.5 V  
I
D
I
D
I
D
I
D
= 10 A  
= 10 A  
= 20 A  
= 20 A  
6.5  
10  
DS(on)  
GS  
V
GS  
mW  
Q2  
V
2.35  
3.5  
GS  
GS  
V
Forward Transconductance  
Q1  
Q2  
g
V
= 1.5 V, I = 10 A  
S
FS  
DS  
D
45  
5. Pulse Test: pulse width 300 ms, duty cycle 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
3
 
NTMFD4901NF  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
FET  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
CHARGES, CAPACITANCES & GATE RESISTANCE  
Q1  
1150  
2950  
360  
1100  
105  
82  
Input Capacitance  
C
ISS  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Output Capacitance  
Reverse Capacitance  
Total Gate Charge  
C
OSS  
C
RSS  
V
= 0 V, f = 1 MHz, V = 15 V  
pF  
GS  
DS  
9.7  
Q
G(TOT)  
20  
1.1  
Threshold Gate Charge  
Gate−to−Source Charge  
Gate−to−Drain Charge  
Total Gate Charge  
Q
G(TH)  
2.7  
V
GS  
= 4.5 V, V = 15 V; I = 10 A  
nC  
nC  
DS  
D
3.3  
Q
GS  
GD  
7.3  
3.7  
Q
5.3  
19.1  
42.7  
Q
V
= 10 V, V = 15 V; I = 10 A  
G(TOT)  
GS DS D  
SWITCHING CHARACTERISTICS (Note 6)  
Q1  
9.0  
14  
15  
16  
14  
25  
4.0  
7.0  
Turn−On Delay Time  
Rise Time  
t
d(ON)  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
t
r
V
= 4.5 V, V = 15 V,  
DS  
GS  
ns  
I
D
= 10 A, R = 3.0 W  
G
Turn−Off Delay Time  
Fall Time  
t
d(OFF)  
t
f
SWITCHING CHARACTERISTICS (Note 6)  
Q1  
6.0  
10  
14  
15  
17  
32  
3.0  
5.0  
Turn−On Delay Time  
Rise Time  
t
d(ON)  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
t
r
V
= 10 V, V = 15 V,  
DS  
GS  
ns  
I
D
= 10 A, R = 3.0 W  
G
Turn−Off Delay Time  
Fall Time  
t
d(OFF)  
t
f
5. Pulse Test: pulse width 300 ms, duty cycle 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
4
NTMFD4901NF  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
FET  
Symbol  
Test Condition  
Min  
Typ  
Max  
1.0  
Unit  
DRAIN−SOURCE DIODE CHARACTERISTICS  
T = 25°C  
J
0.75  
0.62  
0.45  
0.37  
23  
V
I
= 0 V,  
GS  
S
Q1  
= 3 A  
T = 125°C  
J
Forward Voltage  
V
SD  
V
T = 25°C  
0.70  
J
V
GS  
= 0 V,  
= 2 A  
Q2  
I
S
T = 125°C  
J
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Reverse Recovery Time  
Charge Time  
t
RR  
40  
12  
ta  
ns  
21  
V
= 0 V, d /d = 100 A/ms, I = 3 A  
IS t S  
GS  
11  
Discharge Time  
tb  
19  
12  
Reverse Recovery Charge  
Q
nC  
RR  
40  
PACKAGE PARASITIC VALUES  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
0.38  
0.65  
0.054  
0.007  
1.5  
Source Inductance  
Drain Inductance  
Gate Inductance  
Gate Resistance  
L
nH  
nH  
nH  
W
S
D
G
L
T = 25°C  
A
L
1.5  
0.8  
R
G
0.8  
5. Pulse Test: pulse width 300 ms, duty cycle 2%.  
6. Switching characteristics are independent of operating junction temperatures.  
ORDERING INFORMATION  
Device  
NTMFD4901NFT1G  
Package  
Shipping  
DFN8  
(Pb−Free)  
1500 / Tape & Reel  
5000 / Tape & Reel  
NTMFD4901NFT3G  
DFN8  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
5
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q1  
40  
35  
30  
25  
20  
15  
10  
5
50  
3.8 V  
3.6 V  
3.4 V  
3.2 V  
V
DS  
5 V  
45  
40  
35  
30  
25  
20  
15  
10  
5
4.5 V  
10 V  
T = 25°C  
J
T = 125°C  
J
3.0 V  
2.8 V  
T = 25°C  
J
T = −55°C  
J
V
GS  
= 2.4 V  
0
0
0
1
2
3
4
5
0
1
2
3
4
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
V
GS  
, GATE−TO−SOURCE VOLTAGE (V)  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.020  
0.018  
0.016  
0.014  
0.012  
0.010  
0.008  
0.006  
0.010  
0.009  
0.008  
0.007  
I
= 10 A  
D
T = 25°C  
T = 25°C  
J
V
V
= 4.5 V  
= 10 V  
GS  
0.006  
0.005  
0.004  
0.003  
GS  
0.004  
0.002  
2
3
4
5
6
7
8
9
10  
0
5
10  
15  
20  
25  
30  
35  
40  
V
GS  
, GATE−TO−SOURCE VOLTAGE (V)  
I , DRAIN CURRENT (A)  
D
Figure 3. On−Resistance vs. Gate−to−Source  
Resistance  
Figure 4. On−Resistance vs. Drain Current and  
Gate Voltage  
10,000  
1,000  
1.8  
1.6  
I
V
= 10 A  
D
T = 150°C  
J
= 10 V  
GS  
1.4  
1.2  
T = 125°C  
J
1.0  
0.8  
0.6  
100  
10  
V
= 0 V  
GS  
−50 −25  
0
25  
50  
75  
100 125  
150  
0
5
10  
, DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
15  
20  
25  
30  
T , JUNCTION TEMPERATURE (°C)  
V
J
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−to−Source Leakage Current  
vs. Voltage  
http://onsemi.com  
6
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q1  
1600  
1400  
1200  
1000  
800  
11  
QT  
T = 25°C  
GS  
J
V
10  
9
= 0 V  
C
iss  
8
7
6
5
C
oss  
600  
4
Qgs  
Qgd  
3
2
1
0
400  
C
rss  
I
= 10 A  
200  
0
D
T = 25°C  
J
0
5
10  
15  
20  
25  
30  
0
2
4
6
8
10  
12 14 16 18 20  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
Qg, TOTAL GATE CHARGE (nC)  
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
10  
9
1000  
100  
V
V
= 10 V  
= 15 V  
= 10 A  
V
GS  
= 0 V  
GS  
DD  
8
I
D
t
d(off)  
7
6
t
r
5
4
10  
1
t
d(on)  
3
T = 25°C  
J
2
t
f
1
0
1
10  
R , GATE RESISTANCE (W)  
100  
0.0 0.1  
0.2 0.3  
0.4 0.5 0.6 0.7 0.8 0.9  
V
, SOURCE−TO−DRAIN VOLTAGE (V)  
G
SD  
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
1000  
100  
10  
10 ms  
100 ms  
1 ms  
0 V V 20 V  
GS  
1
0.1  
SINGLE PULSE  
10 ms  
T = 25°C  
A
Single Pulse  
R
LIMIT  
DS(on)  
dc  
THERMAL LIMIT  
PACKAGE LIMIT  
0.01  
0.01  
0.1  
1
10  
100  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
7
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q1  
100  
10  
D = 0.5  
0.2  
0.1  
0.05  
0.02  
1
0.01  
0.1  
SINGLE PULSE  
0.01  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
t, TIME (s)  
0.1  
1
10  
100  
1000  
Figure 12. Thermal Response  
http://onsemi.com  
8
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q2  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
60  
3.4 V  
3.2 V  
T = 25°C  
J
V
DS  
5 V  
3.0 V  
50  
40  
30  
20  
4.5 V  
10 V  
T = 125°C  
J
2.8 V  
T = 25°C  
J
10  
0
V
= 2.4 V  
GS  
T = −55°C  
J
0
0
1
2
3
4
5
0
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
V
, DRAIN−TO−SOURCE VOLTAGE (V)  
V
, GATE−TO−SOURCE VOLTAGE (V)  
DS  
GS  
Figure 13. On−Region Characteristics  
Figure 14. Transfer Characteristics  
0.020  
0.015  
0.0040  
0.0035  
I
D
= 10 A  
T = 25°C  
J
0.0030  
V
V
= 4.5 V  
GS  
0.0025  
0.0020  
0.0015  
0.0010  
0.010  
0.005  
0
= 10 V  
GS  
2
3
4
5
6
7
8
9
10  
5
10 15 20 25 30 35 40  
I , DRAIN CURRENT (A)  
45 50  
V
, GATE−TO−SOURCE VOLTAGE (V)  
GS  
D
Figure 15. On−Resistance vs. Gate−to−Source  
Resistance  
Figure 16. On−Resistance vs. Drain Current  
and Gate Voltage  
1E−2  
1E−3  
1E−4  
1.8  
1.6  
I
V
= 20 A  
= 10 V  
D
GS  
T = 150°C  
J
T = 125°C  
J
1.4  
1.2  
1.0  
0.8  
0.6  
1E−5  
1E−6  
T = 25°C  
J
V
GS  
= 0 V  
−50 −25  
0
25  
50  
75  
100 125  
150  
5
10  
, DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
15  
20  
25  
30  
T , JUNCTION TEMPERATURE (°C)  
J
V
Figure 17. On−Resistance Variation with  
Temperature  
Figure 18. Drain−to−Source Leakage Current  
vs. Voltage  
http://onsemi.com  
9
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q2  
4000  
3500  
3000  
2500  
2000  
1500  
1000  
11  
QT  
T = 25°C  
GS  
J
V
10  
9
= 0 V  
C
iss  
8
7
6
5
C
oss  
Qgd  
10  
4
Qgs  
3
2
1
0
I
D
= 10 A  
500  
0
C
rss  
T = 25°C  
J
0
5
10  
15  
20  
25  
30  
0
5
15  
20  
25  
30  
35  
40  
45  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
Qg, TOTAL GATE CHARGE (nC)  
Figure 19. Capacitance Variation  
Figure 20. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
10  
9
1000  
100  
V
V
I
= 10 V  
= 15 V  
= 10 A  
V
= 0 V  
GS  
GS  
DD  
T = 25°C  
J
t
8
d(off)  
D
7
6
t
r
5
t
4
d(on)  
10  
1
3
t
f
2
1
0
0.0  
1
10  
R , GATE RESISTANCE (W)  
100  
0.1  
0.2  
, SOURCE−TO−DRAIN VOLTAGE (V)  
SD  
0.3  
0.4  
0.5  
0.6  
0.7  
V
G
Figure 21. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 22. Diode Forward Voltage vs. Current  
1000  
100  
10  
10 ms  
100 ms  
1 ms  
0 V V 20 V  
GS  
1
0.1  
SINGLE PULSE  
10 ms  
T = 25°C  
A
Single Pulse  
R
LIMIT  
DS(on)  
dc  
THERMAL LIMIT  
PACKAGE LIMIT  
0.01  
0.01  
0.1  
1
10  
100  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
Figure 23. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
10  
NTMFD4901NF  
TYPICAL CHARACTERISTICS − Q2  
100  
10  
D = 0.5  
0.2  
0.1  
0.05  
0.02  
1
0.01  
0.1  
SINGLE PULSE  
0.01  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
t, TIME (s)  
0.1  
1
10  
100  
1000  
Figure 24. Thermal Response  
http://onsemi.com  
11  
NTMFD4901NF  
PACKAGE DIMENSIONS  
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual−Asymmetrical)  
CASE 506BX  
ISSUE C  
2X  
NOTES:  
0.20  
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSIONS b AND b1 APPLY TO PLATED FEATURES AND ARE  
MEASURED BETWEEN 0.15 AND 0.25 MM FROM TERMINAL TIPS.  
4. COPLANARITY APPLIES TO THE EXPOSED PADS AS WELL AS THE  
TERMINALS.  
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS.  
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED  
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST  
POINT ON THE PACKAGE BODY.  
D
A
B
E
2X  
D1  
0.20  
C
8
7
6
5
MILLIMETERS  
4X  
h
E1  
PIN ONE  
IDENTIFIER  
DIM  
A
A1  
b
b1  
c
MIN  
0.90  
0.00  
0.41  
0.41  
0.23  
MAX  
1.10  
0.05  
0.61  
0.61  
0.33  
c
A1  
1
2
3
4
D
5.15 BSC  
TOP VIEW  
D1  
D2  
E
4.50  
3.50  
5.10  
4.22  
0.10  
0.10  
C
6.15 BSC  
E1  
E2  
E3  
e
G
G1  
h
5.50  
2.27  
0.82  
1.27 BSC  
0.63 BSC  
1.72 BSC  
6.10  
2.67  
1.22  
DETAIL A  
A
C
SEATING  
PLANE  
NOTE 6  
C
NOTE 4  
SIDE VIEW  
e
DETAIL A  
−−−  
0.35  
12  
0.55  
_
L
b
8X  
DETAIL B  
e/2  
L
0.10  
0.05  
C
C
A
B
1
4
E3  
NOTE 3  
RECOMMENDED  
SOLDERING FOOTPRINT*  
0.10  
REF  
DETAIL B  
5.35  
4X  
0.69  
E2  
PACKAGE  
OUTLINE  
G1  
8X  
G
0.64  
0.10 C  
A
B
8
5
DETAIL C  
6X b1  
D2  
1.97  
2.23  
NOTE 3  
2.68  
0.10  
C A B  
6.48  
0.69  
DETAIL C  
BOTTOM VIEW  
1.22  
1.27  
PITCH  
4X  
DIMENSION: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
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Order Literature: http://www.onsemi.com/orderlit  
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P.O. Box 5163, Denver, Colorado 80217 USA  
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NTMFD4901NF/D  

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