概述
规格参数
数据手册NVMFD5C680NLWFT1G 概述
双 N 沟道功率 MOSFET 60V，26A，28mΩ 功率场效应晶体管
NVMFD5C680NLWFT1G 规格参数
| 是否无铅： | 不含铅 | 生命周期： | Active |
| 包装说明： | SMALL OUTLINE, R-PDSO-F6 | Reach Compliance Code： | not_compliant |
| Factory Lead Time： | 8 weeks | 风险等级： | 1.52 |
| 雪崩能效等级（Eas）： | 47 mJ | 外壳连接： | DRAIN |
| 配置： | SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE | 最小漏源击穿电压： | 60 V |
| 最大漏极电流 (Abs) (ID)： | 26 A | 最大漏极电流 (ID)： | 7.5 A |
| 最大漏源导通电阻： | 0.041 Ω | FET 技术： | METAL-OXIDE SEMICONDUCTOR |
| JESD-30 代码： | R-PDSO-F6 | JESD-609代码： | e3 |
| 元件数量： | 2 | 端子数量： | 6 |
| 工作模式： | ENHANCEMENT MODE | 最高工作温度： | 175 °C |
| 最低工作温度： | -55 °C | 封装主体材料： | PLASTIC/EPOXY |
| 封装形状： | RECTANGULAR | 封装形式： | SMALL OUTLINE |
| 峰值回流温度（摄氏度）： | NOT SPECIFIED | 极性/信道类型： | N-CHANNEL |
| 最大功率耗散 (Abs)： | 19 W | 最大脉冲漏极电流 (IDM)： | 57 A |
| 参考标准： | AEC-Q101 | 表面贴装： | YES |
| 端子面层： | Tin (Sn) | 端子形式： | FLAT |
| 端子位置： | DUAL | 处于峰值回流温度下的最长时间： | NOT SPECIFIED |
| 晶体管元件材料： | SILICON | Base Number Matches： | 1 |
NVMFD5C680NLWFT1G 数据手册
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PDF下载DATA SHEET
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MOSFET – Power, Dual
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
28 mW @ 10 V
41 mW @ 4.5 V
60 V
20 A
60 V, 28 mW, 20 A
NVMFD5C680NL
Dual N−Channel
D1
D2
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
G
G1
G2
• NVMFD5C680NLWF − Wettable Flank Option for Enhanced Optical
Inspection
S1
S2
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAM
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D1 D1
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
S1
G1
S2
G2
D1
1
V
DSS
D1
D2
D2
XXXXXX
AYWZZ
DFN8 5x6
(SO8FL)
CASE 506BT
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
D
20
A
C
D2 D2
q
JC
T
C
15
(Notes 1, 2, 3)
Steady
State
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
Power Dissipation
T
C
P
D
24
W
A
R
(Notes 1, 2)
q
JC
T
C
= 100°C
12
Continuous Drain
Current R
T = 25°C
A
I
D
7.4
5.5
3.2
1.6
66
q
JA
T = 100°C
A
(Notes 1, 2, 3)
Steady
State
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
Power Dissipation
T = 25°C
A
P
D
W
R
(Notes 1 & 2)
q
JA
page 5 of this data sheet.
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ms
A
I
DM
A
p
Operating Junction and Storage Temperature
T , T
−55 to
+ 175
°C
J
stg
Source Current (Body Diode)
I
20
47
A
S
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (T = 25°C, I
= 5 A)
J
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
6.27
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
JA
R
46.6
q
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
January, 2022 − Rev. 3
NVMFD5C680NL/D
NVMFD5C680NL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
60
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
29
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
V
= 0 V,
= 60 V
T = 25 °C
10
DSS
GS
DS
J
mA
T = 125°C
J
100
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 13 mA
1.2
2.2
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
−4.3
23
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 5 A
= 5 A
28
41
DS(on)
GS
D
mW
V
GS
= 4.5 V
33
D
Forward Transconductance
g
FS
V
DS
= 15 V, I = 5 A
50
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
350
150
6
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0 V, f = 1 MHz, V = 25 V
pF
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
Q
V
GS
= 4.5 V, V = 48 V; I = 10 A
2.0
5.0
0.8
1.2
0.8
3.0
G(TOT)
G(TOT)
DS
D
Total Gate Charge
V
GS
= 10 V, V = 48 V; I = 10 A
DS D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
nC
V
Q
GS
GD
GP
V
GS
= 4.5 V, V = 48 V; I = 10 A
DS D
Q
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
6.4
25
13
23
d(ON)
Rise Time
t
r
V
= 4.5 V, V = 48 V,
DS
GS
ns
V
I
D
= 10 A, R = 1.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.9
0.8
17
8
1.2
SD
RR
J
V
I
= 0 V,
= 5 A
GS
S
T = 125°C
J
Reverse Recovery Time
Charge Time
t
t
ns
a
V
GS
= 0 V, dIS/dt = 10 A/ms,
I
S
= 5 A
Discharge Time
t
b
9
Reverse Recovery Charge
Q
7
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFD5C680NL
TYPICAL CHARACTERISTICS
30.0
25.0
20.0
15.0
10.0
5.0
50
V
GS
= 4.5 V to 10 V
V
DS
= 10 V
45
40
35
30
25
20
15
10
5
3.6 V
3.4 V
T = 25°C
J
3.2 V
T = −55°C
J
3.0 V
2.8 V
2.6 V
.
T = 125°C
J
0.0
0
0.0
0.5
1.0
1.5
2.0
2.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
55
50
45
40
35
30
45
40
T = 25°C
J
T = 25°C
D
J
I
= 5 A
35
30
25
V
= 4.5 V
= 10 V
GS
25
20
15
V
GS
20
15
3
4
5
6
7
8
9
10
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5 10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.E+05
1.E+04
1.E+03
1.E+02
1.E+01
1.E+00
1.E−01
1.E−02
2.2
2
V
= 10 V
= 5 A
GS
T = 150°C
J
I
D
1.8
1.6
1.4
1.2
1
T = 125°C
J
T = 85°C
J
T = 25°C
J
0.8
0.6
5
15
V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
25
35
45
55
−50 −25
0
25
50
75
100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFD5C680NL
TYPICAL CHARACTERISTICS
10
1000
100
V
DS
= 48 V
9
8
7
6
5
4
3
2
1
0
C
ISS
T = 25°C
J
I
D
= 10 A
C
OSS
Q
Q
GD
GS
10
1
V
= 0 V
C
GS
RSS
T = 25°C
J
f = 1 MHz
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
10
20
30
40
50
60
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
100
10
V
GS
= 0 V
t
r
t
f
t
d(off)
10
t
d(on)
T = 125°C
J
V
V
= 4.5 V
= 48 V
GS
T = 25°C
J
DS
T = −55°C
J
I
= 10 A
D
1
1
1
10
R , GATE RESISTANCE (W)
100
0.5
0.6
0.7
0.8
0.9
1
V
, SOURCE−TO−DRAIN VOLTAGE (V)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
10
T
V
= 25°C
≤ 10 V
C
GS
Single Pulse
T (initial) = 25°C
J
T (initial) = 100°C
J
1
10 ms
1
R
Limit
DS(on)
0.5 ms
1 ms
10 ms
Thermal Limit
Package Limit
0.1
0.1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
NVMFD5C680NL
TYPICAL CHARACTERISTICS
NVMFD5C680NL
100
10
@50% Duty Cycle
@20% Duty Cycle
@10% Duty Cycle
@5% Duty Cycle
@2% Duty Cycle
@1% Duty Cycle
Single Pulse
1
0.1
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Time (s)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVMFD5C680NLT1G
5C680L
DFN8
(Pb−Free)
1500 / Tape & Reel
1500 / Tape & Reel
NVMFD5C680NLWFT1G
680LWF
DFN8
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE F
1
DATE 23 NOV 2021
2X
SCALE 2:1
NOTES:
0.20
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
A
B
E
2X
D1
0.20
C
8
7
6
5
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
PIN ONE
E1
MILLIMETERS
IDENTIFIER
DIM
A
A1
b
b1
c
MIN
0.90
−−−
0.33
0.33
0.20
NOM
−−−
−−−
0.42
0.42
−−−
5.15 BSC
4.90
4.10
1.70
6.15 BSC
5.90
4.15
1.27 BSC
0.55
−−−
−−−
−−−
0.61
MAX
1.10
0.05
0.51
0.51
0.33
NOTE 7
4X
h
1
2
3
4
c
TOP VIEW
D
A1
D1
D2
D3
E
E1
E2
e
G
h
K
K1
4.70
3.90
1.50
5.10
4.30
1.90
0.10
0.10
C
C
A
DETAIL B
5.70
3.90
6.10
4.40
ALTERNATE
SEATING
PLANE
NOTE 6
DETAIL A
CONSTRUCTION
C
NOTE 4
SIDE VIEW
DETAIL A
0.45
−−−
0.51
0.56
0.48
3.25
1.80
0.65
12
−−−
−−−
_
D2
D3
L
M
N
0.71
3.75
2.20
4X L
K
3.50
2.00
e
1
4
SOLDERING FOOTPRINT*
DETAIL B
4.56
4X
2X
2.08
2X
0.56
b1
8X
0.75
N
E2
M
8
5
4X
G
b
8X
4X
1.40
0.10
0.05
C
C
A B
K1
6.59
4.84
NOTE 3
2.30
BOTTOM VIEW
3.70
GENERIC
MARKING DIAGRAM*
0.70
1
XXXXXX
AYWZZ
4X
1.27
PITCH
1.00
5.55
XXXXXX = Specific Device Code
DIMENSION: MILLIMETERS
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON50417E
DFN8 5X6, 1.27P DUAL FLAG (SO8FL−DUAL)
PAGE 1 OF 1
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