NVMFS6H858NLT1G [ONSEMI]
Power MOSFET 80V, 32A, 20.7 mOhm, Single N-Channel, SO8-FL.;
| 型号： | NVMFS6H858NLT1G |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET 80V, 32A, 20.7 mOhm, Single N-Channel, SO8-FL. |
| 文件： | 总8页 (文件大小：297K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
19.5 mW @ 10 V
25 mW @ 4.5 V
80 V
30 A
80 V, 19.5 mW, 30 A
NVMFS6H858NL
D (5,6)
Features
Small Footprint (5x6 mm) for Compact Design
G (4)
Low R
to Minimize Conduction Losses
DS(on)
Low Q and Capacitance to Minimize Driver Losses
G
NVMFS6H858NLWF − Wettable Flank Option for Enhanced Optical
S (1,2,3)
N−CHANNEL MOSFET
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAMS
MAXIMUM RATINGS (T = 25C unless otherwise noted)
J
D
1
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
S
S
S
G
D
D
V
DSS
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
XXXXXX
AYWZZ
Gate−to−Source Voltage
V
GS
20
30
V
Continuous Drain
Current R
T
= 25C
= 100C
= 25C
I
A
D
C
D
q
JC
T
C
21
(Notes 1, 3)
Steady
State
1
Power Dissipation
T
C
P
42
W
A
D
R
(Note 1)
q
JC
XXXXXX
AYWZZ
T
C
= 100C
21
Continuous Drain
Current R
T = 25C
I
8.7
6.1
3.5
1.8
142
DFNW5
(SO8FL)
CASE 507BA
A
D
q
JA
T = 100C
A
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25C
A
P
W
D
XXXXXX = 6H858L
R
(Notes 1, 2)
q
JA
T = 100C
A
XXXXXX = (NVMFS6H858NL) or
XXXXXX = 858LWF
XXXXXX = (NVMFS6H858NLWF)
Pulsed Drain Current
T = 25C, t = 10 ms
I
DM
A
A
p
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
C
A
Y
= Assembly Location
= Year
J
stg
W
ZZ
= Work Week
= Lot Traceability
Source Current (Body Diode)
I
S
35
A
Single Pulse Drain−to−Source Avalanche
E
AS
198
mJ
Energy (I
= 1.5 A)
L(pk)
Lead Temperature for Soldering Purposes
T
260
C
L
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
(1/8 from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
3.6
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
C/W
q
JC
R
43
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
November, 2022 − Rev. 1
NVMFS6H858NL/D
NVMFS6H858NL
ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
80
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
45
(BR)DSS
mV/C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25 C
10
DSS
GS
DS
J
V
= 80 V
mA
T = 125C
J
100
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 30 mA
1.2
2.0
V
mV/C
mW
mW
S
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
−2.9
16.2
20
GS(TH)
R
V
GS
= 10 V
I
I
= 5 A
= 5 A
19.5
25
DS(on)
D
V
GS
= 4.5 V
D
Forward Transconductance
g
FS
V
= 8 V, I = 15 A
45
DS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
623
82
5
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0 V, f = 1 MHz, V = 40 V
pF
nC
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
V
GS
= 10 V, V = 40 V; I = 15 A
12
1.3
2.2
2.1
3.1
6
G(TOT)
DS
D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
Q
GS
GD
GP
Q
V
V
GS
= 4.5 V, V = 40 V; I = 15 A
DS
D
V
Total Gate Charge
Q
nC
G(TOT)
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
9
34
15
4
d(ON)
Rise Time
t
r
V
= 4.5 V, V = 64 V,
DS
GS
D
ns
V
I
= 15 A, R = 2.5 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25C
0.80
0.66
29
1.2
SD
RR
J
V
= 0 V,
GS
S
I
= 5 A
T = 125C
J
Reverse Recovery Time
Charge Time
t
t
19
ns
a
V
= 0 V, dIS/dt = 100 A/ms,
GS
I
S
= 15 A
Discharge Time
t
10
b
Reverse Recovery Charge
Q
21
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6H858NL
TYPICAL CHARACTERISTICS
30
20
30
V
= 10 V to 3.4 V
GS
V
= 8 V
DS
3.2 V
25
20
15
10
3.0 V
2.8 V
2.8 V
10
0
T = 25C
J
5
0
T = 125C
J
T = −55C
J
0
1
2
3
4
5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5 4.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
25
23
21
19
17
24
23
22
21
20
19
18
17
16
15
T = 25C
J
T = 25C
J
I
D
= 5 A
V
= 4.5 V
= 10 V
GS
V
GS
15
13
14
13
12
3
4
5
6
7
8
9
10
1
2
3
4
5
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1000
100
10
2.5
2.0
1.5
V
= 10 V
= 5 A
GS
I
D
T = 175C
J
T = 150C
J
1
T = 125C
J
0.1
0.01
T = 85C
J
1.0
0.5
T = 25C
J
0.001
0.0001
−50 −25
0
25
50
75 100 125 150 175
5
15
25
35
45
55
65
75
T , JUNCTION TEMPERATURE (C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVMFS6H858NL
TYPICAL CHARACTERISTICS
10,000
1000
100
10
9
8
C
ISS
7
6
5
4
3
2
C
OSS
C
RSS
Q
Q
GD
GS
10
1
V
DS
= 40 V
V
= 0 V
GS
I
D
= 15 A
T = 25C
J
1
0
T = 25C
J
f = 1 MHz
0
10
20
30
40
50
60
70
80
0
2
4
6
8
10
12
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
100
V
GS
= 0 V
t
r
t
t
d(off)
d(on)
10
t
f
V
V
= 4.5 V
= 64 V
GS
DS
I
D
= 15 A
T = −55C
J
T = 125C T = 25C
J
J
1
1
1
10
R , GATE RESISTANCE (W)
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
100
10
T = 25C
Single Pulse
A
V
GS
10 V
T
= 25C
J(initial)
10 ms
T
= 100C
1
J(initial)
1
R
Limit
DS(on)
0.5 ms
1 ms
Thermal Limit
Package Limit
10 ms
0.1
0.1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVMFS6H858NL
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVMFS6H858NLT1G
6H858L
DFN5
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVMFS6H858NLWFT1G
858LWF
DFNW5
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW5 5x6 (FULL−CUT SO8FL WF)
CASE 507BA
ISSUE A
DATE 03 FEB 2021
q
q
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
A
Y
= Assembly Location
= Year
W
ZZ
= Work Week
= Lot Traceability
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26450H
DFNW5 5x6 (FULL−CUT SO8FL WF)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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