NXV08V080DB1 [ONSEMI]
三相逆变器汽车功率模块APM19;
| 型号： | NXV08V080DB1 |
| 厂家： | 
ONSEMI |
| 描述： | 三相逆变器汽车功率模块APM19 |
| 文件： | 总10页 (文件大小：851K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Three Phase Inverter
Automotive Power MOSFET
Module
NXV08V080DB1
Features
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• Three−Phase Inverter Bridge for Variable Speed Motor Drive
• RC Snubber for Low EMI
• Current Sensing and Temperature Sensing
• Electrically Isolated DBC Substrate for Low Thermal Resistance
• Compact Design for Low Total Module Resistance
• Module Serialization for Full Traceability
• AEC Qualified − AQG324
• PPAP Capable
• This Device is Pb−free, RoHS and UL94−V0 Compliant
Applications
• 24 V and 48 V Motor Control
• DC−DC Converter
19LD, APM, PDD STD
CASE MODCD
Benefits
MARKING DIAGRAM
• Enable Design of Small, Efficient and Reliable System for Reduced
Vehicle Fuel Consumption and CO Emission
2
• Simplified Vehicle Assembly
• Enable Low Thermal Resistance to Junction−to−Heat Sink by Direct
Mounting via Thermal Interface Material between Module Case and
Heat Sink
NXV08V080DB1
ZZZ ATYWW
NNNNNN
NXV08V080DB1 = Specific Device Code
ZZZ
AT
Y
= Lot ID
= Assembly & Test Location
= Year
WW
NNN
= Work Week
= Serial Number
ORDERING INFORMATION
See detailed ordering and shipping information on page 2
of this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
October, 2019 − Rev. 0
NXV08V080DB1/D
NXV08V080DB1
PACKAGE MARKING AND ORDERING INFORMATION
Pb−Free and
Operating
RoHS Compliant
Temperature Range
Part Number
Package
Packing Method
NXV08V080DB1
APM19−CBC
Yes
−40 ∼ 125°C
Tube
Figure 1. Pin Configuration
PIN DESCRIPTION
Pin Number
Pin Name
Pin Description
1
2
TEMP 1
TEMP 2
NTC Thermistor Terminal 1
NTC Thermistor Terminal 2
Source of Q3 and Drain of Q6
3
PHASE 3 SENSE
GATE 3
4
Gate of Q3, high side Phase 3 MOSFET
Gate of Q6, low side Phase 3 MOSFET
Source of Q2 and Drain of Q5
5
GATE 6
6
PHASE 2 SENSE
GATE 2
7
Gate of Q2, high side Phase 2 MOSFET
Gate of Q5, low side Phase 2 MOSFET
Source of Q1 and Drain of Q4
8
GATE 5
9
PHASE 1 SENSE
GATE 1
10
11
12
13
14
15
16
17
18
19
Gate of Q2, high side Phase 1 MOSFET
Sense pin for battery voltage and Drain of high side MOSFETs
Gate of Q4, low side Phase 1 MOSFET
VBAT SENSE
GATE 4
SHUNT P
SHUNT N
VBAT
Positive CSR sense pin and source connection for low side MOSFETs
Negative CSR sense pin and sense pin for battery return
Battery voltage power lead
GND
Battery return power lead
PHASE 1
PHASE 2
PHASE 3
Phase 1 power lead
Phase 2 power lead
Phase 3 power lead
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2
NXV08V080DB1
Schematic Diagram
VBAT SENSE
GATE 3
VBAT
GATE 2
Q3
Q6
Q1
Q4
Q2
Q5
GATE 1
PHASE 1 SENSE
PHASE 2 SENSE
PHASE 3 SENSE
PHASE 1
PHASE 2
PHASE 3
R
C
GATE 4
GATE 5
GATE 6
SHUNT P
TEMP 1
TEMP 2
SHUNT N
CSR
NTC
GND
Figure 2. Schematic
Solder
Flammability Information
All materials present in the power module meet UL
Solder used is a lead free SnAgCu alloy.
flammability rating class 94V−0 or higher.
Compliance to RoHS Directives
The power module is 100% lead free and RoHS compliant
2000/53/C directive.
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Max.
80
Unit
V
V
DS
V
GS
Drain−to−Source Voltage
Gate−to−Source Voltage
20
V
I
Drain Current Continuous (T = 25°C, T = 175°C) (Note 1)
130
190
175
125
2500
A
D
C
J
E
AS
Single Pulse Avalanche Energy (Note 2)
Maximum Junction Temperature
Storage Temperature Range
Isolation Voltage
mJ
°C
T
J(max)
T
°C
STG
V
ISO
Vrms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Defined by design, not subject to production testing. The value is the result of the calculation, Min (package limit max current, Silicon limit
max current) where the silicon limit current is calculated based on the maximum value which is not to exceed T = 175°C on maximum thermal
J
limitation and on resistance.
2. Starting T = 25°C, L = 0.08 mH, I = 69 A, V = 80 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
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3
NXV08V080DB1
THERMAL CHARACTERISTICS
Symbol
Parameter
Min
Typ
Max
Unit
R
Thermal Resistance, Junction−to−Case (Note 3)
−
−
1.3
K/W
q
JC
3. Test method compliant with MIL−STD−883−1012.1, case temperature measured below the package at the chip center. Cosmetic oxidation
and discolor on the DBC surface is allowed.
MODULE SPECIFIC CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameters
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
Gate−to−Source Leakage Current
Gate−to−Source Threshold Voltage
Body Diode Forward Voltage of MOSFET
Drain−to−Source On Resistance, Q1
Drain−to−Source On Resistance, Q2
Drain−to−Source On Resistance, Q3
Drain−to−Source On Resistance, Q4
Drain−to−Source On Resistance, Q5
Drain−to−Source On Resistance, Q6
VBAT to PHASE 1
Test Conditions
= 250 mA, V = 0 V
Symbol
Min
80
−
Typ
−
Max
−
Unit
V
I
B
VDSS
D
GS
V
V
V
= 80 V, V = 0 V
I
−
2
mA
DS
GS
GS
GS
DSS
=
20 V
I
−100
2.0
−
−
+100
4.0
1.25
3.0
3.1
3.1
3.2
3.5
3.8
3.8
3.9
4.0
4.0
4.3
4.6
8.5
nA
GSS
= V , I = 250 mA
V
GS(th)
−
V
DS
D
I
S
= 80 A, V = 0 V
V
SD
−
V
GS
R
R
R
R
R
R
−
2.4
2.5
2.5
2.6
2.9
3.2
3.3
3.4
3.5
3.5
3.7
4.0
6.5
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
DS(ON)Q1
DS(ON)Q2
DS(ON)Q3
DS(ON)Q4
DS(ON)Q5
DS(ON)Q6
−
−
I
D
= 80 A, V = 10 V
GS
(Note 4)
−
−
−
R
R
R
R
R
R
−
DS(ON)MQ1
DS(ON)MQ2
DS(ON)MQ3
DS(ON)MQ4
DS(ON)MQ5
DS(ON)MQ6
VBAT to PHASE 2
−
VBAT to PHASE 3
−
I
I
= 80 A, V = 10 V
GS
D
PHASE1 to GND
−
PHASE2 to GND
−
PHASE3 to GND
−
Total loop resistance VBAT ≥ Phase ≥ GND
= 80 A, V = 10 V
−
D
GS
4. All MOSFETs have same size and on resistance. However, the different values listed due to the different access points available inside the
module for on resistance measurement. Q1 has the shortest measurement path in the layout, in this reason, on resistance of Q1 can be used
for simple power loss calculation.
COMPONENTS
Symbol
RESISTOR
Spec
1.0 W
Quantity
Size
1
1
1
1
142 × 55 mil
79 × 49 mil
250 × 120 mil
63 × 32 mil
CAPACITOR
100 V, 0.022 mF
0.5 mW
CURRENT SENSING RESISTOR
NTC
NCP18XH103F0SRB, 10 kW
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4
NXV08V080DB1
ELECTRICAL CHARACTERISTICS
(T = 25°C unless otherwise noted, Reference typical characteristics of FDBL86366−F085, TOLL)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
DYNAMIC CHARACTERISTICS
C
C
Input Capacitance
−
−
−
−
−
−
−
−
6320
1030
32
−
−
pF
pF
pF
W
iss
Output Capacitance
V
= 40 V, V = 0 V, f = 1 MHz
oss
DS
GS
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
2.1
86
−
g
Q
Total Gate Charge
V
= 0 to 10 V
= 0 to 10 V
112
18
−
nC
nC
nC
nC
g(ToT)
GS
GS
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
V
12
g(th)
Q
30
gs
gd
V
D
= 64 V,
= 80 A
DD
I
Q
18
−
SWITCHING CHARACTERISTICS
t
Turn−On Time
−
−
−
−
−
−
−
98
−
ns
ns
ns
ns
ns
ns
on
t
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
Turn−Off Fall Time
Turn−Off Time
30
34
40
17
−
d(on)
t
r
−
V
DD
V
GS
= 40 V, I = 80 A,
D
= 10 V, R
= 6 W
GEN
t
−
d(off)
t
f
−
t
86
off
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
NXV08V080DB1
TYPICAL CHARACTERISTICS
(Graphs are generated using the die assembled in discrete package for reference purposes only. Datasheet of FDBL86366−F085 is
available in the web)
NOTE: Refer to ON Semiconductor Application
Notes AN7514 and AN7515.
Figure 4. Transfer Characteristics
Figure 3. Unclamped Inductive Switching
Capability
Figure 5. Forward Diode Characteristics
Figure 6. Saturation Characteristics
Figure 7. Saturation Characteristics
Figure 8. RDS(on) vs, Gate Voltage
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NXV08V080DB1
TYPICAL CHARACTERISTICS (continued)
(Graphs are generated using the die assembled in discrete package for reference purposes only. Datasheet of FDBL86366−F085 is
available in the web)
Figure 9. Normalized RDS(on) vs. Junction
Temperature
Figure 10. Normalized Gate Threshold Voltage
vs. Temperature
Figure 11. Normalized Drain−to−Source
Figure 12. Capacitance vs. Drain−to−Source
Breakdown Voltage vs. Junction Temperature
Voltage
Figure 13. Gate Charge vs. Gate−to−Source
Voltage
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NXV08V080DB1
Figure 14. Flatness Measurement Position
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Device Flatness
Mounting Torque
Weight
Test Conditions
Min.
0
Typ.
−
Max.
150
0.8
−
Units
um
Refer to the package dimensions
Mounting screw: M3, recommended 0.7 N•m
0.4
−
−
N•m
g
20
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
19LD, APM, PDD STD (APM19−CBC)
CASE MODCD
ISSUE O
DATE 30 NOV 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13505G
19LD, APM, PDD STD (APM19−CBC)
PAGE 1 OF 1
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