STK531U394A-E [ONSEMI]
智能功率模块 (IPM)，600V，15A;
| 型号： | STK531U394A-E |
| 厂家： | 
ONSEMI |
| 描述： | 智能功率模块 (IPM)，600V，15A 电动机控制 |
| 文件： | 总14页 (文件大小：352K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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STK531U394A-E
Intelligent Power Module (IPM)
600 V, 15 A
Overview
This “Inverter IPM” is highly integrated device containing all High
Voltage (HV) control from HV-DC to 3-phase outputs in a single SIP
module (Single-In line Package). Output stage uses IGBT / FRD
technology and implements Under Voltage Protection (UVP) and Over
Current Protection (OCP) with a Fault Detection output flag. Internal
Boost diodes are provided for high side gate boost drive.
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PACKAGE PICTURE
Function
Single control power supply due to Internal bootstrap circuit for high
side pre-driver circuit
All control input and status output are at low voltage levels directly
compatible with microcontrollers
Built-in cross conduction prevention
Externally accessible embedded thermistor for substrate temperature
measurement
SIP29 44x26.5
The level of the over current protection is adjustable with the external
resistor, “RSD”
Certification
UL Recognized (File number : E339285)
Specifications
Absolute Maximum Ratings at Tc = 25C
Parameter
Supply voltage
Symbol
Remarks
P to N, surge < 500 V
Ratings
Unit
V
V
V
*1
*2
450
600
CC
CE
Collector-emitter voltage
P to U, V, W or U, V, W, to N
V
P, N, U, V, W terminal current
±15
A
Output current
Io
±7
A
P, N, U, V, W terminal current at Tc = 100C
P, N, U, V, W terminal current, PW = 1 ms
VB1 to U, VB2 to V, VB3 to W, V
HIN1, 2, 3, LIN1, 2, 3
FAULT terminal
Output peak current
Pre-driver voltage
Iop
±30
A
to V
SS
VD1, 2, 3, 4
20
V
DD
0.3 to V
0.3 to V
Input signal voltage
FAULT terminal voltage
Maximum power dissipation
Junction temperature
Storage temperature
Operating case temperature
Tightening torque
VIN
VFAULT
Pd
V
DD
DD
V
IGBT per 1 channel
IGBT, FRD
35
W
Tj
150
C
C
C
Nm
VRMS
Tstg
Tc
40 to +125
20 to +100
0.9
IPM case temperature
A screw part
*3
*4
Isolation voltage
Vis
50 Hz sine wave AC 1 minute
2000
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1 : Surge voltage developed by the switching operation due to the wiring inductance between P and N terminal.
*2 : VD1 = VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = V
to V
terminal voltage.
DD
SS
*3 : Flatness of the heat-sink should be lower than 0.15mm.
*4 : Test conditions : AC 2500 V, 1 second.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
December 2016 - Rev. 2
1
Publication Order Number :
STK531U394A-E/D
STK531U394A-E
Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15 V
Test
circuit
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
Power output section
I
V
= 600 V
Collector-emitter cut-off current
Bootstrap diode reverse current
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
2.3
2.7
-
mA
mA
CE
CE
VR(BD) = 600 V
Fig.1
Fig.2
IR(BD)
-
Upper side
1.8
2.2
1.5
1.7
1.8
2.0
1.4
1.6
-
Ic = 15 A
Tj = 25C
Lower side *1
Upper side
Collector to emitter saturation
voltage
V
V
(SAT)
V
CE
F
Ic = 7 A
Tj = 100C
Lower side *1
Upper side
-
2.1
3.3
-
IF = 15 A
Tj = 25C
Lower side *1
Upper side
Diode forward voltage
Fig.3
-
V
IF = 7 A
Tj = 100C
Lower side *1
-
θj-c(T)
θj-c(D)
IGBT
FWD
3.8
6.0
Junction to case
thermal resistance
C/W
mA
-
Control (Pre-driver) section
VD1, 2, 3 = 15 V
VD4 = 15 V
-
-
0.08
0.4
4.0
-
Pre-driver current consumption
ID
Fig.4
1.6
Vin H
Vin L
High level Input voltage
Low level Input voltage
2.5
-
-
-
V
V
HIN1, HIN2, HIN3,
LIN1, LIN2, LIN3 to V
SS
0.8
Input threshold voltage hysteresis
*2
Vinth(hys)
0.5
0.8
-
V
I
Logic 1 input leakage current
Logic 0 input leakage current
FAULT terminal sink current
FAULT clear time
VIN = +3.3 V
VIN = 0 V
-
-
100
143
2
µA
µA
mA
ms
IN+
I
-
2
-
IN
IoSD
FAULT : ON / VFAULT = 0.1 V
Fault output latch time
-
-
FLTCLR
18
80
V
and VS undervoltage
VCCUV+
VSUV+
CC
positive going threshold
and VS undervoltage
10.5
10.3
0.14
11.1
10.9
0.2
11.7
11.5
-
V
V
V
V
VCCUV-
VSUV-
CC
negative going threshold
and VS undervoltage
V
VCCUVH
VSUVH-
CC
hysteresis
Over current protection level
ISD
PW = 100 μs, RSD = 0 Ω
Fig.5
-
22.0
0.36
-
27.8
0.40
A
V
Electric current output signal level ISO
Io = 15 A
0.38
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1 : The lower side’s V (SAT) and VF include a loss by the shunt resistance
CE
*2 : Input threshold voltage hysteresis indicates a reference value based on the design value of built-in pre-driver IC
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V, V
CC
= 300 V, L = 3.9 mH
Test
circuit
Parameter
Switching time
Symbol
tON
Conditions
MIN
TYP
MAX
Unit
µs
0.3
0.5
0.8
1.2
Io = 15 A
Io = 7 A
tOFF
Eon
Eoff
Etot
Eon
Eoff
Etot
Erec
trr
-
-
-
-
-
-
-
-
-
1.5
Turn-on switching loss
Turn-off switching loss
Total switching loss
220
180
400
260
220
480
25
-
-
-
-
-
-
-
-
µJ
µJ
µJ
µJ
µJ
µJ
µJ
Fig.6
Turn-on switching loss
Turn-off switching loss
Total switching loss
Io = 15 A, Tc = 100C
Diode reverse recovery energy
Diode reverse recovery time
IF = 7 A, P = 400 V,
Tc = 100C
90
ns
Io = 30 A, V
= 450 V
Reverse bias safe operating area RBSOA
Short circuit safe operating area SCSOA
Reference voltage is “V ” terminal voltage unless otherwise specified.
Full square
-
CE
= 400 V, Tc = 100C
V
4
-
µs
CE
SS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
Notes :
1. The pre-drive power supply low voltage protection has approximately 0.2 V of hysteresis and operates as follows.
Upper side : The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue
till the input signal will turn ‘high’.
Lower side : The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage.
2. The pre-drive low voltage protection is the feature to protect devices when the pre-driver supply voltage falls due to an operating
malfunction.
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2
STK531U394A-E
Equivalent Block Diagram
VB3(1)
W,VS3(2)
VB2(5)
V,VS2(6)
VB1(9)
U,VS1(10)
P (13)
BD
BD BD
U.V.
U.V.
U.V.
Shunt-Resistor
Latch time
N (16)
Level
Shifter
RCIN(28)
TH(29)
Level
Shifter
Level
Shifter
HIN1(17)
HIN2(18)
HIN3(19)
LIN1(20)
LIN2(21)
LIN3(22)
FAULT(23)
Logic
Logic
Logic
ISO(24)
Thermistor
Latch
VDD(25)
Latch time is 18 ms to 80 ms
(Automatic reset)
Over-Current
VDD-UnderVoltage
VSS(26)
ISD(27)
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3
STK531U394A-E
Module Pin-Out Description
Pin
Name
Description
1
VB3
High Side Floating Supply Voltage 3
2
W, VS3
Output 3 - High Side Floating Supply Offset Voltage
3
Without Pin
4
Without Pin
5
VB2
V,VS2
High Side Floating Supply voltage 2
Output 2 - High Side Floating Supply Offset Voltage
6
7
Without Pin
8
Without Pin
9
VB1
U,VS1
High Side Floating Supply voltage 1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Output 1 - High Side Floating Supply Offset Voltage
P
Without Pin
Without Pin
Positive Bus Input Voltage
Without Pin
Without Pin
N
Negative Bus Input Voltage
Logic Input High Side Gate Driver - Phase U
Logic Input High Side Gate Driver - Phase V
Logic Input High Side Gate Driver - Phase W
Logic Input Low Side Gate Driver - Phase U
Logic Input Low Side Gate Driver - Phase V
Logic Input Low Side Gate Driver - Phase W
Fault output
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FAULT
ISO
VDD
VSS
ISD
Current monitor output
+15 V Main Supply
Negative Main Supply
Over current detection and setting
Fault clear time setting output
Thermistor output
RCIN
TH
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4
STK531U394A-E
Test Circuit
(The tested phase : U+ shows the upper side of the U phase and U- shows the lower side of the U phase.)
I
CE
/ IR(BD)
ICE
U+
13
10
V+
13
6
W+
13
2
U-
10
16
V-
6
16
W-
2
16
M
N
VD1=15V
VD2=15V
VD3=15V
VD4=15V
U(BD)
9
26
V(BD)
W(BD)
1
26
VCE
M
N
5
26
Fig.1
V (SAT) (Test by pulse)
CE
U+
13
10
17
V+
13
6
W+
13
2
U-
10
16
20
V-
6
16
21
W-
2
16
22
VD1=15V
VD2=15V
VD3=15V
M
N
m
18
19
Ic
VCE(SAT)
VD4=15V
5V
Fig.2
V (Test by pulse)
F
U+
V+
13
6
W+
13
2
U-
10
16
V-
6
16
W-
2
16
M
N
13
10
VF
IF
Fig.3
ID
VD1
9
10
VD2
5
6
VD3
1
2
VD4
25
26
M
N
Fig.4
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5
STK531U394A-E
■ ISD
Input signal
(0 to 5 V)
VD1=15V
VD2=15V
VD3=15V
Io
VD4=15V
Io
ISD
Input signal
100 μs
Fig.5
Switching time (The circuit is a representative example of the lower side U phase.)
Input signal
(0 to 5 V)
VD1=15V
VD2=15V
VD3=15V
VCC
90%
Io
CS
10%
VD4=15V
Io
tOFF
tON
Input signal
Fig.6
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6
STK531U394A-E
Input / Output Timing Chart
VBS under voltage protection reset signal
ON
HIN1,2,3
OFF
LIN1,2,3
VDD under voltage protection reset signal
*2
VDD
VBS under voltage protection reset signal
*3
VB1,2,3
*4
-------------------------------------------------------ISD operation current level----------------------------------------------------
N terminal
(BUS line)
current
FAULT terminal
voltage
(at pulled-up)
ON
*1
*1
Upper
U, V, W
OFF
Lower
U ,V, W
Utmatically reset after protection
(18ms to 80ms)
Fig. 7
Notes
*1 : Diagram shows the prevention of shoot-through via control logic. More dead time to account for switching delay
needs to be added externally.
*2 : When V
decreases all gate output signals will go low and cut off all of 6 IGBT outputs. When V
rises the
DD
DD
operation will resume immediately.
*3 : When the upper side gate voltage at VB1, VB2 and VB3 drops only, the corresponding upper side output is turned
off. The outputs return to normal operation immediately after the upper side gate voltage rises.
*4 : In case of over current detection, all IGBT’s are turned off and the FAULT output is asserted. Normal operation
resumes in 18 to 80 ms after the over current condition is removed.
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STK531U394A-E
Logic level table
P(13)
INPUT
OUTPUT
Upper
IGBT
Upper
IGBT
Lower
IGBT
HIN
LIN
OCP
U,V,W
FAULT
H
L
L
OFF
OFF
ON
OFF
ON
P
N
OFF
OFF
HIN1,2,3
(17,18,19)
H
OFF
IC
Driver
U,V,W
(10,6,2)
High
L
H
X
L
H
X
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
LIN1,2,3
(20,21,22)
Impedance
High
Impedance
Lower
IGBT
High
Impedance
N(16)
Fig. 8
Sample Application Circuit
STK531U394A-E
VB1 : 9
P : 13
CB
VD1
VD2
VD3
U,VS1 : 10
CS1
VCC
CS2
VB2 : 5
CB
CB
V,VS2 : 6
N : 16
VB3 : 1
W,VS3 : 2
RCIN : 28
U,VS1 : 10
V,VS2 : 6
W,VS3 : 2
HIN1 : 17
HIN2 : 18
HIN3 : 19
Control
Circuit
(5V)
LIN1 : 20
LIN2 : 21
LIN3 : 22
ISO : 24
FAULT : 23
TH : 29
RP
RP
VD=15V
VDD : 25
VSS : 26
CD
ISD : 27
RSD
Fig.9
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8
STK531U394A-E
Recommended Operating Condition
Item
Supply voltage
Symbol
Conditions
MIN
TYP
MAX
Unit
V
V
P to N
VB1 to U, VB2 to V, VB3 to W
to V
0
280
15
450
17.5
16.5
CC
VD1, 2, 3
VD4
12.5
13.5
Pre-driver supply voltage
V
V
*1
15
DD
SS
PWM frequency
fPWM
DT
1
2
-
-
-
-
20
-
kHz
μs
Dead time
Turn-off to Turn-on
ON and OFF
Allowable input pulse width
Tightening torque
PWIN
1
-
μs
‘M3’ type screw
0.6
0.9
Nm
*1 : Pre-drive power supply (VD4 = 15 ±1.5 V) must have the capacity of Io = 20 mA (DC), 0.5 A (Peak).
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Usage Precaution
1. This IPM includes bootstrap diode and resistors. Therefore, by adding a capacitor “CB”, a high side drive voltage is generated; each
phase requires an individual bootstrap capacitor. The recommended value of CB is in the range of 1 to 47 μF, however this value needs
to be verified prior to production. If selecting the capacitance more than 47 μF (±20%), connect a resistor (about 20 Ω) in series
between each 3-phase upper side power supply terminals (VB1, 2, 3) and each bootstrap capacitor. When not using the bootstrap
circuit, each upper side pre-drive power supply requires an external independent power supply.
2. It is essential that wirning length between terminals in the snubber circuit be kept as short as possible to reduce the effect of surge
voltages. Recommended value of “CS” is in the range of 0.1 to 10 μF.
3. “ISO” (pin 24) is terminal for current monitor. High current may flow into that course when short-circuiting the “ISO” terminal and “V
terminal. Please do not connect them.
”
SS
4. “FAULT” (pin 23) is open DRAIN output terminal (Active Low). Pull up resistor is recommended more than 6.8 kΩ.
5. Inside the IPM, a thermistor used as the temperature monitor for internal subatrate is connected between V
terminal and TH terminal
SS
therefore, an external pull up resistor connected between the TH terminal and an external power supply should be used. The
temperature monitor example application is as follows, please refer the Fig.10, and Fig.11 below.
6. Pull down resistor of 33 kΩ is provided internally at the signal input terminals. An external resistor of 2.2 k to 3.3 kΩ should be added to
reduce the influence of external wiring noise.
7. The over current protection feature is not intended to protect in exceptional fault condition. An external fuse is recommended for safety.
8. The level of the over current protection might be changed from IPM design value when “ISD” terminal and “V ” terminal are shorted at
SS
external. Be confirm with actual application(“N” terminal and “V ” terminal are shorted at internal).
SS
9. The level of the over current protection is adjustable with the external resistor “RSD” between “ISD” terminal and “V ” terminal.
SS
10. When input pulse width is less than 1.0 μs, an output may not react to the pulse. (Both ON signal and OFF signal)
This data shows the example of the application circuit, does not guarantee a design as the mass production set.
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9
STK531U394A-E
The characteristic of thermistor
Parameter
Resistance
Symbol
R25
Condition
MIN
99
TYP
100
5.38
4250
-
MAX
101
Unit
kΩ
kΩ
K
Tc = 25C
R100
B
5.18
4208
40
5.60
4293
+125
Tc = 100C
B-Constant (25 to 50C)
Temperature Range
C
Case Temperature(Tc) - Thermal resistance(RTH)
10000
1000
100
10
min
typ
max
1
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Case temperature, Tc-degC
Fig.10 Variation of thermistor resistance with temperature
Case Temperature(Tc) - TH to Vss voltage characteristic
6.00
5.00
4.00
3.00
2.00
1.00
0.00
min
typ
max
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Case temperature, Tc-degC
Fig.11 Variation of thermistor terminal voltage with temperature
(39 kΩ pull-up resistor, 5 V)
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STK531U394A-E
CB capacitor value calculation for bootstrap circuit
Calculate conditions
Parameter
Symbol
VBS
Value
15
Unit
V
Upper side power supply
Total gate charge of output power IGBT at 15 V
Upper limit power supply low voltage protection
Upper side power dissipation
QG
132
12
nC
V
UVLO
IDmax
TONmax
400
-
μA
s
ON time required for CB voltage to fall from 15 V to UVLO
Capacitance calculation formula
Thus, the following formula are true
VBS CB QG IDMAX TONMAX = UVLO CB
therefore,
CB = (QG + IDMAX TONMAX) / (VBS UVLO)
The relationship between TONMAX and CB becomes as follows. CB is recommended to be approximately 3 times the
value calculated above. The recommended value of CB is in the range of 1 to 47 μF, however, this value needs to be
verified prior to production.
CB vs Tonmax
100
10
1
0.1
0.01
0.1
1
10
100
1000
Tonmax [ms]
Fig. 12 Tonmax - CB characteristic
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11
STK531U394A-E
Package Dimensions
unit : mm
The tolerances of length are +/ 0.5 mm unless otherwise specified.
SIP29 44x26.5
CASE 127CH
ISSUE O
44.0
missing pin : 3, 4, 7, 8, 11, 12, 14, 15
41.0
2 R 1.8
S IP 05 Full
1
29
0.6
1.27
3.2
6.20
28 1.27 = 35.56
( 35.0)
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12
STK531U394A-E
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
11 / Tube
SIP29 44x26.5
(Pb-Free)
STK531U394A-E
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries
in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other
intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON
Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is
responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or
standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its
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