STK541UC62K-E [ONSEMI]
智能功率模块 (IPM)，600V，10A;
| 型号： | STK541UC62K-E |
| 厂家： | 
ONSEMI |
| 描述： | 智能功率模块 (IPM)，600V，10A |
| 文件： | 总15页 (文件大小：429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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www.onsemi.com
onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
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product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
STK541UC62K-E
Intelligent Power Module (IPM)
600 V, 10 A
Overview
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This “Inverter IPM” is highly integrated device containing all High Voltage
(HV) control from HV-DC to 3-phase outputs in a single SIP module
(Single-In line Package). Output stage uses IGBT/FRD technology and
implements Under Voltage Protection (UVP) and Over Current Protection
(OCP) with a Fault Detection output flag. Internal Boost diodes are provided
for high side gate boost drive.
Function
Single control power supply due to Internal bootstrap circuit for high side
pre-driver circuit
All control input and status output are at low voltage levels directly
compatible with microcontrollers
Built-in cross conduction prevention
Externally accessible embedded thermistor for substrate temperature
measurement
Certification
UL1557 (File Number : E339285)
Specifications
Absolute Maximum Ratings at Tc = 25C
Parameter
Symbol
Conditions
Ratings
450
Unit
V
V
Supply voltage
P to N, surge < 500 V
*1
CC
V
Collector-emitter voltage
Output current
P to U, V, W or U, V, W to N
600
V
CE
P, N, U, V, W terminal current
±10
A
Io
±5
A
P, N, U, V, W terminal current at Tc = 100C
Output peak current
Pre-driver voltage
Iop
VD1, 2, 3, 4
VIN
P, N, U, V, W terminal current for a Pulse width of 1 ms.
±20
A
VB1 to U, VB2 to V, VB3 to W, V
HIN1, 2, 3, LIN1, 2, 3
FLTEN terminal
to V
SS
*2
20
V
DD
Input signal voltage
V
0.3 to 7
0.3 to V
FLTEN terminal voltage
Maximum power dissipation
Junction temperature
Storage temperature
VFLTEN
Pd
V
DD
IGBT per channel
22
150
W
C
C
Tj
IGBT, FRD
Tstg
40 to +125
Operating substrate
temperature
Tc
IPM case temperature
40 to +100
C
Tightening torque
Isolation voltage
Case mounting screws
*3
*4
0.9
Nm
Vis
50 Hz sine wave AC 1 minute
2000
VRMS
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1 : Surge voltage developed by the switching operation due to the wiring inductance between “P” and “N” terminal.
*2 : Terminal voltage: VD1 = VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = V
to V
DD
SS
*3 : Flatness of the heat-sink should be 0.15 mm and below.
*4 : Test conditions : AC 2500 V, 1 s.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
October 2016 - Rev. 1
1
Publication Order Number :
STK541UC62K-E/D
STK541UC62K-E
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V
Test
circuit
Parameter
Symbol
Conditions
min
typ
max
Unit
Power output section
I
V
= 600 V
Collector-emitter cut-off current
Bootstrap diode reverse current
mA
mA
CE
IR(BD)
CE
0.1
0.1
2.3
2.6
Fig.1
Fig.2
VR(BD)
Ic = 10 A
Tj = 25C
Upper side
1.4
1.7
1.3
1.6
1.3
1.6
1.2
1.5
Collector to emitter
saturation voltage
Lower side *1
Upper side
V
(sat)
V
CE
Ic = 5 A
Tj = 100C
Lower side *1
Upper side
IF = 10 A
2.2
2.5
Tj = 25C
Lower side *1
Upper side
Diode forward voltage
VF
Fig.3
V
IF = 5 A
Tj = 100C
Lower side *1
Junction to case
θj-c(T)
θj-c(D)
IGBT
FRD
5.5
6.5
C/W
mA
thermal resistance
Control (Pre-driver) section
VD1, 2, 3 = 15 V
VD4 = 15 V
0.08
1.6
0.4
4.0
Pre-driver current consumption
ID
Fig.4
High level Input voltage
Vin H
2.5
V
V
HIN1, HIN2, HIN3,
Low level Input voltage
Vin L
0.8
LIN1, LIN2, LIN3 to V
SS
Input threshold voltage hysteresis *1
Logic 0 input leakage current
Logic 1 input leakage current
FLTEN terminal input electric current
FAULT clearance delay time
Vinth(hys)
0.5
76
97
0.8
118
150
2
V
I
VIN = +3.3 V
VIN = 0 V
160
203
A
A
mA
ms
V
IN+
I
IN-
IoSD
FAULT : ON/VFLTEN = 0.1 V
Fault output latch time
Enable
FLTCLR
VEN+
6
9
12
2.5
FLTEN Threshold
VEN-
Disable
0.8
V
and V undervoltage upper
V
V
V
V
V
V
CCUV+
CC
threshold
and V undervoltage lower
S
10.5
10.3
0.14
11.1
10.9
0.2
11.7
V
V
A
SUV+
V
CCUV-
SUV-
CC
threshold
S
11.5
CCUVH
SUVH-
V
and V undervoltage hysteresis
CC
S
Over current protection level
Output level for current monitor
ISD
ISO
PW = 100 μs
Fig.5
10
17
A
V
Io = 10 A
0.30
0.33
0.36
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1 : The lower side’s V (sat) and VF include a loss by the shunt resistance
CE
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V, V
= 300 V, L = 3.9 mH
Test
circuit
CC
Parameter
Symbol
Conditions
min
typ
max
Unit
Switching Character
tON
Io = 10 A
0.2
0.4
0.5
1.1
1.2
Switching time
Fig.6
s
Inductive load
tOFF
Eon
Turn-on switching loss
J
J
J
J
J
J
J
ns
200
Ic = 5 A, P = 300 V,
Turn-off switching loss
Eoff
V
DD
= 15 V, L = 3.9 mH
Fig.6
130
Tc = 25C
Total switching loss
Etot
330
Turn-on switching loss
Eon
240
Ic = 5 A, P = 300 V,
Turn-off switching loss
Eoff
V
DD
= 15 V, L = 3.9 mH
Fig.6
160
Tc = 100C
Total switching loss
Etot
400
Diode reverse recovery energy
Diode reverse recovery time
Reverse bias safe operating area
Short circuit safe operating area
Erec
Trr
17
IF = 5 A, P = 400 V, V = 15 V,
DD
L = 0.5 mH, Tc = 100C
62
RBSOA
SCSOA
Io = 20 A, V
= 450 V
Full square
CE
V
= 400 V, Tc = 100C
s
4
CE
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
Notes :
1. The pre-drive power supply low voltage protection has approximately 0.2 V of hysteresis and operates as follows.
Upper side : The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the input signal will
turn ‘high’.
Lower side : The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage.
2. The pre-drive low voltage protection is the feature to protect devices when the pre-driver supply voltage falls due to an operating malfunction.
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2
STK541UC62K-E
Equivalent Block Diagram
VB1(7)
U(8)
VB2(4)
V(5)
VB3(1)
W(2)
P(10)
U.V.
U.V.
U.V.
Shunt Resistor
Thermistor
N
(12)
Level
Shifter
Level
Level
Shifter
Shifter
VTH (13)
HIN1(15)
HIN2(16)
HIN3(17)
LIN1(18)
LIN2(19)
LIN3(20)
FLTEN(21)
Logic
Logic
Logic
Latch Time About 9ms
( Automatic Reset )
ISO(22)
VDD(14)
Latch
Over-Current
VDD-Under Voltage
VSS(23)
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3
STK541UC62K-E
Module Pin-Out Description
Pin
Name
Description
1
2
VB3
High Side Floating Supply Voltage 3
Output 3 - High Side Floating Supply Offset Voltage
Witout Pin
W, VS3
3
4
VB2
High Side Floating Supply voltage 2
Output 2 - High Side Floating Supply Offset Voltage
Witout Pin
5
V,VS2
6
7
VB1
High Side Floating Supply voltage 1
Output 1 - High Side Floating Supply Offset Voltage
Witout Pin
8
U,VS1
9
10
11
12
P
Positive Bus Input Voltage
Witout Pin
N
Negative Bus Input Voltage
13 VTH
14 VDD
15 HIN1
16 HIN2
17 HIN3
18 LIN1
19 LIN2
20 LIN3
21 FLTEN
22 ISO
Temperature Feedback
+15 V Main Supply
Logic Input High Side Gate Driver - Phase U
Logic Input High Side Gate Driver - Phase V
Logic Input High Side Gate Driver - Phase W
Logic Input Low Side Gate Driver - Phase U
Logic Input Low Side Gate Driver - Phase V
Logic Input Low Side Gate Driver - Phase W
Fault output and Enable
Current monitor output
23 VSS
Negative Main Supply
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STK541UC62K-E
Test Circuit
The tested phase U+ shows the upper side of the U phase and U shows the lower side of the U phase.
■ I
CE
/ IR(BD)
ICE
1
M
A
VD3=15V
VD2=15V
VD1=15V
VD4=15V
U+
10
8
V+
10
5
W+
10
2
U-
8
V-
5
W-
2
2
M
N
4
12
12
12
5
VCE
7
U(BD)
7
V(BD)
4
W(BD)
8
M
N
1
14
23
23
23
23
N
Fig.1
1
M
■ V (sat) (test by pulse)
CE
VD3=15V
VD2=15V
VD1=15V
VD4=15V
2
4
U+
10
8
V+
10
5
W+
10
2
U-
8
V-
5
W-
2
M
N
5
V
Ic
12
18
12
19
12
20
7
VCE(SAT)
m
15
16
17
8
14
m
N
23
Fig.2
■ VF (test by pulse)
M
U+
V+
10
5
W+
10
2
U-
8
V-
5
W-
2
V
VF
IF
M
N
10
8
12
12
12
N
Fig.3
■ ID
VD1
7
VD2
4
VD3
1
VD4
14
ID
A
M
N
M
N
VD*
8
5
2
23
Fig.4
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5
STK541UC62K-E
■ ISD
1
2
4
5
7
8
VD3=15V
VD2=15V
VD1=15V
Input signal
(0 to 5 V)
Io
8
14
Io
SD
VD4=15V
Input signal
18
23
12
100μS
Fig.5
■ Switching time (The circuit is a representative example of the lower side U phase.)
1
10
VD1=15V
2
4
5
7
Input signal
(0 to 5 V)
VD2=15V
VD3=15V
8
Vcc
90%
CS
Io
8
14
10%
VD4=15V
Io
tOFF
Input signal
18
23
12
Fig.6
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STK541UC62K-E
Input / Output Timing Diagram
VBS undervoltage protection reset signal
OFF
HIN1,2,3
ON
LIN1,2,3
VDD
VDD undervoltage protection reset voltage
*2
VBS undervoltage protection reset voltage
*3
VB1,2,3
*4
-------------------------------------------------------ISD operation current level----------------------------------------------------
-terminal
(BUS line)
Current
FLTEN terminal
Voltage
(at pulled-up)
ON
*1
*1
Upper
U, V, W
OFF
Lower
U ,V, W
Automatically reset after protection
(typ.9ms)
Fig.7
Notes
*1 : Diagram shows the prevention of shoot-through via control logic. More dead time to account for switching delay needs to be
added externally.
*2 : When V
decreases all gate output signals will go low and cut off all of 6 IGBT outputs. When V
rises the operation will
DD
DD
resume immediately.
*3 : When the upper side gate voltage at VB1, VB2 and VB3 drops only, the corresponding upper side output is turned off. The
outputs return to normal operation immediately after the upper side gate voltage rises.
*4 : In case of over current detection, all IGBT’s are turned off and the FAULT output is asserted. Normal operation resumes in 6 to
12ms after the over current condition is removed.
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STK541UC62K-E
Logic level table
P
INPUT
OUTPUT
U,V,W
Upper Lower
IGBT IGBT
HIN
LIN
OCP
FAULTEN
FAULTEN
H
L
L
OFF
OFF
Pulled-UP
Pulled-UP
OFF
ON
ON
N
P
OFF
OFF
Ho
H
OFF
HIN1,2,3
High
Impedance
(15,16,17)
IC
Driver
L
H
X
X
L
H
X
X
OFF
OFF
ON
Pulled-UP
Pulled-UP
Pulled-UP
L
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
U,V,W
(8,5,2)
LIN1,2,3
(18,19,20)
High
Impedance
Lo
High
Impedance
High
Impedance
OFF
ON
N
Fig. 8
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STK541UC62K-E
Sample Application Circuit
STK541UC62K-E
1 2
CB
4 5
7 8
10
12 15 16 17 18 19 20 21 22 14 23 13
CB
CB
CS
RP
VP
CD
VDD=15V
Control Logic
Vcc
CI
Fig. 9
Recommended Operating Conditions
Item
Supply voltage
Symbol
Conditions
min
typ
max
Unit
V
V
P to N
VB1 to U, VB2 to V, VB3 to W
to V
0
12.5
13.5
0
280
15
450
17.5
16.5
0.3
CC
VD1, 2, 3
VD4
Pre-driver supply voltage
V
V
*1
15
DD
SS
ON-state input voltage
OFF-state input voltage
PWM frequency
VIN(ON)
VIN(OFF)
fPWM
DT
HIN1, HIN2, HIN3,
LIN1, LIN2, LIN3
V
3.0
1
5.0
20
kHz
μs
Dead time
Turn-off to turn-on
ON and OFF
‘M3’ type screw
2
Allowable input pulse width
Tightening torque
PWIN
1
μs
0.6
0.9
Nm
*1 Pre-drive power supply (VD4 = 15 ±1.5 V) must have the capacity of Io = 20 mA (DC), 0.5 A (Peak).
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Usage Precaution
1. This IPM includes bootstrap diode and resistors. Therefore, by adding a capacitor “CB”, a high side drive voltage is generated;
each phase requires an individual bootstrap capacitor. The recommended value of CB is in the range of 1 to 47 μF, however this
value needs to be verified prior to production. If selecting the capacitance more than 47 μF (±20%), connect a resistor (about 20
Ω) in series between each 3-phase upper side power supply terminals (VB1,2,3) and each bootstrap capacitor.
When not using the bootstrap circuit, each upper side pre-drive power supply requires an external independent power supply.
2. It is essential that wirning length between terminals in the snubber circuit be kept as short as possible to reduce the effect of
surge voltages. Recommended value of “CS” is in the range of 0.1 to 10 μF.
3. “ISO” (pin22) is terminal for current monitor. When the pull-down resistor is used, please select it more than 5.6 kΩ
4. “FLTEN” (pin21) is open DRAIN output terminal (Active Low). Pull up resistor is recommended more than 5.6 kΩ.
5. Inside the IPM, a thermistor used as the temperature monitor for internal subatrate is connected between VSS terminal and VTH
terminal, therefore, an external pull up resistor connected between the TH terminal and an external power supply should be used.
The temperature monitor example application is as follows, please refer the Fig.10 and below.
6. The over-current protection feature is not intended to protect in exceptional fault condition. An external fuse is recommended for
safety.
7. When “N” and “V ” terminal are short-circuited on the outside, level that over-current protection (ISD) might be changed from
SS
designed value as IPM. Please check it in your set (“N” terminal and “V ” terminal are connected in IPM).
SS
8. When input pulse width is less than 1.0 μs, an output may not react to the pulse. (Both ON signal and OFF signal)
This data shows the example of the application circuit, does not guarantee a design as the mass production set.
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STK541UC62K-E
The characteristic of thermistor
Parameter
Resistance
Symbol
Condition
Min
Typ.
Max
Unit
R25
R100
B
99
100
5.38
4250
101
5.66
4335
+125
kΩ
kΩ
K
Tc = 25C
Resistance
5.12
4165
40
Tc = 100C
B-Constant (25 to 50 C)
Temperature Range
C
Case Temperature(Tc) - Thermal resistance(RTH)
10000
1000
100
10
min
typ
max
1
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Case temperature, Tc-degC
Fig.10 Variation of thermistor resistance with temperature
Case Temperature(Tc) - TH terminal voltage(VTH)
6.0
5.0
4.0
3.0
2.0
1.0
0.0
min
typ
max
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Case temperature, Tc-degC
Fig.11 Variation of thermistor terminal voltage with temperature
(47 k pull-up resistor, 5 V)
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10
STK541UC62K-E
The characteristic of PWM switching frequency
Fig. 12 Maximum sinusoidal phase current as function of switching frequency
at Tc = 100℃, V = 400 V
CC
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11
STK541UC62K-E
CB capacitor value calculation for bootstrap circuit
Calculate conditions
Parameter
Symbol
VBS
Value
15
Unit
V
Upper side power supply
Total gate charge of output power IGBT at 15 V
Upper limit power supply low voltage protection
Upper side power dissipation
QG
89
12
nC
V
UVLO
IDMAX
TONMAX
400
μA
s
ON time required for CB voltage to fall from 15 V to UVLO
Capacitance calculation formula
Thus, the following formula are true
VBS x CB - QG - IDMAX * TONMAX = UVLO * CB
therefore,
CB = (QG + IDMAX * TONMAX) / (VBS - UVLO)
The relationship between TONMAX and CB becomes as follows. CB is recommended to be approximately 3 times the value calculated
above. The recommended value of CB is in the range of 1 to 47 μF, however, this value needs to be verified prior to production.
CB vs Tonmax
100
10
1
0.1
0.01
0.1
1
10
100
1000
Tonmax [ms]
Fig. 15 Tonmax - CB characteristic
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STK541UC62K-E
PACKAGE DIMENSIONS
unit : mm
The tolerances of length are +/ 0.5 mm unless otherwise specified.
missing pin ; 3, 6, 9, 11
56.0
note2
note3
4DB00
STK541UC62K
note1
2.0
23
1
+0.2
-0.05
0.6
+0.2
-0.05
0.5
2.0
22.0
5.0
22 x 2.0 = 44.0
3.2
46.2
note1 : Mark for No.1 pin identification.
note2 : The form of a character in this
drawing differs from that of IPM.
note3 : This indicates the date code.
The form of a character in this
drawing differs from that of IPM.
50.0
62.0
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STK541UC62K-E
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
8 / Tube
SIP23 56x21.8
(Pb-Free)
STK541UC62K-E
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries
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guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is
responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or
standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its
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