STK551U392A-E [ONSEMI]
智能功率模块 (IPM)，600V，15A;
| 型号： | STK551U392A-E |
| 厂家： | 
ONSEMI |
| 描述： | 智能功率模块 (IPM)，600V，15A |
| 文件： | 总16页 (文件大小：782K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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STK551U392A-E
Intelligent Power Module (IPM)
600 V, 15 A
Overview
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This “Inverter Power IPM” is highly integrated device containing all High
Voltage (HV) control from HV-DC to 3-phase outputs in a single SIP
module (Single-In line Package). Output stage uses IGBT / FRD
technology and implements Under Voltage Protection (UVP) and Over
Current Protection (OCP) with a Fault Detection output flag. Internal
Boost diodes are provided for high side gate boost drive.
Function
Single control power supply due to Internal bootstrap circuit for high side
pre-driver circuit
All control input and status output are at low voltage levels directly
compatible with microcontrollers
Built-in dead time for shoot-thru protection
Externally accessible embedded thermistor for substrate temperature
measurement
The level of the over-current protection current is adjustable with the
external resistor, “RSD”
Certification
UL1557 (File Number : E339285)
Specifications
Absolute Maximum Ratings at Tc = 25C
Parameter
Supply voltage
Symbol
CC
Conditions
Ratings
Unit
V
V
V
V+ to V-, surge < 500 V
*1
450
600
Collector-emitter voltage
V+ to U,V,W or U,V,W to V-
V
CE
V+, V-, U,V,W terminal current
±15
A
Output current
Io
V+, V-, U,V,W terminal current at Tc = 100C
V+, V-, U,V,W terminal current for a Pulse width of 1ms.
±8
A
Output peak current
Pre-driver voltage
Iop
±30
A
VD1,2,3,4
VIN
VB1 to U, VB2 to V, VB3 to W, V
HIN1, 2, 3, LIN1, 2, 3
FAULT terminal
to V
*2
20
V
DD
SS
0.3 to V
0.3 to V
Input signal voltage
V
DD
DD
FAULT terminal voltage
Maximum power dissipation
VFAULT
Pd
V
IGBT per channel
35
W
Junction temperature
Storage temperature
Tj
IGBT,FRD
150
C
C
C
Nm
VRMS
Tstg
Tc
40 to +125
40 to +100
1.0
Operating case temperature
Tightening torque
IPM case temperature
Case mounting screws
50 Hz sine wave AC 1 minute
*3
*4
Vis
2000
Withstand voltage
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1: Surge voltage developed by the switching operation due to the wiring inductance between + and U-(V-, W-) terminal.
*2: Terminal voltage: VD1 = VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = V
to V
DD
SS
*3: Flatness of the heat-sink should be 0.15 mm and below.
*4: Test conditions : AC 2500 V, 1 second.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
December 2016 - Rev. 2
1
Publication Order Number :
STK551U392A-E/D
STK551U392A-E
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V
Ratings
typ
Test
Parameter
Symbol
Conditions
Unit
circuit
min
max
Power output section
Collector-emitter cut-off current
Bootstrap diode reverse current
I
V
= 600V
CE
mA
mA
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
2.7
3.1
-
CE
IR(BD)
Fig.1
Fig.2
VR(BD)
-
Io = 15 A
Upper side
1.8
2.2
1.3
1.7
1.9
2.3
1.4
1.8
-
Collector to emitter
saturation voltage
Tj = 25C
Lower side *1
Upper side
V
V
(SAT)
V
CE
Io = 8 A
Tj = 100C
Lower side *1
Upper side
-
Io = 15 A
2.5
2.9
-
Tj = 25C
Lower side *1
Upper side
Diode forward voltage
Fig.3
Fig.4
V
F
Io = 8 A
Tj = 100C
Lower side *1
-
Junction to case
θj-c(T)
θj-c(D)
IGBT
FRD
3.5
5
C/W
thermal resistance
-
Control (Pre-driver) section
VD1, 2, 3 = 15 V
VD4 = 15 V
-
-
0.08
0.4
4
Pre-driver power dissipation
ID
mA
1.6
High level Input voltage
Low level Input voltage
Vin H
2.5
-
-
-
-
V
V
Vin L
HIN1, HIN2, HIN3,
0.8
LIN1, LIN2, LIN3 to V
SS
Input threshold voltage
hysteresis *1
Vinth(hys)
0.5
0.8
-
V
Logic 1 input leakage current
IIN+
VIN = +3.3 V
VIN = 0 V
-
-
100
-
143
2
A
A
Logic 0 input leakage current
IIN-
FAULT terminal input electric
current
IoSD
FAULT : ON / VFAULT = 0.1 V
-
2
-
-
mA
ms
V
FAULT clear time
FLTCLR
Fault output latch time.
18
80
V
and VS undervoltage
VCCUV+
VSUV+
VCCUV-
VSUV-
CC
positive going threshold.
and VS undervoltage
10.5
11.1
11.7
V
CC
negative going threshold.
and VS undervoltage
10.3
0.14
10.9
0.2
11.5
-
V
A
V
VCCUVH
VSUVH-
ISD
CC
hysteresis
Over current protection level
PW = 100 μs, RSD = 0 Ω
Fig.5
22.0
0.36
-
27.8
0.40
A
V
Output level for current monitor
ISO
Io = 15 A
0.38
Thermistor for substrate
temperature
Thermistor Resistance
Rt
90
100
110
kΩ
at 25C (Vth)
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
*1: The lower side’s V (SAT) and VF include a loss by the shunt resistance
CE
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2
STK551U392A-E
Ratings
typ
Test
Parameter
Symbol
Conditions
Unit
circuit
min
max
Switching Character
tON
tOFF
Eon
Eoff
Etot
Eon
Eoff
Etot
Erec
Trr
0.3
0.6
1.0
170
210
380
220
380
600
12
1.3
Io = 15 A
Switching time
s
Inductive load
-
-
-
-
-
-
-
-
-
1.8
Ic = 8 A,V+ = 300 V,
Turn-on switching loss
Turn-off switching loss
Total switching loss
J
J
J
J
J
J
-
-
-
-
-
-
-
-
V
= 15 V, L = 3.9mH
DD
Fig.6
Tc = 25C
Ic = 8A, V+ = 300 V,
Turn-on switching loss
Turn-off switching loss
Total switching loss
V
= 15V, L = 3.9mH
DD
Tc = 100C
IF = 8A, V+ = 400 V, V
= 15 V,
Diode reverse recovery energy
Diode reverse recovery time
J
DD
L = 3.9mH, Tc = 100C
ns
54
Reverse bias safe operating
area
RBSOA
SCSOA
dv/dt
Io = 30 A, V
= 450 V
Full square
CE
Short circuit safe operating area
s
V
= 400V, Tc = 100C
4
-
-
-
CE
Allowable offset voltage slew
rate
V/ns
Between U,V,W to U-,V-,W-
50
50
Reference voltage is “V ” terminal voltage unless otherwise specified.
SS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
Notes :
1. When the internal protection circuit operates, a Fault signal is turned ON (When the Fault terminal is low level, Fault signal is ON
state : output form is open DRAIN) but the Fault signal does not latch.After protection operation ends,it returns automatically within
about 18 ms to 80 ms and resumes operation beginning condition. So, after Fault signal detection, set all input signals to OFF (Low)
at once.However, the operation of pre-drive power supply low voltage protection (UVLO : with hysteresis about 0.2 V) is as follows.
Upper side :
The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the
input signal will turn ‘low’.
Lower side :
The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage.
2. When assembling the IPM on the heat sink with M3 type screw, tightening torque range is 0.6 Nm to 0.9 Nm.
3. The pre-drive low voltage protection is the feature to protect devices when the pre-driver supply voltage falls due to an operating
malfunction.
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3
STK551U392A-E
Module Pin-Out Description
Pin
Name
Description
1
VB3
W, VS3
―
High Side Floating Supply Voltage 3
Output 3 - High Side Floating Supply Offset Voltage
Without Pin
2
3
4
―
Without Pin
5
VB2
V,VS2
―
High Side Floating Supply voltage 2
Output 2 - High Side Floating Supply Offset Voltage
Without Pin
6
7
8
―
Without Pin
9
VB1
U,VS1
―
High Side Floating Supply voltage 1
Output 1 - High Side Floating Supply Offset Voltage
Without Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
―
none
V+
Positive Bus Input Voltage
none
NA
NA
none
V-
Negative Bus Input Voltage
Logic Input High Side Gate Driver - Phase 1
Logic Input High Side Gate Driver - Phase V
Logic Input High Side Gate Driver - Phase W
Logic Input Low Side Gate Driver - Phase U
Logic Input Low Side Gate Driver - Phase V
Logic Input Low Side Gate Driver - Phase W
Enable input / Fault output
Current monitor output
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FLTEN
ISO
VDD
VSS
ISD
+15 V Main Supply
Negative Main Supply
Over current detection and setting
Fault clear time setting output
Thermistor output
RCIN
TH
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STK551U392A-E
Equivalent Block Diagram
VB3(1)
W,VS3(2)
VB2(5)
V,VS2(6)
VB1(9)
U,VS1(10)
(13)
+
DB DB DB
Shunt Resistor
-
(16)
-
RCIN(28)
TH(29)
Latch time
HIN1(17)
HIN2(18)
HIN3(19)
LIN1(20)
LIN2(21)
LIN3(22)
FAULT(23)
ISO(24)
Latch
Over-
Thermistor
VDD(25)
Current
VSS(26)
ISD(27)
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5
STK551U392A-E
Test Circuit
(The tested phase : U+ shows the upper side of the U phase and U- shows the lower side of the U phase.)
■ I
CE
/ IR(BD)
ICE
U+
V+
W+
U-
V-
W-
VD1=15V
VD2=15V
VD3=15V
VD4=15V
M
N
13
10
13
6
13
2
10
16
6
2
16
16
VCE
U(BD)
9
V(BD)
W(BD)
M
N
5
1
26
26
26
Fig. 1
5V
VD1=15V
■ V (SAT) (Test by pulse)
CE
U+
V+
W+
U-
V-
W-
VD2=15V
VD3=15V
VD4=15V
M
N
13
10
17
13
6
13
2
10
16
20
6
2
Io
16
21
16
22
VCE(SAT)
m
18
19
Fig. 2
■ V (Test by pulse)
F
U+
V+
W+
U-
V-
W-
M
N
13
10
13
6
13
2
10
16
6
2
16
16
VF
Io
Fig. 3
■ ID
ID
VD1
9
VD2
5
VD3
1
VD4
25
M
N
VD*
10
6
2
26
Fig. 4
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STK551U392A-E
■ ISD
Input signal
(0 to 5 V)
VD1=15V
VD2=15V
Io
VD3=15V
VD4=15V
Io
ISD
Input signal
100 μs
Fig. 5
■ Switching time (The circuit is a representative example of the lower side U phase.)
VD1=15V
VD2=15V
VD3=15V
Input signal
(0 to 5 V)
Vcc
CS
90%
VD4=15V
Io
Io
10%
Input signal
tON
tOFF
Fig. 6
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STK551U392A-E
Logic Timing Chart
VBS undervoltage protection reset signal
ON
HIN1,2,3
OFF
LIN1,2,3
VDD
VDD undervoltage protection reset voltage
*2
VBS undervoltage protection reset voltage
*3
VB1,2,3
*4
-------------------------------------------------------ISD operation current level----------------------------------------------------
-terminal
(BUS line)
Current
FAULT terminal
Voltage
(at pulled-up)
ON
*1
*1
Upper
U, V, W
OFF
Lower
U ,V, W
Automatically reset after protection
(18ms to 80ms)
Fig. 7
Notes
*1 : Diagram shows the prevention of shoot-through via control logic. More dead time to account for switching delay
needs to be added externally.
*2 : When V
DD
decreases all gate output signals will go low and cut off all of 6 IGBT outputs. part. When V rises the
DD
operation will resume immediately.
*3 : When the upper side gate voltage at VB1, VB2 and VB3 drops only, the corresponding upper side output is turned off.
The outputs return to normal operation immediately after the upper side gat voltage rises.
*4 : In case of over current detection, all IGBT’s are turned off and the FAULT output is asserted. Normal operation
resumes in 18 to 80 ms after the over current condition is removed.
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STK551U392A-E
Logic level table
V+
Ho
FLTEN
1
Itrip
0
HIN1,2,3
LIN1,2,3
U,V,W
Vbus
0
HIN1,2,3
1
0
0
1
X
X
0
1
0
1
X
X
(15,16,17)
1
0
IC
U,V,W
(8,5,2)
Driver
1
1
1
0
0
Off
LIN1,2,3
0
Off
(18,19,20)
1
Off
Lo
X
Off
Fig. 8
Sample Application Circuit
STK551U392A-E
VB1:9
+ :13
- : 16
CB
VD1
VD2
VD3
U,VS1:10
VCC
CS1
CS2
VB2:5
CB
CB
V,VS2:6
VB3:1
W,VS3:2
RCIN:28
U,VS1:10
V,VS2: 6
W,VS3: 2
HIN1:17
HIN2:18
HIN3:19
Control
Circuit
(5V)
LIN1:20
LIN2:21
LIN3:22
ISO:24
FAULT:23
TH:29
RP
RP
VDD:25
Vss:26
VD=15V
CD4
ISD:27
RSD
Fig. 9
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STK551U392A-E
Recommended Operating Conditions at Tc = 25C
Ratings
Item
Supply voltage
Symbol
Conditions
Unit
V
min
0
typ
max
450
17.5
16.5
5.0
0.3
20
V
+ to U-(V-,W-)
VB1 to U, VB2 to V, VB3 to W
to V
280
CC
VD1,2,3
VD4
12.5
13.5
3.0
0
15
15
-
Pre-driver supply voltage
V
V
*1
DD
SS
ON-state input voltage
OFF-state input voltage
PWM frequency
VIN(ON)
VIN(OFF)
fPWM
DT
HIN1, HIN2, HIN3,
LIN1, LIN2, LIN3
V
-
1
-
kHz
s
Dead time
Turn-off to turn-on
ON and OFF
1.5
1
-
-
Allowable input pulse width
Tightening torque
PWIN
-
-
s
‘M3’ type screw
0.6
-
0.9
Nm
*1 Pre-drive power supply (VD4 = 15 ±1.5 V) must be have the capacity of Io = 20 mA (DC), 0.5 A (Peak).
Usage Precautions
1. This IPM includes bootstrap diode and resistors. Therefore, by adding a capacitor “CB”, a high side drive voltage is generated;
each phase requires an individual bootstrap capacitor. The recommended value of CB is in the range of 1 to 47 μF, however this
value needs to be verified prior to production. If selecting the capacitance more than 47 μF (±20%), connect a resistor (about 20 Ω)
in series between each 3-phase upper side power supply terminals (VB1, 2, 3) and each bootstrap capacitor.
When not using the bootstrap circuit, each upper side pre-drive power supply requires an external independent power supply.
2.
It is essential that wirning length between terminals in the snubber circuit be kept as short as possible to reduce the effect of
surge voltages. Recommended value of “CS” is in the range of 0.1 to 10 μF.
3. “ISO” (pin 24) is terminal for current monitor. When the pull-down resistor is used, please select it more than 5.6 kΩ
4. “FAULT” (pin 23) is open DRAIN output terminal. (Active Low). Pull up resistor is recommended more than 5.6 kΩ.
5. Inside the IPM, a thermistor used as the temperature monitor for internal subatrate is connected between V
terminal and TH
SS
terminal, therefore, an external pull up resistor connected between the TH terminal and an external power supply should be
used. The temperature monitor example application is as follows, please refer the Fig.10, and Fig.11 below.
6. Pull down resistor of 33 kΩ is provided internally at the signal input terminals. An external resistor of 2.2 k to 3.3 kΩ should be
added to reduce the influence of external wiring noise.
7. The over-current protection feature is not intended to protect in exceptional fault condition. An external fuse is recommended for
safety.
8. When “-” and “V ” terminal are short-circuited on the outside, level that over-current protection (ISD) might be changed from
SS
designed value as IPM. Please check it in your set (“N” terminal and “V ” terminal are connected in IPM).
SS
9. The over-current protection function operates normally when an external resistor RSD is connected between ISD and V
SS
terminals. Be sure to connect this resistor. The level of the overcurrent protection can be changed according to the RSD value.
10. When input pulse width is less than 1.0 μs, an output may not react to the pulse. (Both ON signal and OFF signal)
This data shows the example of the application circuit, does not guarantee a design as the mass production set.
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10
STK551U392A-E
The characteristic of thermistor is as follows.
Parameter
Resistance
Symbol
Condition
Min
Typ.
Max
Unit
R25
R100
B
97
100
5.38
4250
-
103
5.88
4335
+125
kΩ
kΩ
k
Tc = 25C
Resistance
4.93
4165
40
Tc = 100C
B-Constant (25 to 50C)
Temperature Range
C
This data shows the example of the application circuit, does not guarantee a design as the mass production set.
Fig. 10
Condition
Pull-up resistor = 39 kΩ
Pull-up voltage of TH = 5 V
Fig. 11
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STK551U392A-E
The characteristic of PWM switching frequency
Maximum sinusoidal phase current as function of switching frequency (V
= 400 V, Tc = 100C)
BUS
Fig.12
Switching waveform
IGBT Turn-on. Typical turn-on waveform @Tc = 100C, V
= 400 V
BUS
Turn on
X (200 ns/div)
V
CE
(100 V/div)
Io (5 A/div)
Fig. 13
IGBT Turn-off. Typical turn-off waveform @Tc = 100C, V
= 400 V
BUS
X (200 ns/div)
Turn off
V
CE
(100 V/div)
Io (5 A/div)
Fig. 14
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STK551U392A-E
CB capacitor value calculation for bootstrap circuit
Calculate condition
Item
Symbol
VBS
Value
15
Unit
V
Upper side power supply
Total gate charge of output power IGBT at 15 V
Upper side power supply low voltage protection
Upper side power dissipation
Qg
132
12
nC
V
UVLO
IDmax
Ton-max
400
-
μA
s
ON time required for CB voltage to fall from 15 V to UVLO
Capacitance calculation formula
CB must not be discharged below to the upper limit of the UVLO - the maximum allowable on-time (Ton-max) of the upper side is
calculated as follows:
VBS
CB – Qg – IDmax
Ton-max = UVLO CB
CB = (Qg + IDmax
Ton-max) / (VBS – UVLO)
The relationship between Ton-max and CB becomes as follows. CB is recommended to be approximately 3 times the value
calculated above. The recommended value of CB is in the range of 1 to 47 μF, however, the value needs to be verified prior to
production.
Tonmax-Cb characteristic
Fig. 15
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STK551U392A-E
Package Dimensions
unit : mm
SIP29 56x21.8
CASE 127BW
ISSUE O
missing pin : 3, 4, 7, 8, 11, 12, 14, 15
56.0
R1.7
1
29
3.2
0.6
1.27
6.7
1.27 28 = 35.56
46.2
50.0
62.0
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STK551U392A-E
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
8 / Tube
SIP29 56x21.8
(Pb-Free)
STK551U392A-E
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries
in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other
intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON
Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is
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