EPF8074G [PCA]
10/100 LAN Interface Module for PC Card Applications; 10/100 LAN接口模块用于PC卡的应用型号: | EPF8074G |
厂家: | PCA ELECTRONICS INC. |
描述: | 10/100 LAN Interface Module for PC Card Applications |
文件: | 总2页 (文件大小:52K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
10/100 LAN Interface Module for
PC Card Applications
E L E C T R O N I C S I N C .
EPF8074G
• Optimized for QSI6611/6612 PHY/MAC •
• Guaranteed to operate with 8 mA DC bias at 70°C on cable side •
• Complies with or exceeds IEEE 802.3, 10 BT/100 BX Standards •
Electrical Parameters @ 25° C
OCL
@ 70°C
Insertion Loss
Return Loss
(dB Min.)
Common Mode Rejection
Crosstalk (dB Min.)
[Between Channels]
(dB Max.)
(dB Min.)
100 KHz, 0.1 Vrms
8 mA DC Bias
1-80
MHz
100
MHz
150
MHz
1-30
MHz
60
MHz
100
MHz
30-100
MHz
200
MHz
500
MHz
5-10
MHz
10-100
MHz
Cable Side
Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv
-1 -1 -2 -2 -3.5 -3 -18 -18 -12 -12 -10 -10 -38 -38 -30 -25 -20 -15
350µH
-40
-40
•
Isolation : 1500 Vrms
•
Cable Impedance : 100 Ω
•
Rise Time : 3.0 nS Max. •
Schematic
Receive Channel
Transmit Channel
CT
7
6
8
9
CT
12 RX+
RD+
3
TD+
TX-
RD-
CT
2
1
13 RX-
14 CT
1:1
TD-
5
10 TX+
2:1
Dimensions
Package
(Inches)
Dim. Min. Max. Nom.
(Millimeters)
A
Min. Max. Nom.
N
J
A
B
C
D
E
F
G
H
I
.790
.510
.074
.600
.003
.100
.660
.016
.008
.090
0°
.810
.530
.084
Typ.
.020
Typ.
.680
.022
.012
Typ.
8°
20.06 20.57
12.95 13.46
1.88
2.13
15.24 Typ.
0.076 .508
Pin 1
I.D.
PCA
EPF8074G
Date Code
Pad
P
B
E
Q
K
Layout
2.54
Typ.
16.76 17.27
.406
.203
2.28
0°
.559
.305
Typ.
8°
J
D
M
K
L
M
N
P
Q
.025
.045
.635
1.14
.040
.100
.085
.700
1.02
2.54
C
2.16
17.78
L
I
G
H
F
CSF8074Ga Rev. 8/6/97
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
Product performance is limited to specified parameters. Data is subject to change without prior notice.
10/100 LAN Interface Module for
PC Card Applications
E L E C T R O N I C S I N C .
EPF8074G
The circuit below is a guideline for interconnecting PCA’s EPF8074G with QSI6611 and QSI6612 chip set for 10/100 Mb/s
applications. Further details can be obtained from the chip manufacturer application notes.
Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded
signals in 10/100 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust
the chip’s supporting resistor to get at least 2.12V pk-pk across the transmit pins.
It is recommended that system designers do not use the receiver side center tap to ground, via a capacitor. This may
worsen EMI, specifically if the secondary “common mode termination” is pulled to chassis ground as shown.
The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires
pick up from the immediate environment. Their placement and use are to be considered carefully before a design is
finalized.
The “common mode termination” load of 75 Ω shown from the center taps of the secondary may be taken to chassis ground
via a cap of suitable value. This depends upon user’s design, EMI margin etc.
It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit
the plane off at least 0.05 inches away from the chip side pins of EPF8074G. There need not be any ground plane beyond
this point.
For best results, PCB designer should design the outgoing traces preferably to be 50 Ω, balanced and well coupled to
achieve minimum radiation from these traces.
Typical Application Circuit for UTP
+5V
9
10
12
13
1
2
3
6
4
5
7
8
TX+
TX-
6
RJ45*
5
7
QSI66
11
or
QSI66
12
50Ω
50Ω
75Ω
75Ω
14
8
3
2
RX+
RX-
25Ω
25Ω
High Voltage
Capacitor
Node
Pinout
EPF8074G
Chassis
Ground
CM Capacitor
Notes : * NIC Side is shown. Hub side connection will have crossover swapping pins 3-6 & 1-2.
CSF8074Gb Rev. 8/6/97
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
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