PI6C49004AE [PERICOM]
Networking Clock Generator;
| 型号： | PI6C49004AE |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Networking Clock Generator 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总12页 (文件大小：762K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C49004
Networking Clock Generator
Description
Features
TheꢀPI6C49004ꢀisꢀaꢀclockꢀgeneratorꢀdeviceꢀintendedꢀforꢀPCIe®/
networkingꢀ applications.ꢀ Theꢀ deviceꢀ includesꢀ twelveꢀ 100MHzꢀ
differentialꢀHostꢀClockꢀSignalꢀLevelꢀ(HCSL)ꢀoutputsꢀforꢀPCIe,ꢀ
twoꢀsingle-endedꢀ50MHzꢀoutputs,ꢀoneꢀsingle-endedꢀ32.256MHzꢀ
output,ꢀandꢀoneꢀselectableꢀsingle-endedꢀ33/66/133MHzꢀoutput.
•ꢀ 3.3Vꢀ+/-10%ꢀSupplyꢀVoltage
•ꢀ Usesꢀ25MHzꢀxtalꢀsuchꢀasꢀSaronix-eCera™ꢀSRX7278
•ꢀ TwelveꢀPCIe®ꢀ100MHzꢀoutputsꢀwithꢀoptionalꢀ-0.5%ꢀspreadꢀ
spectrumꢀsupportꢀ
•ꢀ TwoꢀLVCMOSꢀ50MHzꢀoutputsꢀthatꢀsupportꢀ+/-ꢀ10%ꢀ
frequencyꢀmargining
UsingꢀaꢀseriallyꢀprogrammableꢀSMBUSꢀinterface,ꢀtheꢀPI6C49004ꢀ
incorporatesꢀspreadꢀspectrumꢀmodulationꢀonꢀtheꢀtwelveꢀ100MHzꢀ
HCSLꢀPCIeꢀoutputs,ꢀandꢀindependentꢀfrequencyꢀmarginingꢀonꢀtheꢀ
50MHzꢀoutput,ꢀ33.3333MHzꢀandꢀ66.6666MHzꢀclockꢀoutputs.
•ꢀ Oneꢀfrequencyꢀselectableꢀ33/66/133MHzꢀLVCMOSꢀoutput
•ꢀ Oneꢀ32.256MHzꢀLVCMOSꢀoutput
•ꢀ Industrialꢀtemperatureꢀ-40°Cꢀtoꢀ85°C
•ꢀ Package:ꢀ56-pinꢀTSSOPꢀpackage
Pin Configuration
VDD
IREF
1
GND
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
2
VDD
NC
3
100M_Q0-
100M_Q0+
100M_Q1+
100M_Q1-
VDD
100M_Q11-
100M_Q11+
100M_Q10-
100M_Q10+
VDD
4
5
6
7
8
GND
VDD
9
VDD
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
100M_Q2+
100M_Q2-
100M_Q3+
100M_Q3-
100M_Q4+
100M_Q4-
100M_Q5+
100M_Q5-
VDD
100M_Q9-
100M_Q9+
100M_Q8-
100M_Q8+
100M_Q7-
100M_Q7+
SCLK
Block Diagram
VDD
12
25 MHz
Clock Buffer/
crystal or
Crystal
12
2
SDATA
clock input
Oscillator
100M_OUT(0-11)
GND
GND
50M_OUT1
50M_OUT2
VDD
VDD
50M_OUT(1-2)
PLL, Dividers,
Buffers, and
Logic
100M_Q6+
100M_Q6-
33/66/133M_OUT1
VDD
33/66/133M_OUT1
GND
SCLK
32.256M_OUT1
VDD
SDATA
PD_RESET
32.256M_OUT1
GND
GND
VDD
NC
X2
8
PD_RESET
X1
ISET
475 Ohms
1%
GND
PS9047A
04/11/11
09-0098
11-0080
1
PI6C49004
Networking Clock Generator
Pin Description
Pin # Pin Name
Pin Type
Power
Pin Description
1
V
3.3VꢀSupplyꢀPin
DD
2
IREF
Output
Connectꢀtoꢀ475-OhmꢀresistorꢀtoꢀsetꢀHCSLꢀoutputꢀdriveꢀcurrent
Noꢀconnect.ꢀLeaveꢀopen
100MHzꢀHCSLꢀoutput
3
NC
4
100M_Q11-
100M_Q11+
100M_Q10-
100M_Q10+
Output
Output
Output
Output
Power
Power
Power
Output
Output
Output
Output
Output
Output
Input
5
100MHzꢀHCSLꢀoutput
6
100MHzꢀHCSLꢀoutput
7
100MHzꢀHCSLꢀoutput
8
V
V
3.3VꢀSupplyꢀPin
DD
DD
9
3.3VꢀSupplyꢀPin
10
11
12
13
14
15
16
17
18
19
GND
Ground
100M_Q9-
100M_Q9+
100M_Q8-
100M_Q8+
100M_Q7-
100M_Q7+
SCLK
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
SMBusꢀcompatibleꢀinputꢀclock.ꢀSupportsꢀfastꢀmodeꢀ400kHzꢀinputꢀclock.
SMBusꢀcompatibleꢀdataꢀline
Ground
SDATA
I/O
GND
Power
50MHzꢀLVCMOSꢀoutput.ꢀWhenꢀdisabled,ꢀoutputꢀisꢀtrisatedꢀandꢀhasꢀaꢀnominalꢀ110k-
Ohmꢀpull-down.ꢀ
20
21
50M_Out1
50M_Out2
Output
Output
50MHzꢀLVCMOSꢀoutput.ꢀWhenꢀdisabled,ꢀoutputꢀisꢀtrisatedꢀandꢀhasꢀaꢀnominalꢀ
110kOhmꢀpull-down.ꢀ
22
23
24
V
Power
Power
Power
3.3VꢀSupplyꢀPin
Ground
DD
GND
V
3.3VꢀSupplyꢀPin
DD
32.256MHzꢀLVCMOSꢀoutput.ꢀWhenꢀdisabled,ꢀoutputꢀisꢀtrisatedꢀandꢀhasꢀaꢀnominalꢀ
110k-Ohmꢀpull-down.ꢀ
25
32.256M_Out1
Output
Power
26
27
28
GND
GND
NC
Noꢀconnect.ꢀLeaveꢀopen
Powerꢀdownꢀresetꢀ-ꢀwhenꢀlowꢀallꢀPLL'sꢀareꢀpoweredꢀdownꢀandꢀoutputsꢀtristated.ꢀ
SMBusꢀregistersꢀareꢀresetꢀtoꢀdefaultꢀvalues.ꢀ
PD_RESET
Input
29
30
31
32
33
X1
X2
Input
Crystalꢀinput.ꢀIntegratedꢀ6pFꢀcapacitance
Crystalꢀoutput.ꢀIntegratedꢀ6pFꢀcapacitance
3.3VꢀSupplyꢀPin
Output
Power
Power
Power
V
DD
GND
GND
V
Connectꢀtoꢀ3.3V
DD
33/66/133MHzꢀselectableꢀLVCMOSꢀoutput.ꢀWhenꢀdisabled,ꢀoutputꢀisꢀtrisatedꢀandꢀhasꢀ
aꢀnominalꢀ110k-Ohmꢀpull-down.ꢀ
34
35
33/66/133M_Out1 Output
100M_Q6- Output
100MHzꢀHCSLꢀoutput
(Continued)
PS9047A
04/11/11
11-0080
2
09-0098
PI6C49004
Networking Clock Generator
Pin # Pin Name
100M_Q6+
Pin Type
Output
Power
Power
Power
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
Power
Output
Output
Output
Output
Power
Power
Pin Description
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
100MHzꢀHCSLꢀoutput
3.3VꢀSupplyꢀPin
V
DD
GND
Ground
V
DD
3.3VꢀSupplyꢀPin
100M_Q5-
100M_Q5+
100M_Q4-
100M_Q4+
100M_Q3-
100M_Q3+
100M_Q2-
100M_Q2+
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
3.3VꢀSupplyꢀPin
V
DD
GND
Ground
V
DD
3.3VꢀSupplyꢀPin
100M_Q1-
100M_Q1+
100M_Q0-
100M_Q0+
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
100MHzꢀHCSLꢀoutput
3.3VꢀSupplyꢀPin
V
DD
GND
Ground
50MHz Frequency Margining Table
33/66/133 MHz Frequency Margining Table
FS3 FS2
FS1
FS0 50M_OUT1,ꢀ50M_OUT2
FS6
0
FS5
0
FS4
0
33M/66M/133M_OUT1
33.3333MHz
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
nominal
0
0
1
66.6666MHzꢀ+2%
66.6666MHzꢀ+1%
66.6666MHzꢀ+0%
66.6666MHzꢀ-2%
66.6666MHzꢀ-4%
66.6666MHzꢀ-6%
133.3333MHz
0
nominalꢀ+ꢀ1%
nominalꢀ+ꢀ2%
nominalꢀ+ꢀ3%
nominalꢀ+ꢀ4%
nominalꢀ+ꢀ5%
nominalꢀ+ꢀ6%
nominalꢀ+ꢀ8%
0
1
0
1
0
1
1
1
1
0
0
0
1
0
1
0
1
1
0
1
1
1
1
1
0
nominalꢀ+ꢀ10%
nominalꢀ-ꢀ1%
nominalꢀ-ꢀ2%
nominalꢀ-ꢀ3%
nominalꢀ-ꢀ4%
nominalꢀ-ꢀ6%
nominalꢀ-ꢀ8%
nominalꢀ-ꢀ10%
0
1
1
0
0
1
1
PS9047A
04/11/11
11-0080
3
09-0098
PI6C49004
Networking Clock Generator
Serial Data Interface (SMBus)
PI6C49004ꢀisꢀaꢀslaveꢀonlyꢀSMBusꢀdeviceꢀthatꢀsupportsꢀindexedꢀblockꢀreadꢀandꢀindexedꢀblockꢀwriteꢀprotocolꢀusingꢀaꢀsingleꢀ7-bitꢀad-
dressꢀandꢀread/writeꢀbitꢀasꢀshownꢀbelow.
Address Assignment
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
0/1
How to Write
1 bit
8 bits
1
8 bits
1
8 bits
1
8 bits
1
8 bits
1
1 bit
Start
bit
Register
offset
Byte
Count = N
Data Byte
0
Data Byte
N - 1
D2H
Ack
Ack
Ack
Ack
…
Ack Stop bit
Note:
1.
Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
How to Read (M:ꢀabbreviationꢀforꢀMasterꢀorꢀController;ꢀS:ꢀabbreviationꢀforꢀslave/clock)
1 bit 8 bits
1 bit
8 bits
1 bit
1 bit
8 bits
1 bit
8 bits
1 bit
8 bits
1 bit
…
8 bits
1 bit
1 bit
S:ꢀ
sendsꢀ
#ꢀofꢀ
dataꢀ
bytesꢀ
thatꢀ
willꢀ
beꢀ
S:ꢀ
sendsꢀ
start-
ingꢀ
dataꢀ
byteꢀ
N
S:ꢀ
sendsꢀ
dataꢀ
byteꢀ
N+X-
1
M:ꢀsendꢀ
startingꢀ
M:ꢀ
Notꢀ
Ac-
knowl-
edge
M:ꢀ
M:ꢀ
S:ꢀ
S:ꢀ
M:ꢀ
M:ꢀ
Sendꢀ
"D3h"
S:ꢀ
sendsꢀ
Ack
M:ꢀ
sendsꢀ
Ack
M:ꢀ
sendsꢀ
Ack
M:ꢀ
Stopꢀ
bit
Startꢀ Sendꢀ sendsꢀ databyteꢀ sendsꢀ Startꢀ
…
bit
"D2h"
Ack
location:ꢀ Ack
N
bit
sent:ꢀ
X
Byte 0: Spread Spectrum Control Register
Power Up
Condition
Output(s)
Affected
Bit
Description
Type
RW
RW
RW
Notes
0=spreadꢀoff
1ꢀ=ꢀ-0.5%ꢀdownꢀ
spread
SpreadꢀSpectrumꢀSelectionꢀforꢀ100MHzꢀHCSLꢀ
PCI-Expressꢀclocks
Allꢀ100MHzꢀHCSLꢀ
PCIꢀExpressꢀoutputs
7
0
0
1
EnablesꢀhardwareꢀorꢀsoftwareꢀcontrolꢀofꢀOEꢀbitsꢀ
(seeꢀByteꢀ0–Bitꢀ6ꢀandꢀBitꢀ5ꢀFunctionalityꢀtable)
PD_RESETꢀpin,ꢀ
bitꢀ5
0ꢀ=ꢀhardwareꢀcntl
1ꢀ=ꢀsoftwareꢀctrl
6
SoftwareꢀPD_RESETꢀbit.ꢀEnablesꢀorꢀdisablesꢀallꢀ
outputs
(seeꢀByteꢀ0–Bitꢀ6ꢀandꢀBitꢀ5ꢀFunctionalityꢀtable)
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
5
Allꢀoutputs
4
3
2
FrequencyꢀmarginingꢀselectꢀbitꢀFS3
FrequencyꢀmarginingꢀselectꢀbitꢀFS2
FrequencyꢀmarginingꢀselectꢀbitꢀFS1
RW
RW
RW
1
0
1
Seeꢀ50MHzꢀFrequen-
cyꢀMarginingꢀTableꢀ
onꢀPageꢀ3
50M_Out1ꢀandꢀ
50M_Out2
1
FrequencyꢀmarginingꢀselectꢀbitꢀFS0
RW
0
Single-endedꢀ
50MHzꢀoutputꢀ
50M_Out2
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0
OEꢀforꢀsingle-endedꢀ50MHzꢀoutputꢀ50M_Out2
RW
1
PS9047A
04/11/11
11-0080
4
09-0098
PI6C49004
Networking Clock Generator
Byte 0 - Bit 6 and Bit 5 Functionality
Bit 6
Bit 5
Description
0
1
1
X
0
PD_RESETꢀHWꢀpin/signalꢀ=ꢀenabled
Disablesꢀallꢀoutputsꢀandꢀtri-statesꢀtheꢀoutputs,ꢀPD_RESETꢀHWꢀpin/signalꢀ=ꢀDOꢀNOTꢀCARE
Enableꢀallꢀoutputs,ꢀPD_RESETꢀHWꢀpin/signalꢀ=ꢀDON'TꢀCARE
1
Byte 1: Control Register
Power Up Condi-
tion
Bit
Description
Type
Output(s) Affected
Notes
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
7
6
5
4
3ꢀ
2
1
0
OEꢀforꢀ32.256M_Out1
RW
RW
RW
RW
RW
RW
RW
RW
1
1
1
1
0
0
0
0
32.256M_Out1
50M_Out1
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
OEꢀforꢀ50M_Out1
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
OEꢀforꢀ33/66/133M_Out1
33/66/133M_Out1
100M_Q11
100M_Q10
100M_Q9
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
OEꢀforꢀ100M_Q11ꢀHCSLꢀoutput
OEꢀforꢀ100M_Q10ꢀHCSLꢀoutput
OEꢀforꢀ100M_Q09ꢀHCSLꢀoutput
OEꢀforꢀ100M_Q08ꢀHCSLꢀoutput
OEꢀforꢀ100M_Q07ꢀHCSLꢀoutput
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
100M_Q8
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
100M_Q7
Byte 2: Control Register
Power Up Condi-
tion
Bit
Description
Type
Output(s) Affected
Notes
7
FrequencyꢀmarginingꢀselectꢀbitꢀFS6 RW
FrequencyꢀmarginingꢀselectꢀbitꢀFS5 RW
FrequencyꢀmarginingꢀselectꢀbitꢀFS4 RW
1
Seeꢀ33/66/133MHzꢀ
FrequencyꢀMargin-
ingꢀTableꢀonꢀPageꢀ3
6
0
33/66/133M_Out1
NotꢀApplicable
5
0
4ꢀtoꢀ0
Reserved
R
Undefined
PS9047A
04/11/11
11-0080
5
09-0098
PI6C49004
Networking Clock Generator
Byte 3: Control Register
Power Up Con-
dition
Bit
Description
Type
Output(s) Affected
Notes
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
7
6
5
4
3
2
OEꢀforꢀ100M_Q6ꢀHCSLꢀOutput
OEꢀforꢀ100M_Q5ꢀHCSLꢀOutput
OEꢀforꢀ100M_Q4ꢀHCSLꢀOutput
OEꢀforꢀ100M_Q3ꢀHCSLꢀOutput
OEꢀforꢀ100M_Q2ꢀHCSLꢀOutput
OEꢀforꢀ100M_Q1ꢀHCSLꢀOutput
RW
RW
RW
RW
RW
RW
0
0
0
0
0
1
100M_Q6
100M_Q5
100M_Q4
100M_Q3
100M_Q2
100M_Q1
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
0ꢀ=ꢀdisabled
1ꢀ=ꢀenabled
1
0
OEꢀforꢀ100M_Q0ꢀHCSLꢀOutput
Reserved
RW
R
1
100M_Q0
Undefined
NotꢀApplicable
Byte 4 & 5: Control Register
Power Up Condi-
tion
Bit
Description
Type
Output(s) Affected
Notes
Notes
7ꢀtoꢀ0
Reserved
R
Undefined
NotꢀApplicable
Byte 6: Control Register
Power Up Condi-
tion
Bit
Description
Type
Output(s) Affected
7
6
5
4
3
2
1
0
RevivsionꢀIDꢀbitꢀ3
RevivsionꢀIDꢀbitꢀ2
RevivsionꢀIDꢀbitꢀ1
RevivsionꢀIDꢀbitꢀ0
VendorꢀIDꢀbitꢀ3
VendorꢀIDꢀbitꢀ2
VendorꢀIDꢀbitꢀ1
VendorꢀIDꢀbitꢀ0
R
R
R
R
R
R
R
R
0
0
0
0
0
0
1
1
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
NotꢀApplicable
PS9047A
04/11/11
11-0080
6
09-0098
StorageꢀTemperature........................................................ –65°Cꢀtoꢀ+150°C
AmbientꢀOperatingꢀTemperature
....................................... –40°Cꢀtoꢀ+85°C
PI6C49004
Networking Clock Generator
Absolute Maximum Ratings1 (Overꢀoperatingꢀfree-airꢀtemperatureꢀrange)
Symbol
Parameters
Min.
Max.
4.6
Units
V
DD
V
IH
V
IL
3.3VꢀI/OꢀSupplyꢀVoltage
InputꢀHighꢀVoltage
InputꢀLowꢀVoltage
StorageꢀTemperature
ESDꢀProtection
-0.5
4.6
V
-0.5
-65
ꢀTs
150
°C
V
V
ESD
2000
Note:
1.ꢀ Stressꢀbeyondꢀthoseꢀlistedꢀunderꢀ“AbsoluteꢀMaximumꢀRatings”ꢀmayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.
Maximum Ratings
(Aboveꢀwhichꢀusefulꢀlifeꢀmayꢀbeꢀimpaired.ꢀꢀForꢀuserꢀguidelines,ꢀnotꢀtested.)
Note:
MaximumꢀSupplyꢀVoltage,ꢀV ꢀ............................................................ 7V
DD
StressesꢀgreaterꢀthanꢀthoseꢀlistedꢀunderꢀMAXIMUMꢀRAT-
INGSꢀmayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.ꢀThisꢀisꢀ
aꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀofꢀtheꢀdeviceꢀ
atꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀindicatedꢀinꢀ
theꢀoperationalꢀsectionsꢀofꢀthisꢀspecificationꢀisꢀnotꢀimplied.ꢀ
Exposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀconditionsꢀforꢀex-
tendedꢀperiodsꢀmayꢀaffectꢀreliability.
AllꢀInputsꢀandꢀOutputsꢀ...............................................–0.5VꢀtoꢀV +0.5V
DDꢀ
JunctionꢀTemperatureꢀ........................................................................125°C
PeakꢀSolderingꢀTemperature..............................................................260°C
DC Electrical Characteristics
Unlessꢀotherwiseꢀspecified,ꢀV =3.3V±10%,ꢀAmbientꢀTemperatureꢀ–40°Cꢀtoꢀ+85°C
DD
Parameter
Symbol
Conditions
Min
Typ
Max
Units
OperatingꢀSupplyꢀVolt-
age
V
3.0
3.6
DD
InputꢀHighꢀVoltage
InputꢀLowꢀVoltage
InputꢀHighꢀVoltage
InputꢀLowꢀVoltage
V
V
V
V
2
V
DD
IH
IL
IH
IL
V
–0.3
0.7V
0.8
SDATA,ꢀSCLK
SDATA,ꢀSCLK
V
DD
DD
0.3V
DD
OperatingꢀSupplyꢀCur-
rent
I
320
3.3
DD
mA
IDDꢀatꢀOutputꢀDisableꢀ
Condition
PD_RESETꢀ=ꢀ0
PD_RESET
216
InternalꢀPull-Up/Pull-
DownꢀResistor
R
C
/R
k–Ohm
pF
PU PD
Allꢀsingle-endedꢀoutputs
Allꢀinputꢀpins
75
6
InputꢀCapacitance
IN
PS9047A
04/11/11
11-0080
7
09-0098
PI6C49004
Networking Clock Generator
Electrical Characteristics - Single-Ended
Unlessꢀotherwiseꢀspecified,ꢀV =3.3V±10%,ꢀAmbientꢀTemperatureꢀ–40°Cꢀtoꢀ+85°C
DD
Parameter
Symbol
Conditions
Min
Typ
Max
Units
MHz
kHz
InputꢀClockꢀFrequency
SCLKꢀFrequency
F
IN
25
100
400
MinimumꢀPulseꢀWidthꢀ
ofꢀPD_RESETꢀInput
100
ns
OutputꢀFrequencyꢀ
Error
FS0,ꢀFS6ꢀ=ꢀ0
32.256MHz
0
ppm
OutputꢀFrequencyꢀ
Error
7
OutputꢀRise/FallꢀTime t t
V
=3.3V,ꢀ0.8Vꢀtoꢀ2.4V
DD
0.5
50
1
ns
%
r,ꢀ f
OutputꢀClockꢀDutyꢀ
Cycle
MeasuredꢀatꢀV /2
45
55
DD
High-LevelꢀOutputꢀ
Voltage
V
V
V
I
I
I
=ꢀ-4mA
=ꢀ-8mA
VDD-0.4
2.4
OH
OH
OL
OHꢀ
OHꢀ
High-LevelꢀOutputꢀ
Voltage
V
Low-LevelꢀOutputꢀ
Voltage
=ꢀ8mA
0.4
OLꢀ
140
200
50MHzꢀclockꢀoutput
Peak-to-PeakꢀJitter
33/66/133MHzꢀclockꢀoutput
32.256MHzꢀclockꢀoutput
125
115
120
120
175
150
175
160
ps
50MHzꢀclockꢀoutput
Cycle-to-CycleꢀJitter
33/66/133ꢀMHzꢀclockꢀoutput
ClockꢀStabilizationꢀ
TimeꢀfromꢀPowerꢀUp
3
10
ms
PS9047A
04/11/11
11-0080
8
09-0098
PI6C49004
Networking Clock Generator
Electrical Characteristics - 100MHz Differential HCSL Outputsꢀ
Unlessꢀotherwiseꢀspecified,ꢀV =3.3V±10%,ꢀAmbientꢀTemperatureꢀ–40°Cꢀtoꢀ+85°C
DD
Parameter
Symbol
Conditions
Min
Typ
Max
100
150
Units
OutputꢀFrequency
Cycle-to-CycleꢀJitter
MHz
T
CC/Jitter
ps
Peak-to-PeakꢀPhaseꢀ
Jitter
UsingꢀPCIeꢀjitterꢀmeasure-
mentꢀmethod
86
0
SpreadꢀModulationꢀ
Percentage
-0.5
%
SpreadꢀModulationꢀ
Frequency
32
50
kHz
DutyꢀCycle
T
45
55
%
DC
Rising/FallingꢀEdgeꢀ
Rate
Noteꢀ3,ꢀ4
0.6
4.0
V/ns
V ꢀ=ꢀ50%(measurementꢀ
threshold)
T
OutputꢀSkew
T
Z
200
ps
OSKEW
ClockꢀSourceꢀDCꢀIm-
pedance,ꢀsingleꢀended
50
Ohm
C-DC
High-LevelꢀOutputꢀ
Voltage
Noteꢀ2,ꢀ(R =33-Ohm,ꢀ
S
R =50-Ohm)
T
V
V
0.65
0.71
0.85
0.05
OH
OL
V
Low-LevelꢀOutputꢀ
Voltage
–0.20
0
I
ꢀ@ꢀ6*I
I
OH
–13
–14.2
–17
mA
V
OH
REF
AbsoluteꢀCrossingꢀ
PointꢀVoltage
V
Noteꢀ2,ꢀ5,ꢀ6
Noteꢀ2,ꢀ5,ꢀ8
Noteꢀ3,ꢀ9,ꢀ10
Noteꢀ3,ꢀ7
0.25
0.55
CROSS
VariationꢀofꢀVCROSSꢀ
overꢀallꢀrisingꢀclockꢀ
edges
V
140
mV
ppm
ns
CROSSꢀDelta
PERIODꢀAVG
PERIODꢀABS
AverageꢀClockꢀPeriodꢀ
Accuracy
T
T
–300
2800
10.203
AbsoluteꢀPeriodꢀ
(includingꢀjitterꢀandꢀ
spreadꢀspectrum)
(Continued)
9.847
PS9047A
04/11/11
11-0080
9
09-0098
PI6C49004
Networking Clock Generator
Notes:
1.ꢀ Measuredꢀatꢀtheꢀendꢀofꢀanꢀ8-inchꢀtraceꢀwithꢀaꢀ5pFꢀload.
2.ꢀMeasurementꢀtakenꢀfromꢀaꢀsingle-endedꢀwaveform.
3.ꢀMeasurementꢀtakenꢀfromꢀaꢀdifferentialꢀwaveform.
4.ꢀMeasuredꢀfromꢀ-150ꢀmVꢀtoꢀ+150ꢀmVꢀonꢀtheꢀdifferentialꢀwaveform.ꢀTheꢀsignalꢀisꢀmonotonicꢀthroughꢀtheꢀmeasurementꢀregionꢀforꢀriseꢀandꢀfallꢀtime.ꢀꢀ
Theꢀ300ꢀmVꢀmeasurementꢀwindowꢀisꢀcenteredꢀonꢀtheꢀdifferentialꢀzeroꢀcrossing.
5.ꢀMeasuredꢀatꢀcrossingꢀpointꢀwhereꢀtheꢀinstantaneousꢀvoltageꢀvalueꢀofꢀtheꢀrisingꢀedgeꢀofꢀ100M+ꢀequalsꢀtheꢀfallingꢀedgeꢀ100M–.
6.ꢀRefersꢀtoꢀtheꢀtotalꢀvariationꢀfromꢀtheꢀlowestꢀcrossingꢀpointꢀtoꢀtheꢀhighest,ꢀregardlessꢀofꢀwhichꢀedgeꢀisꢀcrossing.ꢀꢀ
Refersꢀtoꢀallꢀcrossingꢀpointsꢀforꢀthisꢀmeasurement.
7.ꢀ Definesꢀasꢀtheꢀabsoluteꢀminimumꢀorꢀmaximumꢀinstantaneousꢀperiod.ꢀThisꢀincludesꢀcycle-to-cycleꢀjitter,ꢀrelativeꢀPPMꢀtolerance,ꢀꢀ
andꢀspreadꢀspectrumꢀmodulation.
8.ꢀDefinedꢀasꢀtheꢀtotalꢀvariationꢀofꢀallꢀcrossingꢀvoltagesꢀofꢀrisingꢀ100M+ꢀandꢀfallingꢀ100M–.
9.ꢀ Referꢀtoꢀsectionꢀ4.3.2.1ꢀofꢀtheꢀPCIꢀExpressꢀBaseꢀSpecification,ꢀRevisionꢀ1.1ꢀforꢀinformationꢀregardingꢀPPMꢀconsiderations.
10.ꢀ 10)ꢀPPMꢀrefersꢀtoꢀpartsꢀperꢀmillionꢀandꢀisꢀaꢀDCꢀabsoluteꢀperiodꢀaccuracyꢀspecification.ꢀ1ꢀPPMꢀisꢀ1/1,000,000thꢀofꢀ100ꢀMHzꢀexactlyꢀorꢀ100ꢀHz.ꢀForꢀ300ꢀPPMꢀ
thereꢀisꢀanꢀerrorꢀbudgetꢀofꢀ100Hz/PPMꢀ*ꢀ300ꢀPPMꢀ=ꢀ30ꢀkHz.ꢀTheꢀperiodꢀisꢀmeasuredꢀwithꢀaꢀfrequencyꢀcounterꢀwithꢀmeasurementꢀwindowꢀsetꢀatꢀ100ꢀmsꢀorꢀ
greater.ꢀWithꢀspreadꢀspectrumꢀturnedꢀoffꢀtheꢀerrorꢀisꢀlessꢀthanꢀ±300ꢀppm.ꢀWithꢀspreadꢀspectrumꢀturnedꢀonꢀthereꢀisꢀanꢀadditionalꢀ+2500ꢀPPMꢀnominalꢀshiftꢀinꢀ
maximumꢀperiodꢀresultingꢀfromꢀtheꢀ-0.5%ꢀdownꢀspread.
PS9047A
04/11/11
11-0080
10
09-0098
PI6C49004
Networking Clock Generator
Configuration test load board termination for HCSL Outputs
Rs
33Ω
5%
Clock
TLA
PI6C49004
Rs
33Ω
5%
Clock#
TLB
2pF
5%
2pF
5%
Rp
49.9Ω
1%
Rp
49.9Ω
475Ω
1%
1%
Figureꢀ4.ꢀConfigurationꢀTestꢀLoadꢀBoardꢀTermination
PS9047A
04/11/11
11-0080
11
09-0098
PI6C49004
Networking Clock Generator
DATE: 09/11/06
Notes:
DESCRIPTION: 56-pin, 240-mil wide TSSOP
1. Controlling dimensions in millimeters.
2. Ref: JEDEC MO-153F/EE
PACKAGE CODE: A56
3. Package Outline Exclusive of Mold Flash and Metal Burr
REVISION: M
DOCUMENT CONTROL #: PD-1502
06-0736
Note:
•ꢀ Forꢀlatestꢀpackageꢀinfo,ꢀpleaseꢀcheck:ꢀhttp://www.pericom.com/products/packaging/mechanicals.php
(1-3)
Ordering Information
Ordering Code
Package Code
Package Description
56-pin,ꢀPb-freeꢀ&ꢀGreen,ꢀTSSOP,ꢀ(A56)
PI6C49004AE
A
Notes:
1.ꢀThermalꢀcharacteristicsꢀcanꢀbeꢀfoundꢀonꢀtheꢀcompanyꢀwebꢀsiteꢀatꢀwww.pericom.com/packaging/
2.ꢀEꢀ=ꢀPb-freeꢀandꢀGreen
3.ꢀAddingꢀanꢀXꢀsuffixꢀ=ꢀTape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
PS9047A
04/11/11
11-0080
12
09-0098
All trademarks are property of their respective owners.
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