PSMN057-200P,127 [NXP]
N-channel TrenchMOS SiliconMAX standard level FET TO-220 3-Pin;
| 型号： | PSMN057-200P,127 |
| 厂家： | 
NXP |
| 描述： | N-channel TrenchMOS SiliconMAX standard level FET TO-220 3-Pin 局域网 开关 脉冲 晶体管 |
| 文件： | 总13页 (文件大小：160K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PSMN057-200P
-220AB
O
T
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 02 — 4 January 2011
Product data sheet
1. Product profile
1.1 General description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Higher operating power due to low
Suitable for high frequency
applications due to fast switching
characteristics
thermal resistance
Low conduction losses due to low
on-state resistance
1.3 Applications
DC-to-DC converters
Switched-mode power supplies
1.4 Quick reference data
Table 1.
Symbol
VDS
Quick reference data
Parameter
Conditions
Min Typ Max Unit
drain-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
-
-
-
-
200
39
V
ID
Tmb = 25 °C
A
Ptot
total power dissipation
250
W
Static characteristics
RDSon drain-source on-state
resistance
Dynamic characteristics
QGD gate-drain charge
VGS = 10 V; ID = 17 A;
Tj = 25 °C
-
-
41
37
57
50
mΩ
VGS = 10 V; ID = 39 A;
VDS = 160 V; Tj = 25 °C
nC
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
S
2
drain
source
3
G
mb
mounting base; connected to
drain
mbb076
1
2 3
SOT78 (TO-220AB)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PSMN057-200P
TO-220AB
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
SOT78
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
2 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
200
200
20
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
VDGR
VGS
-
V
-20
V
ID
Tmb = 100 °C
Tmb = 25 °C
-
27.5
39
A
-
A
IDM
Ptot
Tstg
Tj
peak drain current
pulsed; Tmb = 25 °C
Tmb = 25 °C
-
156
250
175
175
A
total power dissipation
storage temperature
junction temperature
-
W
°C
°C
-55
-55
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
-
-
39
A
A
ISM
pulsed; Tmb = 25 °C
156
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source avalanche VGS = 10 V; Tj(init) = 25 °C; ID = 35 A;
-
-
300
35
mJ
A
energy
Vsup ≤ 50 V; unclamped; tp = 100 µs;
RGS = 50 Ω
IAS
non-repetitive avalanche current
Vsup ≤ 50 V; VGS = 10 V;
Tj(init) = 25 °C; RGS = 50 Ω; unclamped
003aae614
003aae615
100
100
P
I
D
der
(%)
80
(%)
80
60
40
20
0
60
40
20
0
0
50
100
150
200
0
50
100
150
200
T
mb
(°C)
T
mb
(°C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
Fig 2. Normalized continuous drain current as a
function of mounting base temperature
PSMN057-200P
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
3 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aae616
003aae628
3
2
10
10
I
DM
(A)
l
AS
R
DS(on)
= V / I
DS
D
(A)
2
10
tp = 10 μs
100 μs
1 ms
25 °C
10
10
1
T prior to avalanche = 150 °C
j
DC
10 ms
100 ms
1
10
2
3
−3
−2
−1
10
1
10
10
10
10
1
10
V
DS
(V)
t
AV
(ms)
Tmb = 25 °C; IDM is single pulse
unclamped inductive load
Fig 3. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
Fig 4. Single-shot avalanche rating; avalanche
current as a function of avalanche period
PSMN057-200P
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
4 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to mounting
base
-
-
0.6
K/W
Rth(j-a)
thermal resistance from junction to ambient
in free air
-
60
-
K/W
003aae617
1
Z
th(j-mb)
δ = 0.5
(K/W)
0.2
0.1
−1
10
10
10
0.05
0.02
t
p
P
δ =
T
−2
single pulse
t
t
p
T
−3
10
−6
−5
−4
−3
−2
−1
10
10
10
10
10
1
t
p
(s)
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN057-200P
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
5 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source breakdown
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 175 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C
VDS = 200 V; VGS = 0 V; Tj = 25 °C
VDS = 200 V; VGS = 0 V; Tj = 175 °C
VGS = 10 V; VDS = 0 V; Tj = 25 °C
VGS = -10 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 17 A; Tj = 175 °C
VGS = 10 V; ID = 17 A; Tj = 25 °C
178
-
-
V
voltage
200
-
-
V
VGS(th)
gate-source threshold
voltage
-
-
6
V
1
2
-
-
-
V
3
4
V
IDSS
drain leakage current
gate leakage current
0.03
10
500
100
100
165
57
µA
µA
nA
nA
mΩ
mΩ
-
-
IGSS
-
2
2
-
-
RDSon
drain-source on-state
resistance
-
-
41
Dynamic characteristics
QG(tot)
QGS
QGD
Ciss
total gate charge
ID = 39 A; VDS = 160 V; VGS = 10 V;
Tj = 25 °C
-
-
-
-
-
-
96
-
nC
nC
nC
pF
pF
pF
gate-source charge
gate-drain charge
input capacitance
output capacitance
13
-
37
50
-
VDS = 25 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C
3750
385
180
Coss
Crss
-
reverse transfer
capacitance
-
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 100 V; RL = 2.7 Ω; VGS = 10 V;
RG(ext) = 5.6 Ω; Tj = 25 °C
-
-
-
-
-
18
-
-
-
-
-
ns
ns
ns
ns
nH
58
turn-off delay time
fall time
105
78
LD
internal drain inductance
measured from drain lead to centre of
die ; Tj = 25 °C
4.5
measured from tab to centre of die ;
Tj = 25 °C
-
-
3.5
7.5
-
-
nH
nH
LS
internal source inductance measured from source lead to source
bond pad ; Tj = 25 °C
Source-drain diode
VSD
trr
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C
-
-
-
0.85
133
895
1.2
V
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 30 V; Tj = 25 °C
-
-
ns
nC
Qr
PSMN057-200P
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
6 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aae618
003aae619
50
0.14
4.2 4.4 4.6
I
D
V
GS
(V) = 10
8
(A)
40
R
DS(on)
(Ω)
6
5.2
0.10
0.06
0.02
30
20
10
0
5
4.8
4.8
5
4.6
5.2
6
4.4
4.2
V
(V) = 10
GS
0
0.4
0.8
1.2
1.6
2
0
10
20
30
40
50
V
DS
(V)
I (A)
D
Tj = 25 °C
Tj = 25 °C
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
003aae620
003aae621
40
50
g
fs
T = 25 °C
j
I
D
(S)
(A)
40
30
T = 175 °C
j
30
20
10
0
20
10
T = 175 °C
j
T = 25 °C
j
0
0
2
4
6
0
10
20
30
40
V
GS
(V)
I (A)
D
VDS > ID x RDSon
VDS > ID x RDSon
Fig 8. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 9. Forward transconductance as a function of
drain current; typical values
003aae622
003aae623
2.9
5
V
GS(th)
(V)
a
maximum
4
2.1
typical
3
2
1
0
minimum
1.3
0.5
−60
20
100
180
−60
20
100
180
T (°C)
j
T (°C)
j
ID = 1 mA; VDS = VGS
Fig 10. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig 11. Gate-source threshold voltage as a function of
junction temperature
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
7 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aae624
003aae625
−1
4
10
10
l
D
C
(pF)
(A)
C
iss
−2
−3
−4
−5
−6
10
10
10
10
10
3
10
minimum
typical
maximum
C
oss
C
rss
2
10
−1
2
0
1
2
3
4
5
10
1
10
10
V
(V)
V
DS
(V)
GS
Tj = 25 °C; VDS = VGS
VGS = 0 V; f = 1 MHz
Fig 12. Sub-threshold drain current as a function of
gate-source voltage
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aae626
003aae627
16
40
I
F
V
(V)
GS
(A)
12
30
V
DD
= 40 V
V
DD
= 160 V
8
4
0
20
10
0
T = 175 °C
T = 25 °C
j
j
0
40
80
120
160
0
0.4
0.8
1.2
Q
G
(nC)
V
(V)
SDS
Tj = 25 °C; ID = 39 A
VGS = 0 V
Fig 14. Gate-source voltage as a function of gate
charge; typical values
Fig 15. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
8 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
p
A
A
1
q
mounting
D
1
base
D
(1)
(1)
L
1
L
2
Q
(2)
b
1
L
(3×)
(2)
b
2
(2×)
1
2
3
b(3×)
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
2
(2)
(2)
(1)
1
UNIT
mm
A
A
b
b
b
c
D
D
1
E
e
L
L
p
q
Q
1
1
2
max.
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
15.0 3.30
12.8 2.79
3.8
3.5
3.0
2.7
2.6
2.2
2.54
3.0
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
08-04-23
08-06-13
SOT78
SC-46
3-lead TO-220AB
Fig 16. Package outline SOT78 (TO-220AB)
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
9 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN057-200P v.2
Modifications:
20110104
Product data sheet
-
PSMN057-200P v.1
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
PSMN057-200P v.1
20000601
Product specification
-
-
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
10 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
9. Legal information
9.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
9.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
PSMN057-200P
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
11 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
non-automotive qualified products in automotive equipment or applications.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN057-200P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 4 January 2011
12 of 13
PSMN057-200P
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 January 2011
Document identifier: PSMN057-200P
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