AT480S58 [POSEICO]

PHASE CONTROL THYRISTOR;
AT480S58
型号: AT480S58
厂家: POWER SEMICONDUCTORS    POWER SEMICONDUCTORS
描述:

PHASE CONTROL THYRISTOR

文件: 总4页 (文件大小:173K)
中文:  中文翻译
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POSEICO SPA  
Via Pillea 42-44, 16153 Genova - ITALY  
Tel. + 39 010 8599400 - Fax + 39 010 8682006  
Sales Office:  
Tel. + 39 010 8599400 - sales@poseico.com  
PHASE CONTROL THYRISTOR  
AT480  
Repetitive voltage up to  
Mean forward current  
Surge current  
5800 V  
527 A  
4,5 kA  
FINAL SPECIFICATION  
Feb. 17 - Issue: 5  
Tj  
[°C]  
Symbol  
Characteristic  
Conditions  
Value  
Unit  
BLOCKING  
V RRM  
V RSM  
V DRM  
Repetitive peak reverse voltage  
Non-repetitive peak reverse voltage  
Repetitive peak off-state voltage  
Repetitive peak reverse current  
Repetitive peak off-state current  
125  
125  
125  
125  
125  
5800  
5900  
5800  
70  
V
V
V
I
I
RRM  
DRM  
V=VRRM  
V=VDRM  
mA  
mA  
70  
CONDUCTING  
I
I
I
T (AV)  
T (AV)  
TSM  
Mean forward current  
180° sin, 50 Hz, Th=55°C, double side cooled  
180° sin, 50 Hz, Tc=85°C, double side cooled  
527  
424  
4,5  
A
A
Mean forward current  
Surge forward current  
I² t  
Sine wave, 10 ms  
without reverse voltage  
125  
kA  
x 103  
I² t  
101  
2,70  
1,30  
A²s  
V
V T  
On-state voltage  
Threshold voltage  
On-state slope resistance  
On-state current =  
1000 A  
25  
V T(TO)  
125  
V
r
T
125 1,760  
mohm  
SWITCHING  
From 75% VDRM up to 620 A; gate 10V, 5W  
Linear ramp up to 70% of VDRM  
di/dt  
Critical rate of rise of on-state current, min.  
Critical rate of rise of off-state voltage, min.  
Gate controlled delay time, typical  
Circuit commutated turn-off time, typical  
Reverse recovery charge  
125  
125  
25  
200  
500  
1,6  
A/µs  
V/µs  
µs  
dv/dt  
VD=100V; gate source 25V, 10W , tr=.5 µs  
t
t
d
q
dv/dt = 20 V/µs linear up to 75% VDRM  
di/dt = -20 A/µs, I= 410 A  
VR= 50 V  
500  
µs  
Q rr  
125  
µC  
A
I
I
I
rr  
H
L
Peak reverse recovery current  
Holding current, typical  
VD=5V, gate open circuit  
VD=5V, tp=30µs  
25  
25  
300  
700  
mA  
mA  
Latching current, typical  
GATE  
V GT  
Gate trigger voltage  
VD=5V  
25  
25  
2,50  
250  
0,25  
30  
V
mA  
V
I
GT  
Gate trigger current  
VD=5V  
V GD  
Non-trigger gate voltage, min.  
Peak gate voltage (forward)  
Peak gate current  
VD=VDRM  
125  
V FGM  
V
I
FGM  
10  
A
V RGM  
P GM  
P G  
Peak gate voltage (reverse)  
Peak gate power dissipation  
Average gate power dissipation  
5
V
Pulse width 100 µs  
150  
2
W
W
MOUNTING  
R th(j-h)  
R th(c-h)  
T j  
Thermal impedance, DC  
Thermal impedance  
Operating junction temperature  
Mounting force  
Junction to heatsink, double side cooled  
Case to heatsink, double side cooled  
37,0  
7,0  
°C/kW  
°C/kW  
°C  
-30 / 125  
11.8 / 13.2  
300  
F
kN  
Mass  
g
ORDERING INFORMATION : AT480 S 58  
VRRM/100  
standard specification  
AT480 PHASE CONTROL THYRISTOR  
FINAL SPECIFICATION Feb. 17 - Issue: 5  
DISSIPATION CHARACTERISTICS  
SQUARE WAVE  
Th [°C]  
130  
120  
110  
100  
90  
80  
70  
60  
50  
30°  
60°  
90°  
120°  
180°  
DC  
40  
0
100  
200  
300  
400  
500  
600  
700  
800  
IF(AV) [A]  
PF(AV) [W]  
DC  
2000  
180°  
1800  
1600  
1400  
1200  
1000  
800  
600  
400  
200  
0
120°  
90°  
60°  
30°  
0
100  
200  
300  
400  
500  
600  
700  
800  
IF(AV) [A]  
AT480 PHASE CONTROL THYRISTOR  
FINAL SPECIFICATION Feb. 17 - Issue: 5  
DISSIPATION CHARACTERISTICS  
SINE WAVE  
Th [°C]  
130  
120  
110  
100  
90  
80  
70  
60  
50  
30°  
60°  
90°  
120°  
180°  
40  
0
100  
200  
300  
400  
500  
600  
IF(AV) [A]  
PF(AV) [W]  
180°  
2000  
1800  
1600  
1400  
1200  
1000  
800  
120°  
90°  
60°  
30°  
600  
400  
200  
0
0
100  
200  
300  
400  
500  
600  
IF(AV) [A]  
AT480 PHASE CONTROL THYRISTOR  
FINAL SPECIFICATION Feb. 17 - Issue: 5  
ON-STATE CHARACTERISTIC  
Tj = 125 °C  
SURGE CHARACTERISTIC  
Tj = 125 °C  
1800  
1600  
1400  
1200  
1000  
800  
600  
400  
200  
0
5
4,5  
4
3,5  
3
2,5  
2
1,5  
1
0,5  
0
0
1
2
3
4
5
1
10  
100  
On-State Voltage [V]  
n° cycles  
TRANSIENT THERMAL IMPEDANCE  
DOUBLE SIDE COOLED  
40  
35  
30  
25  
20  
15  
10  
5
0
0,001  
0,01  
0,1  
1
10  
100  
t[s]  
Cathode terminal type DIN 46244 - A 4.8 - 0.8  
Gate terminal type AMP 60598 - 1  
Distributed by  
All the characteristics given in this data sheet are guaranteed only with uniform clamping force,  
cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm.  
In the interest of product improvement POSEICO SpA reserves the right to change any data  
given in this data sheet at any time without previous notice.  
If not stated otherwise the maximum value of ratings (simbols over shaded background) and  
characteristics is reported.  

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