QPL7442EVB-01 [QORVO]
50 Ω 20 dB MMIC Gain Block (50 â 4000 MHz);
| 型号： | QPL7442EVB-01 |
| 厂家： | 
Qorvo |
| 描述： | 50 Ω 20 dB MMIC Gain Block (50 â 4000 MHz) |
| 文件： | 总16页 (文件大小：1132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Product Overview
The QPL7442 is a low noise, high gain single ended
MMIC RF amplifier, with 20ꢀdB of flat gain over the
entire 50MHz to 4000MHz bandwidth. This IC is
designed to support Cable, Satellite and Terrestrial
TV applications, Home Gateways, and Cable
Modems. The QPL7442 is powered by a single 5 V
supply and packaged in a 2ꢀxꢀ2 8–pin DFN.
2.0 x 2.0mm 8-lead DFN
Key Features
• 50ꢀMHz to 4000ꢀMHz Operation
• Low Power Consumption: 5ꢀV, 85ꢀmA
• Gain: 20ꢀdB over the entire BW
• OP1dB: +20ꢀdBm
Functional Block Diagram
• Low Noise Figure:
1.2ꢀdB
@ 1.2GHz
1.5 dB
@ 3.25GHz
• High Linearity OIP3: +33.7ꢀdBm @ 1.2GHz
+31.1 dBm @ 3.25GHz
• Adjustable Bias Using External Resistors
Applications
Top View
• Cable, Terrestrial, and Satellite LNA
• CATV Amplifiers
• Optical Node
• Cable Modem and Set Top Box
• Single Ended Gain Block
Ordering Information
Part Number
QPL7442SB
QPL7442SR
QPL7442TR7
Description
Sample bag with 5 pieces
7" Reel with 100 pieces
7" Reel with 2500 pieces
QPL7442EVB-01 PCBA
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Absolute Maximum Ratings
Parameter
Supply Voltage (VDD)
Rating
+10ꢀV
Supply Current (IDD)
120ꢀmA
Maximum Input Level
Operating Temperature Range
Storage Temperature Range
20 dBm
-40 to +100ꢀ°C
−65 to +150ꢀ°C
Maximum Junction Temperature
+150ꢀ°C
Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent
damage to the device. Extended application of Absolute Maximum Rating conditions to the device may
reduce device reliability.
Electrical Specifications
Parameter
Condition (1)
Min
Typ
5
Max
Unit
V
Supply Voltage (VDD)
Supply Current (IDD)
Frequency Range
Gain
90
mA
50
4000
MHz
dB
20
Reverse Isolation
Input Return Loss
Output Return Loss
Noise Figure
23
dB
14.8
15.8
1.5
dB
dB
dB
0.05 – 1.2GHz
1.2 – 3.0GHz
3.0 – 4.0GHz
0.05 – 1.2GHz
1.2 – 3.0GHz
3.0 – 4.0GHz
0.05ꢀ–ꢀ1.2GHz
1.2 – 3.0GHz
3.0 – 4.0GHz
50ꢀ–ꢀ3000 MHz
3.0 – 4.0GHz
ΘJC (Junction to Case)
48.2
48.0
46.4
40.6
32.2
38.1
33.9
32.0
27.8
20.8
19.3
62
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
˚C/W
OIP2L(2)
OIP2H(2)
OIP3(3)
OP1dB
Thermal Resistance
Notes:
1. Typical performance at these conditions: Temp = +25ꢀ°C, VDD = +5ꢀV, 50ꢀΩ system, Full band unless otherwise noted.
2. +5ꢀdBmꢀ/ꢀtone output, 53 MHz Spacing.
3. +5ꢀdBmꢀ/ꢀtone output, 5 MHz Spacing.
Data Sheet Rev. D, May 13, 2021
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Subject to change without notice | All rights reserved
QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Evaluation Board Schematic
Notes:
1. L1, C7 tunes input return loss.
2. L2ꢀ, C6 tunes output return loss.
3. D1, D2 provide DC bias path with RF isolation from the RF output path.
4. C4, C5 provides DC blocking.
5. R1, R2 and C3 are pullup/pulldown options that may be added from the input to VDD or to ground to increase linearity or shed power,
trading off degraded noise figure and return loss. Device current can only be adjusted through R1 and R2.
6. Pin5 is an internal gate voltage and may be left floating.
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
- 3 of 16 -
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Evaluation Board Bill of Materials
Designator
Description
Manufacturer
Part Number
PCB
U1
QPL7442–4001 EVB
TTM Technology INC
Qorvo
QPL7442-4001(A)
QPL7442SB
QPL7442
FER, BEAD, 1.8ꢀKΩ, 5ꢀ%, 200ꢀmA, 0402
CAP, 0.3ꢀpF, +/-0.05ꢀpF, 25ꢀV, 0402
D1, D2
C6
TDK
MMZ1005A182ET000
04023J0R3ABWTR
AVX Asia
C1, C4, C5
L1, L2
CAP, 0.01ꢀuF, 10ꢀ%, 50ꢀV, X8L, 0402
IND, 1.2ꢀnH, +/-0.1ꢀnH, 0402
Murata Electronics
GCM155L81E103KA37D
LQG15HS1N2B02D
Murata Electronics
Cinch Connectivity Solutions,
Inc
862000-422 CONN, 0.062 RF SMA F, 50ꢀΩ
862000-055 Solder Turret, 0.062
J3, J4, J6, J7
J1, J2
142-0701-851
2533-0-00-44-00-00-07-
Mouser Electronics
C2, C3, C7, C10,
C11, C12, J5, R1,
R2, R3, R4
Not Populated
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Evaluation Board Assembly Drawing
EVB PCB Material and
Stack-up
Board Material: Rogers
4350B, 4450F, 62mil
total thickness.
ε r = 3.66
Plating: 1.0 oz Copper
Board Dimension: 0.810"
x 1.450"
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Typical Application Schematic
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Performance Data
Notes:
(1) VDD = +5ꢀV, 50ꢀΩ system
(2) OIP3: +5ꢀdBmꢀ/ꢀtone output, 5MHz spacing
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Performance Data (cont’d)
Notes:
(1) OIP2: 5ꢀdBmꢀ/ꢀtone output, 53MHz spacing
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
- 8 of 16 -
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Additional Applications – Bias Resistor Options
Pullup or pulldown resistors may be used to change the bias current (IDD ) for a given bias voltage (VDD). Refer to the EVB
schematic on Page 3. IDD must not exceed 120mA and the junction temperature can not exceed 150ꢀ°C at the maximum
ambient operating temperature.Note that for some cases, return loss may need to be reoptimized by adjusting L1, L2, C7
and C6.
3V
5V
6V
7V
8V
IDD (mA)
R1
R2
R1
R2
R1
R2
R1
R2
R1
R2
100
90
80
70
60
45
31.6K
41.2K
56.2K
82.0K
DNP
DNP
DNP
DNP
DNP
DNP
280.0K
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
97.6K
33.2K
20.0K
13.7K
10.0K
6.98K
DNP
DNP
DNP
DNP
DNP
DNP
25.5K
15.4K
11.5K
9.09K
6.98K
5.49K
DNP
DNP
DNP
DNP
DNP
N/A
14.0K
10.5K
7.87K
8.06K
5.49K
N/A
DNP
60.1K
28.0K
17.4K
10.0K
150.0K
DNP
Notes:
(1) VDD = +5ꢀV, 50ꢀΩ system
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Additional Applications, cont’d – Bias Resistor Options
Notes:
(1) VDD = +5ꢀV, 50ꢀΩ system
(2) OIP3: +5ꢀdBmꢀ/ꢀtone output, 5MHz spacing
Data Sheet Rev. D, May 13, 2021
- 10 of 16 -
www.qorvo.com
Subject to change without notice | All rights reserved
QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Additional Applications, cont’d – Bias Resistor Options
Notes:
(1) VDD = +5ꢀV, 50ꢀΩ system
(2) OIP2: +5ꢀdBmꢀ/ꢀtone output, 53MHz spacing
Data Sheet Rev. D, May 13, 2021
- 11 of 16 -
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Subject to change without notice | All rights reserved
QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Pin Configuration and Description
Top View
Pin Number
Label
RF IN
Description
RF Input, DC blocking capacitor required
2
1,3,4,6,8
GND
Internally Not Connected
7
5
RF OUT / VDD
VG2
RF Output – VDD bias
Gate Voltage bias. Leave as no connect.
Ground. Use recommended via pattern to minimize inductance and thermal
resistance. See PCB Mounting Pattern for suggested footprint.
Backside Paddle
GND
Data Sheet Rev. D, May 13, 2021
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Package Outline
Notes:
1. All dimensions in millimeters. Angles are in degrees.
2. Except where noted, this part outline confroms to JEDEC standard MO-220, Isse E ( Variation VGGC ) for thermally enhanced
Plastic very thin fine pitch dual flat no lead package ( DFN )
3. Dimension and tolerance formats conform to ASME Y14.4M-1994.
4. The termianl #1 identifier and termianl numbering conforms to JESD 95-1 SPP-012.
Data Sheet Rev. D, May 13, 2021
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Package Marking Dimensions
Data Sheet Rev. D, May 13, 2021
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Recommended Mounting Pattern
Notes:
1. All dimensions are in millimeters (inches). Angles are in degrees.
2. Use 1ꢀoz copper minimum for top and bottom layer.
3. Via holes are required under the backside paddle of this device for proper RFꢀ/ꢀDC grounding and thermal dissipation. We recommend a
0.35ꢀmm diameter bit for drilling via holes and a final plated thru diameter of 0.25ꢀmm.
4. All dimensions are in millimeters (inches). Angles are in degrees.
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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QPL7442
50ꢀΩ 20ꢀdB MMIC Gain Block (50 – 4000ꢀMHz)
®
Handling Precautions
Parameter
Rating
Standard
ESDꢀ–ꢀHuman Body Model (HBM)
ESDꢀ–ꢀCharged Device Model (CDM)
MSLꢀ–ꢀMoisture Sensitivity Level
1B (500V) ANSI / ESDAꢁ/ꢁJEDEC JS-001
Caution!
ESD-Sensitive Device
C3 (1000V) ANSI / ESDAꢁ/ꢁJEDEC JS-002
MSL3
IPC / JEDEC J-STD-020
Solderability
Compatible with both lead-free (260ꢀ°C max. reflow temp.) and tinꢀ/ꢀlead (245ꢀ°C max. reflow temp.) soldering processes.
Solder profiles available upon request.
Contact plating: NiPdAu
RoHS Compliance
This part is compliant with 2011ꢀ/ꢀ65ꢀ/ꢀEU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and
Electronic Equipment) as amended by Directive 2015ꢀ/ꢀ863ꢀ/ꢀEU.
This product also has the following attributes:
• Lead Free
• Halogen Free (Chlorine, Bromine)
• Antimony Free
• TBBP-A (C15H12Br402) Free
Pb
• SVHC Free
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations:
Tel: 1-844-890-8163
Web: www.qorvo.com
Email: customer.support@qorvo.com
Important Notice
The information contained in this Data Sheet and any associated documents (“Data Sheet Information”) is believed to be reliable;
however, Qorvo makes no warranties regarding the Data Sheet Information and assumes no responsibility or liability whatsoever for the
use of said information. All Data Sheet Information is subject to change without notice. Customers should obtain and verify the latest
relevant Data Sheet Information before placing orders for Qorvo® products. Data Sheet Information or the use thereof does not grant,
explicitly, implicitly or otherwise any rights or licenses to any third party with respect to patents or any other intellectual property whether
with regard to such Data Sheet Information itself or anything described by such information.
DATA SHEET INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED
HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER
EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE,
INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting
the generality of the foregoing, Qorvo® products are not warranted or authorized for use as critical components in medical, life-saving,
or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or
death. Applications described in the Data Sheet Information are for illustrative purposes only. Customers are responsible for validating
that a particular product described in the Data Sheet Information is suitable for use in a particular application.
© 2021 Qorvo US, Inc. All rights reserved. This document is subject to copyright laws in various jurisdictions worldwide and may not be
reproduced or distributed, in whole or in part, without the express written consent of Qorvo US, Inc. | QORVO® is a registered
trademark of Qorvo US, Inc.
Data Sheet Rev. D, May 13, 2021
Subject to change without notice | All rights reserved
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