R1EX24016ASAS0I_12 [RENESAS]
Two-wire serial interface 16k EEPROM; 两线串行接口16K EEPROM
| 型号： | R1EX24016ASAS0I_12 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Two-wire serial interface 16k EEPROM |
| 文件： | 总19页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Datasheet
R1EX24016ASAS0I
R1EX24016ATAS0I
R10DS0107EJ0100
Rev.1.00
Two-wire serial interface
Feb. 23, 2012
16k EEPROM (2-kword 8-bit)
Description
R1EX24xxx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). They
realize high speed, low power consumption and a high level of reliability by employing advanced MONOS memory
technology and CMOS process and low voltage circuitry technology. They also have a 16-byte page programming
function to make their write operation faster.
Features
Single supply: 1.8 V to 5.5 V
Two-wire serial interface (I2C serial bus)
Clock frequency: 400 kHz
Power dissipation:
Standby: 2 A (max)
Active (Read): 1 mA (max)
Active (Write): 3.0 mA (max)
Automatic page write: 16-byte/page
Write cycle time: 5 ms
Endurance: 1,000k Cycles @25C
Data retention: 100 Years @25C
Small size packages: SOP-8pin , TSSOP 8-pin
Shipping tape and reel
TSSOP 8-pin: 3,000 IC/reel
SOP 8-pin: 2,500 IC/reel
Temperature range: 40 to +85C
Lead free products.
R10DS0107EJ0100 Rev.1.00
Feb. 23, 2012
Page 1 of 17
R1EX24016ASAS0I/R1EX24016ATAS0I
Ordering Information
Orderable Part Numbers
Internal organization
Package
Shipping tape and reel
R1EX24016ASAS0I#S0
16k bit (2048 8-bit)
150 mil 8-pin plastic SOP
PRSP0008DF-B (FP-8DBV)
Lead free
2,500 IC/reel
R1EX24016ATAS0I#S0
16k bit (2048 8-bit)
8-pin plastic TSSOP
PTSP0008JC-B (TTP-8DAV)
Lead free
3,000 IC/reel
Pin Arrangement
8-pin SOP/8-pin TSSOP
1
2
3
4
A0
A1
8
7
6
5
VCC
WP
A2
SCL
SDA
VSS
(Top view)
Pin Description
Pin name
Function
A0 to A2
SCL
SDA
WP
Device address
Serial clock input
Serial data input/output
Write protect
VCC
Power supply
VSS
Ground
Block Diagram
High voltage generator
Memory array
VCC
VSS
WP
Control
logic
A0, A1, A2
SCL
Y-select & Sense amp.
Serial-parallel converter
SDA
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Absolute Maximum Ratings
Parameter
Supply voltage relative to VSS
Input voltage relative to VSS
Operating temperature range*1
Storage temperature range
Symbol
VCC
Value
Unit
V
0.6 to +7.0
0.5*2 to +7.0*3
40 to +85
Vin
V
Topr
Tstg
C
C
55 to +125
Notes: 1. Including electrical characteristics and data retention.
2. Vin (min): 3.0 V for pulse width 50 ns.
3. Should not exceed VCC + 1.0 V.
DC Operating Conditions
Parameter
Symbol
VCC
Min
1.8
Typ
0
Max
5.5
Unit
Supply voltage
V
V
VSS
0
0
Input high voltage
Input low voltage
VIH
VCC 0.7
0.3*1
40
VCC + 0.5
VCC 0.3
+85
V
VIL
V
Operating temperature
Topr
C
Notes: 1. VIL (min): 1.0 V for pulse width 50 ns.
DC Characteristics
(Ta = 40 to +85C, VCC = 1.8 V to 5.5 V)
Parameter
Input leakage current
Output leakage current
Standby VCC current
Read VCC current
Symbol
ILI
Min
Typ
Max
2.0
2.0
2.0
1.0
3.0
0.4
0.2
Unit
Test conditions
VCC = 5.5 V, Vin = 0 to 5.5 V
VCC = 5.5 V, Vout = 0 to 5.5 V
Vin = VSS or VCC
A
A
A
mA
mA
V
ILO
ISB
1.0
ICC1
ICC2
VOL2
VOL1
VCC = 5.5 V, Read at 400 kHz
VCC = 5.5 V, Write at 400 kHz
VCC = 2.7 to 5.5 V, IOL = 3.0 mA
VCC = 1.8 to 2.7 V, IOL = 1.5 mA
Write VCC current
Output low voltage
V
Capacitance
(Ta = +25C, f = 1 MHz)
Test
Parameter
Symbol
Min
Typ
Max
6.0
Unit
pF
conditions
Input capacitance (A0 to A2, SCL, WP)
Output capacitance (SDA)
Cin*1
Vin = 0 V
1
CI/O
*
6.0
pF
Vout = 0 V
Note: 1. Not 100 tested.
Memory Cell Characteristics
(VCC = 1.8 V to 5.5 V)
Ta=25C
Ta=85C
Notes
Endurance
1,000k Cycles min.
100 Years min.
100k Cycles min
10 Years min.
1
1
Data retention
Note: 1. Not 100 tested.
R10DS0107EJ0100 Rev.1.00
Feb. 23, 2012
Page 3 of 17
R1EX24016ASAS0I/R1EX24016ATAS0I
AC Characteristics
(Ta = 40 to +85C, VCC = 1.8 to 5.5 V)
Test Conditions
Input pules levels:
VIL = 0.2 VCC
VIH = 0.8 VCC
Input rise and fall time: 20 ns
Input and output timing reference levels: 0.5 VCC
Output load: TTL Gate + 100 pF
Parameter
Symbol
Min
Typ
Max
400
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Notes
Clock frequency
fSCL
tLOW
tHIGH
tI
Clock pulse width low
Clock pulse width high
Noise suppression time
Access time
1200
600
50
900
1
tAA
100
1200
600
600
0
Bus free time for next mode
Start hold time
tBUF
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
Start setup time
Data in hold time
Data in setup time
Input rise time
100
300
300
1
1
Input fall time
tF
Stop setup time
tSU.STO
tDH
600
50
Data out hold time
Write protect hold time
Write protect setup time
Write cycle time
tHD.WP
tSU.WP
tWC
1200
0
5
2
Notes: 1. Not 100 tested.
2. tWC is the time from a stop condition to the end of internally controlled write cycle.
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Timing Waveforms
Bus Timing
1/fSCL
tLOW
tR
tF
tHIGH
SCL
tSU.STA
tHD.DAT
tSU.DAT
tHD.STA
tSU.STO
SDA
(in)
tBUF
tAA
tDH
SDA
(out)
tSU.WP
tHD.WP
WP
Write Cycle Timing
Stop condition
Start condition
SCL
D0 in
SDA
tWC
(Internally controlled)
Write data
(Address (n))
ACK
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Pin Function
Serial Clock (SCL)
The SCL pin is used to control serial input/output data timing. The SCL input is used to positive edge clock data into
EEPROM device and negative edge clock data out of each device. Maximum clock rate is 400 kHz.
Serial Input/Output Data (SDA)
The SDA pin is bidirectional for serial data transfer. The SDA pin needs to be pulled up by resistor as that pin is open-
drain driven structure. Use proper resistor value for your system by considering VOL, IOL and the SDA pin capacitance.
Except for a start condition and a stop condition which will be discussed later, the SDA transition needs to be completed
during the SCL low period.
Data Validity (SDA data change timing waveform)
SCL
SDA
Data
Data
change
change
Note: High-to-low and low-to-high change of SDA should be done during the SCL low period.
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R1EX24016ASAS0I/R1EX24016ATAS0I
Device Address (A0, A1, A2)
One device can be wired for one common data bus line as maximum. All device address are used for memory address,
corresponding device address pins must not be fixed.
Pin Connections for A0 to A2
Pin connection
Max connect
number
Memory size
Note
A2
*1
A1
*1
A0
*1
16k bit
1
Use A0,A1,A2 for memory address a8,a9 and
a10
Note: 1. Floating state can be possible.
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in the following
table.
Also, acknowledgment "0" is outputted after inputting device address and memory address. After inputting write data,
acknowledgment "1""(NO ACK) is outputted.
When the WP is low, write operation for all memory arrays are allowed. The read operation is always activated
irrespective of the WP pin status.
The WP pin is internally pulled-down to VSS. Write operations for all memory array are allowed if unconnected.
Write Protect Area
Write protect area
WP pin status
16k bit
Full (16k bit)
VIH
VIL
Normal read/write operation
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R1EX24016ASAS0I/R1EX24016ATAS0I
Functional Description
Start Condition
A high-to-low transition of the SDA with the SCL high is needed in order to start read, write operation (See start
condition and stop condition).
Stop Condition
A low-to-high transition of the SDA with the SCL high is a stop condition. The stand-by operation starts after a read
sequence by a stop condition. In the case of write operation, a stop condition terminates the write data inputs and place
the device in a internally-timed write cycle to the memories. After the internally-timed write cycle which is specified as
tWC, the device enters a standby mode (See write cycle timing).
Start Condition and Stop Condition
SCL
SDA
(in)
Start condition
Stop condition
Acknowledge
All addresses and data words are serially transmitted to and from in 8-bit words. The receiver sends a zero to
acknowledge that it has received each word. This happens during ninth clock cycle. The transmitter keeps bus open to
receive acknowledgment from the receiver at the ninth clock. In the write operation, EEPROM sends a zero to
acknowledge after receiving every 8-bit words. In the read operation, EEPROM sends a zero to acknowledge after
receiving the device address word. After sending read data, the EEPROM waits acknowledgment by keeping bus open.
If the EEPROM receives zero as an acknowledge, it sends read data of next address. If the EEPROM receives
acknowledgment "1" (no acknowledgment) and a following stop condition, it stops the read operation and enters a
stand-by mode. If the EEPROM receives neither acknowledgment "0" nor a stop condition, the EEPROM keeps bus
open without sending read data.
Acknowledge Timing Waveform
1
2
8
9
SCL
SDA IN
Acknowledge
out
SDA OUT
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Device Addressing
The EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or a
write operation. The device address word consists of 4-bit device code, 3-bit device address code and 1-bit
read/write(R/W) code. The most significant 4-bit of the device address word are used to distinguish device type and
this EEPROM uses “1010” fixed code. The device address code is followed by the 3-bit memory address in the order
of a10, a9, a8.
The eighth bit of the device address word is the read/write(R/W) bit. A write operation is initiated if this bit is low and
a read operation is initiated if this bit is high.
The EEPROM turns to a stand-by state if the device code is not “1010”.
Device Address Word
Device address word (8-bit)
Device code (fixed)
Device address code
R/W code*1
16k
1
0
1
0
a10
a9
a8
R/W
Note: 1. R/W=“1” is read and R/W = “0” is write.
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Write Operations (WP=Low)
Byte Write: (Write operation during WP=Low status)
A write operation requires an 8-bit device address word with R/W = “0”. Then the EEPROM sends acknowledgment
"0" at the ninth clock cycle. After these, the 16kbit EEPROM receives 8-bit memory address words. Upon receipt of
this memory address, the EEPROM outputs acknowledgment "0" and receives a following 8-bit write data. After
receipt of write data, the EEPROM outputs acknowledgment "0". If the EEPROM receives a stop condition, the
EEPROM enters an internally-timed write cycle and terminates receipt of SCL, SDA inputs until completion of the
write cycle. The EEPROM returns to a standby mode after completion of the write cycle.
Byte Write Operation
WP
Device
Memory
address
address (n)
Write data (n)
W
1 0 1 0
16k
ACK
R/W
ACK
ACK
Stop
Start
Page Write: (Write operation during WP=Low status)
The EEPROM is capable of the page write operation which allows any number of bytes up to 16 bytes to be written in a
single write cycle. The page write is the same sequence as the byte write except for inputting the more write data. The
page write is initiated by a start condition, device address word, memory address(n) and write data (Dn) with every
ninth bit acknowledgment. The EEPROM enters the page write operation if the EEPROM receives more write data
(Dn+1) instead of receiving a stop condition. The a0 to a3 address bits are automatically incremented upon receiving
write data (Dn+1). The EEPROM can continue to receive write data up to 16 bytes. If the a0 to a3 address bits reaches
the last address of the page, the a0 to a3 address bits will roll over to the first address of the same page and previous
write data will be overwritten. Upon receiving a stop condition, the EEPROM stops receiving write data and enters
internally-timed write cycle.
Page Write Operation
WP
Device
Memory
address
address (n)
Write data (n)
ACK
Write data (n+m)
16k
Start
W
1 0 1 0
ACK
R/W
ACK
ACK
Stop
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Write Operations (WP=High)
Byte Write: (Write operation during WP=High status)
A write operation requires an 8-bit device address word with R/W = “0”. Then the EEPROM sends acknowledgment
"0" at the ninth clock cycle. After these, the 16kbit EEPROM receives 8-bit memory address words.
Upon receipt of this memory address, the EEPROM outputs acknowledgment "0". After receipt of 8-bit write data, the
EEPROM outputs acknowledgment "1"(NO ACK). Then the EEPROM write operations are not allowed.
Byte Write Operation
WP
Device
address
Memory
address (n)
No ACK
Stop
Write data (n)
W
1 0 1 0
16k
ACK
R/W
ACK
Start
Page Write: (Write operation during WP=High status)
The page write is the same sequence as the byte write. The page write is initiated by a start condition, device address
word and memory address(n) with every ninth bit acknowledgment"0". But after inputting write data(Dn) , the
EEPROM outputs acknowledgment "1"(NO ACK). Then the EEPROM write operations are not allowed.
Page Write Operation
WP
Device
Memory
No ACK
No ACK
address
address (n)
Write data (n)
ACK
Write data (n+m)
16k
Start
W
1 0 1 0
ACK
R/W
Stop
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Acknowledge Polling:
Acknowledge polling feature is used to show if the EEPROM is in a internally-timed write cycle or not. This feature is
initiated by the stop condition after inputting write data. This requires the 8-bit device address word following the start
condition during a internally-timed write cycle. Acknowledge polling will operate when the R/W code = “0”.
Acknowledgment “1” (no acknowledgment) shows the EEPROM is in a internally-timed write cycle and
acknowledgment “0” shows that the internally-timed write cycle has completed. See Write Cycle Polling using ACK.
Write Cycle Polling Using ACK
Send
write command
Send
stop condition
to initiate write cycle
Send
start condition
Send
device address word
with R/W = 0
No
No
ACK
returned
Yes
Next operation is
addressing the memory
Yes
Send
Send
Send
memory address
start condition
stop condition
Send
stop condition
Proceed random address
read operation
Proceed write operation
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Read Operation
There are three read operations: current address read, random read, and sequential read. Read operations are initiated
the same way as write operations with the exception of R/W = “1”.
Current Address Read:
The internal address counter maintains the last address accessed during the last read or write operation, with
incremented by one. Current address read accesses the address kept by the internal address counter. After receiving a
start condition and the device address word (R/W is “1”), the EEPROM outputs the 8-bit current address data from the
most significant bit following acknowledgment “0”. If the EEPROM receives acknowledgment “1” (no
acknowledgment) and a following stop condition, the EEPROM stops the read operation and is turned to a standby state.
In case the EEPROM has accessed the last address of the last page at previous read operation, the current address will
roll over and returns to zero address. In case the EEPROM has accessed the last address of the page at previous write
operation, the current address will roll over within page addressing and returns to the first address in the same page.
The current address is valid while power is on. The current address after power on will be indefinite. The random read
operation described below is necessary to define the memory address.
Current Address Read Operation
Device
address
Read data (n+1)
ACK No ACK
16k
1 0 1 0
R
1*
1*1*
Stop
Start
R/W
Notes:1*Don't care bit
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Random Read:
This is a read operation with defined read address. A random read requires a dummy write to set read address. The
EEPROM receives a start condition, device address word (R/W=0) and memory address 8-bit sequentially. The
EEPROM outputs acknowledgment “0” after receiving memory address then enters a current address read with
receiving a start condition. The EEPROM outputs the read data of the address which was defined in the dummy write
operation. After receiving acknowledgment “1”(no acknowledgment) and a following stop condition, the EEPROM
stops the random read operation and returns to a standby state.
Random Read Operation
Memory
Device
Device
address (n)
address
address
Read data (n)
16k
W
R
1 0 1 0
1 0 1 0
R/W
ACK
R/W
No ACK
Stop
Start
ACK
Start
ACK
Current address read
Dummy write
Notes: 1. Don't care bit
Sequential Read:
Sequential reads are initiated by either a current address read or a random read. If the EEPROM receives
acknowledgment “0” after 8-bit read data, the read address is incremented and the next 8-bit read data are coming out.
This operation can be continued as long as the EEPROM receives acknowledgment “0”. The address will roll over and
returns address zero if it reaches the last address of the last page. The sequential read can be continued after roll over.
The sequential read is terminated if the EEPROM receives acknowledgment “1” (no acknowledgment) and a following
stop condition.
Sequential Read Operation
Device
address
Read data (n) Read data (n+1) Read data (n+2) Read data (n+m)
R
1 0 1 0
*1
*1 *1
16k
Start
ACK
ACK
R/W
ACK
ACK
No ACK
Stop
*1: Don't care bit
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
Notes
Data Protection at VCC On/Off
When VCC is turned on or off, noise on the SCL and SDA inputs generated by external circuits (CPU, etc) may act as a
trigger and turn the EEPROM to unintentional program mode. To prevent this unintentional programming, this
EEPROM has a power on reset function. Be careful of the notices described below in order for the power on reset
function to operate correctly.
SCL and SDA should be fixed to VCC or VSS during VCC on/off. Low to high or high to low transition during VCC
on/off may cause the trigger for the unintentional programming.
V
V
CC should be turned off after the EEPROM is placed in a standby state.
CC should be turned on from the ground level(VSS) in order for the EEPROM not to enter the unintentional
programming mode.
VCC turn on rate should be slower than 2 s/V.
Noise Suppression Time
This EEPROM have a noise suppression function at SCL and SDA inputs, that cut noise of width less than 50 ns. Be
careful not to allow noise of width more than 50 ns.
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Feb. 23, 2012
Page 15 of 17
R1EX24016ASAS0I/R1EX24016ATAS0I
Package Dimensions
R1EX24016ASAS0I (PRSP0008DF-B / Previous Code: FP-8DBV)
JEITA Package Code
P-SOP8-3.9x4.89-1.27
RENESAS Code
PRSP0008DF-B
Previous Code
FP-8DBV
MASS[Typ.]
0.08g
*1
D
F
NOTE)
8
5
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
b
p
Index mark
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Reference
Symbol
1
4
Min Nom Max
*3
bp
x
e
Z
D
M
4.89 5.15
3.90
E
A2
A1
A
bp
b1
c
L1
0.102 0.14 0.254
1.73
0.35 0.40 0.45
0.15 0.20 0.25
L
c1
θ
HE
e
y
0° 8°
5.84 6.02 6.20
1.27
Detail F
x
0.25
y
Z
0.10
0.69
L
L1
0.406 0.60 0.889
1.06
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Feb. 23, 2012
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R1EX24016ASAS0I/R1EX24016ATAS0I
R1EX24016ATAS0I (PTSP0008JC-B / Previous Code: TTP-8DAV)
JEITA Package Code
P-TSSOP8-4.4x3-0.65
RENESAS Code
PTSP0008JC-B
Previous Code
TTP-8DAV
MASS[Typ.]
0.034g
*1
D
F
8
5
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
bp
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Reference
Symbol
Min Nom Max
Index mark
D
E
3.00 3.30
4.40
A2
A1
A
bp
b1
c
L 1
0.03 0.07 0.10
1.10
0.15 0.20 0.25
1
4
*3
e
bp
Z
x
M
0.10 0.15 0.20
c1
θ
0° 8°
6.20 6.40 6.60
L
HE
e
x
y
0.65
0.13
0.10
Detail F
y
Z
L
L1
0.805
0.40 0.50 0.60
1.00
R10DS0107EJ0100 Rev.1.00
Feb. 23, 2012
Page 17 of 17
Revision History
R1EX24016ASAS0I/R1EX24016ATAS0I Data Sheet
Description
Summary
Rev.
Date
Page
—
0.01
0.02
Dec. 28, 2007
Jan. 08, 2009
Initial issue
P1
Features
Endurance cycles change 106 cycles to 1,000k cycles @25°C.
Data retentions years change 10 years to 100years@25°C.
Memory cell characteristics new is described.
AC characteristics
P4
P5
Erase/Write endurance is deleted.
Notes1. change Not 100% tested.
Notes3. deleted.
1.00
Feb. 23, 2012
—
Delete Preliminary
P7
Addition of write protect description
The WP pin is internally pulled-down to Vss. Write operations for all memory
array are allowed if unconnected.
P9
Delete the sentence
or device address code doesn’t coincide with status of the correspond hard-
wired device address pins A0 to A2.
P14
P15
Change the sentence
device address word (R/W=0) and memory address 2 8-bit sequentially. to
device address word (R/W=0) and memory address 8-bit sequentially.
Change Note
VCC turn on speed should be longer than 10 s. to
VCC turn on rate should be slower than 2 s/V.
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3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for
the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the
use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and
regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to
the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is
prohibited under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics
assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product
depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas
Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the
use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics.
The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc.
"Standard":
Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools;
personal electronic equipment; and industrial robots.
"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically
designed for life support.
"Specific":
Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical
implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage
range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the
use of Renesas Electronics products beyond such specified ranges.
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and
malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the
possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to
redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult,
please evaluate the safety of the final products or system manufactured by you.
10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics
products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes
no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.
(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
SALES OFFICES
http://www.renesas.com
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A.
Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited
1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada
Tel: +1-905-898-5441, Fax: +1-905-898-3220
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-65030, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China
Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898
Renesas Electronics Hong Kong Limited
Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2886-9318, Fax: +852 2886-9022/9044
Renesas Electronics Taiwan Co., Ltd.
13F, No. 363, Fu Shing North Road, Taipei, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632
Tel: +65-6213-0200, Fax: +65-6278-8001
Renesas Electronics Malaysia Sdn.Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics Korea Co., Ltd.
11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5141
© 2012 Renesas Electronics Corporation. All rights reserved.
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