RJJ0601JPE-00-Q3 [RENESAS]
Silicon P Channel MOS FET High Speed Power Switching; 硅P沟道MOS FET高速电源开关
| 型号： | RJJ0601JPE-00-Q3 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Silicon P Channel MOS FET High Speed Power Switching |
| 文件： | 总7页 (文件大小：123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RJJ0601JPE
Silicon P Channel MOS FET
High Speed Power Switching
REJ03G1603-0100
Rev.1.00
Nov 21, 2007
Features
•
Low on-resistance
DS(on) = 8.2 mΩ typ.
R
•
•
Capable of 4.5 V gate drive
High speed switching
Outline
RENESAS Package code: PRSS0004AE-B
(Package name: LDPAK(S)-(1) )
D
2, 4
4
1. Gate
1
2. Drain
3. Source
4. Drain
G
1
2
3
3
S
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Symbol
Value
–60
Unit
VDSS
V
V
VGSS
±20
ID
ID (pulse) Note
IDR
–90
A
1
Drain peak current
–360
–90
A
Body-drain diode reverse drain current
Avalanche current
A
3
Note
IAP
–40
A
3
2
Note
Avalanche energy
EAR
137
mJ
W
°C
°C
Channel dissipation
PchNote
90
Channel temperature
Tch
150
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
Thermal Impedance Characteristics
•
Channel to case thermal impedance θch-c: 1.39°C/W
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 1 of 6
RJJ0601JPE
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
V(BR)DSS
V(BR)GSS
IDSS
Min
–60
±20
—
Typ
—
Max
—
Unit
V
Test Conditions
Drain to source breakdown voltage
Gate to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Gate to source cutoff voltage
Forward transfer admittance
ID = –10 mA, VGS = 0
IG = ±100 µA, VDS = 0
VDS = –60 V, VGS = 0
VGS = ±16 V, VDS = 0
VDS = –10 V, ID = –1 mANote
ID = –45 A, VDS = –10 VNote
ID = –45 A, VGS= –10 VNote
—
—
V
—
–10
±10
–2.5
—
µA
µA
V
IGSS
—
—
4
VGS(off)
|yfs|
–1.0
60
—
—
4
100
8.2
10
S
4
Static drain to source on state
resistance
RDS(on)
RDS(on)
Ciss
Coss
Crss
Qg
11
15
—
mΩ
mΩ
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
4
—
ID = –45 A, VGS = –4.5 VNote
Input capacitance
—
8800
950
600
150
25
VDS = –10 V, VGS = 0
f = 1 MHz
Output capacitance
Reverse transfer capacitance
Total gate charge
—
—
—
—
—
—
VDD = –25 V, VGS = –10 V,
ID = –90 A
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Qgs
Qgd
td(on)
tr
—
—
—
23
—
—
25
—
VGS = –10 V, ID= –45 A,
VDD = –30V RG = 4.7 Ω
—
30
—
Turn-off delay time
Fall time
td(off)
tf
—
290
135
–0.96
45
—
—
—
Body-drain diode forward voltage
VDF
—
—
IF = –90 A, VGS = 0
Body-drain diode reverse recovery
time
trr
—
—
ns
IF = –90 A, VGS = 0,
diF/dt = 100 A/µs
Note: 4. Pulse test
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 2 of 6
RJJ0601JPE
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
100
80
60
40
20
−1000
−100
10 µs
PW = 10 ms (1shot)
−10
−1
Operation in
this area is
limited by RDS (on)
−0.1
Ta = 25°C
1 shot Pulse
−0.01
−0.1
0
−1
−10
−100
25
50
75 100 125 150
Case Temperature Tc (°C)
Drain to Source Voltage VDS (V)
Typical Transfer Characteristics
Typical Output Characteristics
−100
−1000
−100
−4.5 V
VDS = −10 V
−3.0 V
−10 V
Pulse Test
−10
−1
−50
−0.1
VGS = −2.7 V
Tc = 150°C
25°C
−0.01
−0.001
−40°C
Pulse Test
−0.0001
0
0
−5
−10
−1
−2
−3
−4
−5
Gate to Source Voltage VGS (V)
Drain to Source Voltage VDS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Static Drain to Source on State Resistance
vs. Temperature
100
25
Pulse Test
ID = −45 A
20
15
10
VGS = −4.5 V
VGS = −4.5 V
10
−10 V
5
0
−10 V
Pulse Test
1
−100
−1000
−50 −25
0
25 50 75 100 125 150
−10
−1
Drain Current ID (A)
Case Temperature Tc (°C)
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 3 of 6
RJJ0601JPE
Typical Capacitance vs.
Drain to Source Voltage
Dynamic Input Characteristics
0
–4
0
100000
10000
VGS = 0
f = 1 MHz
VDD = –5 V
–10 V
–25 V
–10
–20
–30
–40
Ciss
–8
VDD = –25 V
–10 V
–5 V
VGS
1000
VDS
Coss
–12
Crss
ID = –90 A
–16
100
0
50
100
150
200
−0
−10
−20
−30
−40
−50
Gate Charge Qg (nC)
Drain to Source Voltage VDS (V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Reverse Drain Current vs.
Source to Drain Voltage
–100
250
200
150
100
Pulse Test
L = 100 µH
VDD = –25 V
duty < 0.1 %
Rg ≥ 50 Ω
–10 V
–50
VGS = 0 V
50
0
0
–0.4
–0.8
–1.2
–1.6
–2.0
25
50
75
100 125 150
Source to Drain Voltage VSD (V)
Channel Temperature Tch (°C)
Avalanche Test Circuit
Avalanche Waveform
L
VDSS
1
VDS
Monitor
2
EAR
=
L • IAP
•
VDSS – VDD
2
IAP
Monitor
V(BR)DSS
Rg
VDD
D. U. T
IAP
VDS
Vin
–15 V
50 Ω
ID
VDD
0
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 4 of 6
RJJ0601JPE
Normalized Transient Thermal Impedance vs. Pulse Width
10
1
D = 1
0.1
θch - c(t) = γs (t) x θch - c
θch - c = 1.39°C/W, Tc = 25°C
PW
T
0.01
0.001
P
DM
D =
PW
T
0.1
1
10
100
1000
0.01
Pulse Width PW (mS)
Switching Time Test Circuit
Switching Time Waveform
10%
Vout
Monitor
Vin
Vin Monitor
D.U.T.
Rg
RL
90%
90%
VDD
= –30 V
Vin
–10 V
90%
10%
10%
Vout
t
t
t
f
d(off)
d(on)
t
r
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 5 of 6
RJJ0601JPE
Package Dimensions
Package Name
LDPAK(S)-(1)
JEITA Package Code
SC-83
RENESAS Code
PRSS0004AE-B
Previous Code
MASS[Typ.]
1.30g
Unit: mm
LDPAK(S)-(1) / LDPAK(S)-(1)V
4.44 0.2
7.8
6.6
10.2 0.3
1.3 0.15
2.49 0.2
+ 0.2
0.1
– 0.1
2.2
1.37 0.2
0.4 0.1
+ 0.2
– 0.1
1.3 0.2
0.86
2.54 0.5
2.54 0.5
Ordering Information
Part No.
Quantity
Shipping Container
RJJ0601JPE-00-Q3
RJJ0601JPE-00-J3
1000 pcs
1000 pcs
Taping (Dextrorse)
Taping (Sinistrorse)
REJ03G1603-0100 Rev.1.00 Nov 21, 2007
Page 6 of 6
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