RJK0451DPB_13 [RENESAS]

40V, 35A, 7.0m max. Silicon N Channel Power MOS FET Power Switching; 40V ，35A ， 7.0米最大值。硅N通道功率MOS FET电源开关


型号：	RJK0451DPB_13
厂家：	RENESAS TECHNOLOGY CORP
描述：	40V, 35A, 7.0m max. Silicon N Channel Power MOS FET Power Switching 40V ，35A ， 7.0米最大值。硅N通道功率MOS FET电源开关开关电源开关
文件：	总7页 (文件大小：108K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Preliminary Datasheet

RJK0451DPB

40V, 35A, 7.0m max.

Silicon N Channel Power MOS FET

Power Switching

R07DS0073EJ0200

Rev.2.00

Apr 09, 2013

Features



High speed switching

Capable of 4.5 V gate drive

Low drive current



Low on-resistance

_DS(on)= 5.5 m typ. (at V_GS= 10 V)

Pb-free



High density mounting

Halogen-free

Outline

RENESAS Package code: PTZZ0005DA-A

(Package name: LFPAK)

1, 2, 3 Source

Gate

Drain

S S S

2 3

Application



Switching Mode Power Supply

Absolute Maximum Ratings

(Ta = 25°C)

Item

Drain to source voltage

Gate to source voltage

Drain current

Symbol

V_DSS

V_GSS

I_D

Ratings

Unit

20

Note1

Drain peak current

I_D(pulse)

140

Body-drain diode reverse drain current

Avalanche current

I_DR

Note 2

I_AP

17.5

24.5

Note 2

Avalanche energy

E_AS

Channel dissipation

Pch ^Note3

ch-C

Tch

Channel to Case Thermal Resistance

Channel temperature

2.78

150

C/W

C

Storage temperature

Tstg

–55 to +150

Notes: 1. PW  10 s, duty cycle  1%

2. Value at Tch = 25C, Rg  50 

3. Tc = 25C

This product is for the low voltage drive ( 10V).

If the driving voltage is over 10 V under normal conditions, please use the product for high gate to source cutoff voltage

(V_GS(off)) which characteristics has been improved.

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 1 of 6

RJK0451DPB

Preliminary

Electrical Characteristics

(Ta = 25°C)

Item

Symbol

V_(BR)DSS

I_GSS

Min

—

1.2

—

Typ

—

Max

—

Unit

Test Conditions

Drain to source breakdown voltage

Gate to source leak current

Zero gate voltage drain current

Gate to source cutoff voltage

I_D= 10 mA, V_GS= 0 V

—

0.1

A

V_GS= 20 V, V_DS= 0 V

V_DS= 40 V, V_GS= 0 V

I_DSS

—

V_GS(off)

R_DS(on)

|y_fs|

—

2.5

7.0

9.6

—

V_DS= 10 V, I_D= 1 mA

Static drain to source on state

resistance

5.5

7.0

m

I_D= 17.5 A, V_GS= 10 V ^Note4

I_D= 17.5 A, V_GS= 4.5 V ^Note4

I_D= 17.5 A, V_DS= 10 V ^Note4

Forward transfer admittance

Input capacitance

Ciss

Coss

Crss

2010

330

140

0.7

—



V_DS= 10 V, V_GS= 0 V,

f = 1 MHz

Output capacitance

Reverse transfer capacitance

Gate Resistance

—

Total gate charge

—

V_DD= 10 V, V_GS= 4.5 V,

I_D= 35 A

Gate to source charge

Gate to drain charge

Turn-on delay time

Rise time

Qgs

Qgd

t_d(on)

t_r

7.0

3.0

—

V_GS= 10 V, I_D= 17.5 A,

V_DD 10 V, R_L= 0.57 ,

Rg = 4.7 

4.8

—

Turn-off delay time

Fall time

t_d(off)

t_f

—

6.0

0.83

—

Body–drain diode forward voltage

V_DF

1.1

—

I_F= 35 A, V_GS= 0 V ^Note4

Body–drain diode reverse recovery

time

t_rr

I_F= 35 A, V_GS= 0 V

di_F/ dt = 100 A/ s

Notes: 4. Pulse test

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 2 of 6

RJK0451DPB

Preliminary

Main Characteristics

Power vs. Temperature Derating

Maximum Safe Operation Area

1000

100

10 μs

PW = 10 ms

Operation in

this area is

limited by R_DS(on)

Tc = 25°C

1 shot Pulse

0.1

100

150

200

Drain to Source Voltage V_DS(V)

Case Temperature Tc (°C)

Typical Output Characteristics

3.2 V

Typical Transfer Characteristics

V_DS= 10 V

Pulse Test

3.0 V

4.5 V

10 V

2.8 V

_GS= 2.6 V

25°C

Tc = 75°C

–25°C

Pulse Test

Gate to Source Voltage V_GS(V)

Drain to Source Voltage V_DS(V)

Drain to Source Saturation Voltage vs.

Gate to Source Voltage

Static Drain to Source on State Resistance

vs. Drain Current

100

250

Pulse Test

200

150

V_GS= 4.5 V

10 V

I_D= 20 A

100

10 A

5 A

0.1

100

1000

Gate to Source Voltage V_GS(V)

Drain Current I_D(A)

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 3 of 6

RJK0451DPB

Preliminary

Static Drain to Source on State Resistance

vs. Temperature

Typical Capacitance vs.

Drain to Source Voltage

10000

1000

Pulse Test

_D= 17.5 A

Ciss

V_GS= 4.5 V

Coss

Crss

100

10 V

V_GS= 0 V

f = 1 MHz

–25

25 50 75 100 125 150

Case Temperature Tc (°C)

Drain to Source Voltage V_DS(V)

Reverse Drain Current vs.

Source to Drain Voltage

Dynamic Input Characteristics

I_D= 35 A

Pulse Test

10 V

V_GS

5 V

V_DD= 25 V

10 V

V_DS

V_GS= 0 V

V_DD= 25 V

10 V

0.4

0.8

1.2

1.6

2.0

Gate Charge Qg (nC)

Source to Drain Voltage V_SD(V)

Maximum Avalanche Energy vs.

Channel Temperature Derating

I_AP= 17.5 A

V_DD= 15 V

duty < 0.1 %

Rg ≥ 50 Ω

100

125

150

Channel Temperature Tch (°C)

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 4 of 6

RJK0451DPB

Preliminary

Normalized Transient Thermal Impedance vs. Pulse Width

Tc = 25°C

D = 1

0.5

0.3

0.1

θch – c (t) = γ s (t) • θch – c

θch – c = 2.78°C/W, Tc = 25°C

D =

P_DM

0.03

0.01

10 μ

100 μ

1 m

10 m

100 m

Pulse Width PW (s)

Avalanche Test Circuit

Avalanche Waveform

V_DSS

E_AS

L • I_AP

•

V_DSS– V_DD

V_DS

Monitor

I_AP

Monitor

V_(BR)DSS

I_AP

V_DS

V_DD

D. U. T

I_D

Vin

15 V

50 Ω

V_DD

Switching Time Test Circuit

Switching Time Waveform

90%

Vout

Monitor

Vin Monitor

D.U.T.

10%

Vin

R_L

Vout

10%

V_DS

= 10 V

Vin

10 V

90%

d(off)

d(on)

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 5 of 6

RJK0451DPB

Preliminary

Package Dimensions

Package Name

LFPAK

JEITA Package Code

SC-100

RENESAS Code

PTZZ0005DA-A

Previous Code

LFPAKV

MASS[Typ.]

0.080g

Unit: mm

4.9

5.3 Max

0.25⁺^–0⁰^.^.⁰⁰³⁵

3.3

4.0 0.2

0.20 ⁺^–0⁰^.^.⁰⁰³⁵

0° – 8°

0.75 Max

0.10

1.27

0.40 0.06

0.25

(Ni/Pd/Au plating)

Ordering Information

Part No.

Quantity

Shipping Container

RJK0451DPB-00-J5

2500 pcs

Taping

R07DS0073EJ0200 Rev.2.00

Apr 09, 2013

Page 6 of 6

Notice

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Colophon 2.2

RJK0451DPB_13 [RENESAS]

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