RT2859B_技术文档

Reference

Design

Tools

Sample &

Buy

®

RT2859A/B

3A, 18V, 650kHz, ACOT^TMSynchronous Step-Down Converter

General Description

The RT2859A/B are high-performance 650kHz 3A step-

down regulators with internal power switches and

synchronous rectifiers. They feature quick transient

response using their Advanced Constant On-Time

(ACOT^TM) control architecture that provides stable

operation with small ceramic output capacitors and without

complicated external compensation, among other benefits.

The input voltage range is from 4.5V to 18V and the output

is adjustable from 0.765V to 7V.

to avoid low-frequency interference while the RT2859A

features a power-saving discontinuous operating mode at

light loads.

Features

^Fast Transient Response

^Steady 650kHz Switching Frequency at all Load

Current (RT2859B)

^Discontinuous Operating Mode at Light Load

(RT2859A)

The proprietaryACOT^TMcontrol improves upon other fast-

response constant on-time architectures, achieving nearly

constant switching frequency over line, load, and output

voltage ranges. Since there is no internal clock, response

to transients is nearly instantaneous and inductor current

can ramp quickly to maintain output regulation without

large bulk output capacitance. The RT2859A/B are stable

with and optimized for ceramic output capacitors.

^3A Output Current

^Advanced Constant On-Time (ACOT^TM) Control

 Optimized for Ceramic Output Capacitors

 4.5V to 18V Input Voltage Range

 Internal 70mΩ Switch and 70mΩ Synchronous

Rectifier

 0.765V to 7V Adjustable Output Voltage

 Externally-Adjustable, Pre-Biased Compatible Soft-

Start

With internal 70mΩ switches and 70mΩ synchronous

rectifiers, the RT2859A/B display excellent efficiency and

good behavior across a range of applications, especially

for low output voltages and low duty cycles. Cycle-by-

cycle current limit, input under-voltage lockout, externally-

adjustable soft-start, output under- and over-voltage

protection, and thermal shutdown provide safe and smooth

operation in all operating conditions.

 Cycle-by-Cycle Current Limit

 Optional Output Discharge Function

 Output Over- and Under-voltage Shut Down

 Latched (RT2859ALGQW/RT2859BLGQW Only)

 With Hiccup Mode (RT2859AHGQW/RT2859BHGQW

Only)

 Input Under-Voltage Lockout

 Thermal Shutdown

The RT2859A and RT2859B are each available in

the WQFN-16L 3x3 package, with exposed thermal pads.

The RT2859B switches continuously even at light loads

 RoHS Compliant and Halogen Free

Simplified Application Circuit

RT2859A/B

V

VIN

V

IN

SW

OUT

VCC

BOOT

VS

Power Good

VREG5

PGOOD

FB

Input Signal

EN

SS

VREG5

GND PGND

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

1

RT2859A/B

Applications

 Industrial and Commercial Low Power Systems

Ordering Information

RT2859A/B

 Computer Peripherals

Package Type

QW : WQFN-16L 3x3 (W-Type)

 LCDMonitors and TVs

 Green Electronics/Appliances

 Point of Load Regulation for High-Performance DSPs,

FPGAs, and ASICs

Lead Plating System

G : Green (Halogen Free and Pb Free)

H : Hiccup Mode OVP & UVP

L : Latched OVP & UVP

A : PSM

B : PWM

Marking Information

RT2859AHGQW

Note :

48= : Product Code

Richtek products are :

YMDNN : Date Code

48=YM

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

DNN

 Suitable for use in SnPb or Pb-free soldering processes.

RT2859ALGQW

45= : Product Code

Pin Configuration

YMDNN : Date Code

45=YM

(TOP VIEW)

DNN

16 15 14 13

1

2

3

4

12

11

10

9

FB

VREG5

SS

BOOT

SW

RT2859BHGQW

GND

3Z= : Product Code

SW

17

YMDNN : Date Code

3Z=YM

GND

SW

5

6

7

8

DNN

RT2859BLGQW

WQFN-16L 3x3

3Y= : Product Code

YMDNN : Date Code

3Y=YM

DNN

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

2

DS2859A/B-05 May 2019

RT2859A/B

Functional Pin Description

Pin No.

Pin Name

Pin Function

Feedback voltage input. Connect FB to the midpoint of the external feedback

resistive divider to sense the output voltage. Place the resistive divider within

5mm from the FB pin. The IC regulates V_FBat 0.765V (typical).

1

FB

Internal regulator output. Connect a 1F capacitor to GND to stabilize output

voltage.

2

VREG5

Soft-start control. Connect an external capacitor between this pin and GND to

set the soft-start time.

3

4

5

SS

GND

PGOOD

Ground.

Open-drain power-good output. PGOOD connects to PGND whenever VFB

is less than 90% of its regulation threshold (typical).

Enable control input. A logic-high enables the converter; a logic-low forces

the IC into shutdown mode reducing the supply current to less than 10A.

6

EN

Power ground. PGND connects to the Source of the internal N-channel

MOSFET synchronous rectifier and to other power ground nodes of the IC.

The exposed pad and the 2 PGND pins should be well soldered to the input

and output capacitors and to a large PCB area for good power dissipation.

7, 8,

PGND

17 (Exposed pad)

Switch node. SW is the Source of the internal N-channel MOSFET switch

and the Drain of the internal N-channel MOSFET synchronous rectifier.

Connect SW to the inductor with a wide short PCB trace and minimize its

area to reduce EMI.

9, 10, 11

SW

Bootstrap supply for high-side gate driver. Connect a 0.1F capacitor

between BOOT and SW to power the internal gate driver.

12

BOOT

VIN

Power input. The input voltage range is from 4.5V to 18V. Must bypass with a

suitably large (10F x 2) ceramic capacitors at this pin.

13, 14

Internal linear regulator supply input. VCC supplies power for the internal

linear regulator that powers the IC. Connect VIN to the input voltage and

bypass to ground with a 0.1F ceramic capacitor.

15

16

VCC

VS

Output voltage sense input.

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

3

RT2859A/B

Functional Block Diagram

VCC VREG5

BOOT

POR &

Reg

EN

Min.

VREG5

Off-Time

VIN

VBIAS

OC

V

REF

Control

Driver

ZC

SW

UV & OV

PGND

SW

V

REG5

Ripple

Gen.

GND

2µA

+

-

Comparator

-

PGOOD

SS

FB

V

IN

+

Comparator

0.9 x V

REF

FB

VS

On-Time

Detailed Description

duty cycle applications.After the on-time one-shot period,

there is a minimum off-time period before any further

regulation decisions can be considered. This arrangement

avoids the need to make any decisions during the noisy

time periods just after switching events, when the

switching node (SW) rises or falls. Because there is no

fixed clock, the high-side switch can turn on almost

immediately after load transients and further switching

pulses can ramp the inductor current higher to meet load

requirements with minimal delays.

The RT2859A/B are high-performance 650kHz 3A step-

down regulators with internal power switches and

synchronous rectifiers. They feature anAdvanced Constant

On-Time (ACOT^TM) control architecture that provides

stable operation with ceramic output capacitors without

complicated external compensation, among other benefits.

The input voltage range is from 4.5V to 18V and the output

is adjustable from 0.765V to 7V.

The proprietary ACOT^TMcontrol scheme improves upon

other constant on-time architectures, achieving nearly

constant switching frequency over line, load, and output

voltage ranges. The RT2859A/B are optimized for ceramic

output capacitors. Since there is no internal clock,

response to transients is nearly instantaneous and inductor

current can ramp quickly to maintain output regulation

without large bulk output capacitance.

Traditional current mode or voltage mode control schemes

typically must monitor the feedback voltage, current

signals (also for current limit), and internal ramps and

compensation signals, to determine when to turn off the

high-side switch and turn on the synchronous rectifier.

Weighing these small signals in a switching environment

is difficult to do just after switching large currents, making

those architectures problematic at low duty cycles and in

less than ideal board layouts.

Constant On-Time (COT) Control

The heart of any COT architecture is the on-time one-

shot. Each on-time is a pre-determined “fixed” period

that is triggered by a feedback comparator. This robust

arrangement has high noise immunity and is ideal for low

Because no switching decisions are made during noisy

time periods, COT architectures are preferable in low duty

cycle and noisy applications. However, traditional COT

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

4

DS2859A/B-05 May 2019

RT2859A/B

control schemes suffer from some disadvantages that

preclude their use in many cases. Many applications require

a known switching frequency range to avoid interference

with other sensitive circuitry. True constant on-time control,

where the on-time is actually fixed, exhibits variable

switching frequency. In a step-down converter, the duty

factor is proportional to the output voltage and inversely

proportional to the input voltage. Therefore, if the on-time

is fixed, the off-time (and therefore the frequency) must

change in response to changes in input or output voltage.

rise to the input voltage. This increases the effective on-

time and causes the switching frequency to drop

noticeably.

One way to reduce these effects is to measure the actual

switching frequency and compare it to the desired range.

This has the added benefit eliminating the need to sense

the actual output voltage, potentially saving one pin

connection. ACOT^TMuses this method, measuring the

actual switching frequency (at SW) and modifying the on-

time with a feedback loop to keep the average switching

frequency in the desired range.

Modern pseudo-fixed frequency COT architectures greatly

improve COT by making the one-shot on-time proportional

to V_OUTand inversely proportional to V_IN. In this way, an

on-time is chosen as approximately what it would be for

an ideal fixed-frequency PWM in similar input/output

voltage conditions. The result is a big improvement but

the switching frequency still varies considerably over line

and load due to losses in the switches and inductor and

other parasitic effects.

To achieve good stability with low-ESR ceramic capacitors,

ACOT^TMuses a virtual inductor current ramp generated

inside the IC. This internal ramp signal replaces the ESR

ramp normally provided by the output capacitor's ESR.

The ramp signal and other internal compensations are

optimized for low-ESR ceramic output capacitors.

ACOT^TMOne-Shot Operation

The RT2859A/B control algorithm is simple to understand.

The feedback voltage, with the virtual inductor current ramp

added, is compared to the reference voltage. When the

combined signal is less than the reference the on-time

one-shot is triggered, as long as the minimum off-time

one-shot is clear and the measured inductor current

(through the synchronous rectifier) is below the current

limit. The on-time one-shot turns on the high-side switch

and the inductor current ramps up linearly. After the on-

time, the high-side switch is turned off and the synchronous

rectifier is turned on and the inductor current ramps down

linearly. At the same time, the minimum off-time one-shot

is triggered to prevent another immediate on-time during

the noisy switching time and allow the feedback voltage

and current sense signals to settle. The minimum off-time

is kept short (260ns typical) so that rapidly-repeated on-

times can raise the inductor current quickly when needed.

Another problem with many COT architectures is their

dependence on adequate ESR in the output capacitor,

making it difficult to use highly-desirable, small, low-cost,

but low-ESR ceramic capacitors. Most COT architectures

use AC current information from the output capacitor,

generated by the inductor current passing through the

ESR, to function in a way like a current mode control

system. With ceramic capacitors, the inductor current

information is too small to keep the control loop stable,

like a current mode system with no current information.

ACOT^TMControl Architecture

Making the on-time proportional to V_OUTand inversely

proportional to V_INis not sufficient to achieve good

constant-frequency behavior for several reasons. First,

voltage drops across the MOSFET switches and inductor

cause the effective input voltage to be less than the

measured input voltage and the effective output voltage to

be greater than the measured output voltage. As the load

changes, the switch voltage drops change causing a

switching frequency variation with load current. Also, at

light loads if the inductor current goes negative, the switch

dead-time between the synchronous rectifier turn-off and

the high-side switch turn-on allows the switching node to

Discontinuous Operating Mode (RT2859A Only)

After soft-start, the RT2859B operates in fixed frequency

mode to minimize interference and noise problems. The

RT2859A uses variable-frequency discontinuous switching

at light loads to improve efficiency. During discontinuous

switching, the on-time is immediately increased to add

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

5

RT2859A/B

“hysteresis” to discourage the IC from switching back to

continuous switching unless the load increases

substantially.

Hiccup Mode

The RT2859AHGQW/ RT2859BHGQW, use hiccup mode

OVP and UVP. When the protection function is triggered,

the IC will shut down for a period of time and then attempt

to recover automatically. Hiccup mode allows the circuit

to operate safely with low input current and power

dissipation, and then resume normal operation as soon

as the overload or short circuit is removed. During hiccup

mode, the shutdown time is determined by the capacitor

at SS. A 0.5μA current source discharges V_SSfrom its

starting voltage (normally VREG5). The IC remains shut

down until V_SSreaches 0.2V, about 38ms for a 3.9nF

capacitor. At that point the IC begins to charge the SS

capacitor at 2μA, and a normal start-up occurs. If the fault

remains, OVP and UVP protection will be enabled when

V_SSreaches 2.2V (typical). The IC will then shut down

and discharge the SS capacitor from the 2.2V level, taking

about 16ms for a 3.9nF SS capacitor.

The IC returns to continuous switching as soon as an on-

time is generated before the inductor current reaches zero.

The on-time is reduced back to the length needed for

650kHz switching and encouraging the circuit to remain

in continuous conduction, preventing repetitive mode

transitions between continuous switching and

discontinuous switching.

Current Limit

The RT2859A/B current limit is a cycle-by-cycle “valley”

type, measuring the inductor current through the

synchronous rectifier during the off-time while the inductor

current ramps down. The current is determined by

measuring the voltage between Source and Drain of the

synchronous rectifier, adding temperature compensation

for greater accuracy. If the current exceeds the upper

current limit, the on-time one-shot is inhibited until the

inductor current ramps down below the upper current limit

plus a wide hysteresis band of about 1A until it drops

below the lower current limit level. Thus, only when the

inductor current is well below the upper current limit is

another on-time permitted. This arrangement prevents the

average output current from greatly exceeding the

guaranteed upper current limit value, as typically occurs

with other valley-type current limits. If the output current

exceeds the available inductor current (controlled by the

current limit mechanism), the output voltage will drop. If it

drops below the output under-voltage protection level (see

next section) the IC will stop switching to avoid excessive

heat.

Latch-Off Mode

The RT2859ALGQW/ RT2859BLGQW, uses latch-off

mode OVP and UVP. When the protection function is

triggered, the IC will shut down. The IC stops switching,

leaving both switches open, and is latched off. To restart

operation, toggle ENor power the IC off and then on again.

Input Under-Voltage Lockout

In addition to the enable function, the RT2859A/B feature

an under-voltage lockout (UVLO) function that monitors

the internal linear regulator output (VREG5). To prevent

operation without fully-enhanced internal MOSFET

switches, this function inhibits switching when VREG5

drops below the UVLO-falling threshold. The IC resumes

switching when VREG5 exceeds the UVLO-rising

threshold.

The RT2859B also includes a negative current limit to

protect the IC against sinking excessive current and

possibly damaging the IC. If the voltage across the

synchronous rectifier indicates the negative current is too

high, the synchronous rectifier turns off until after the next

high-side on-time. The RT2859A does not sink current

and therefore does not need a negative current limit.

Shut-Down, Start-Up and Enable (EN)

The enable input (EN) has a logic-low level of 0.4V. When

V_ENis below this level the IC enters shutdown mode and

supply current drops to less than 10μA. When V_ENexceeds

its logic-high level of 2V the IC is fully operational.

ENis a high voltage input that can be safely connected to

VIN (up to 18V) for automatic start-up.

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

6

DS2859A/B-05 May 2019

RT2859A/B

Soft-Start (SS)

External Bootstrap Capacitor

The RT2859A/B soft-start uses an external pin (SS) to

clamp the output voltage and allow it to slowly rise. After

V_ENis high and VREG5 exceeds its UVLO threshold, the

IC begins to source 2μA from the SS pin. An external

capacitor at SS is used to adjust the soft-start timing.

The available capacitance range is from 2.7nF to 220nF.

Do not leave SS unconnected.

Connect a 0.1μF low ESR ceramic capacitor between

BOOT and SW. This bootstrap capacitor provides the gate

driver supply voltage for the high sideN-channel MOSFET

switch.

Over-Temperature Protection

The RT2859A/B includes an over-temperature protection

(OTP) circuitry to prevent overheating due to excessive

power dissipation. The OTP will shut down switching

operation when the junction temperature exceeds 150°C.

Once the junction temperature cools down by

approximately 20°C the IC will resume normal operation

with a complete soft-start. For continuous operation,

provide adequate cooling so that the junction temperature

does not exceed 150°C.

During start-up, while the SS capacitor charges, the

RT2859A/B operates in discontinuous mode with very

small pulses. This prevents negative inductor currents and

keeps the circuit from sinking current. Therefore, the

output voltage may be pre-biased to some positive level

before start-up. Once the V_SSramp charges enough to

raise the internal reference above the feedback voltage,

switching will begin and the output voltage will smoothly

rise from the pre-biased level to its regulated level. After

Output Discharge Control

V

_SSrises above about 2.2V output over-and under-voltage

When EN pin is low, the RT2859A/B will discharge the

output with an internal 50Ω MOSFET connected between

VOUT toGND pin.

protections are enabled and the RT2859B begins

continuous-switching operation.

An internal linear regulator (VREG5) produces a 5.1V

supply from VIN that powers the internal gate drivers, PWM

logic, reference, analog circuitry, and other blocks. If VIN

is 6V or greater, VREG5 is guaranteed to provide significant

power for external loads.

OVP/UVP Protection

The RT2859A/B detects over- and under-voltage conditions

by monitoring the feedback voltage on FB pin. The two

functions are enabled after approximately 1.7 times the

soft-start time. When the feedback voltage becomes

higher than 120% of the target voltage, the OVP

comparator will go high to turn off both internal high-side

and low-side MOSFETs for hiccup version, and the latched

version is turn off the high-side MOSFET but turn on the

low-side MOSFET to sink the over-voltage source current

on output terminal to avoid the damage risk of connected

device, the current limit function will shutdown after the

the OVP function is triggered, it derestrict the maximum

sinking current value from output terminal through the low-

side MOSFET. When the feedback voltage is lower than

70% of the target voltage for 250μs, the UVP comparator

will go high to turn off both internal high-side and low-side

MOSFETs.

PGOOD Comparator

The PGOOD pin is an open-drain power-good indication

which is connected to PVCC through a pull-up resistor.

After PVCC raises up, the PGOOD is actively held low

and only allowed to transition high after soft-start is over.

If V_FBrises above a power-good threshold V_{TH_PGH}

(typically 90% of the target value), the PGOOD pin will be

in high impedance and V_PGOODwill be held high. When

V_FBdrops under a V_FBfalling threshold V_{TH_PGL}(typically

85% of the target value) or exceeds OVP threshold V_OVP

(typically 120% of the target value), the PGOOD pin will

be pulled low.

Once being started-up, if any protection is triggered (UVP,

OVP and OTP) or EN is from high to low, PGOOD will be

pulled toGND.

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

7

RT2859A/B

Absolute Maximum Ratings (Note 1)

 Supply Voltage, VIN, VCC ---------------------------------------------------------------------------------------- −0.3V to 20V

 Switch Voltage, SW ------------------------------------------------------------------------------------------------ −0.3V to (V_IN+ 0.3V)

< 10ns ----------------------------------------------------------------------------------------------------------------- −5V to 25V

 BOOT to SW --------------------------------------------------------------------------------------------------------- −0.3V to 6V

 VREG5 to VIN or VCC --------------------------------------------------------------------------------------------- −17V to 0.3V

 EN, VS Pin ----------------------------------------------------------------------------------------------------------- −0.3V to 20V

 Other Pins------------------------------------------------------------------------------------------------------------- −0.3V to 6V

 Power Dissipation, P_D@ T_A= 25°C

WQFN-16L 3x3 ------------------------------------------------------------------------------------------------------ 2.1W

 Package Thermal Resistance (Note 2)

WQFN-16L 3x3, θ_JA------------------------------------------------------------------------------------------------- 47.4°C/W

WQFN-16L 3x3, θ_JC------------------------------------------------------------------------------------------------ 7.5°C/W

 Junction Temperature Range-------------------------------------------------------------------------------------- 150°C

 Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------- 260°C

 Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C

Recommended Operating Conditions (Note 3)

 Supply Voltage, VIN ------------------------------------------------------------------------------------------------ 4.5V to 18V

 Junction Temperature Range-------------------------------------------------------------------------------------- −40°C to 125°C

 Ambient Temperature Range-------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics

(V_IN= 12V, T_A= −40°C to 85°C, unless otherwise specified)

Parameter

Supply Current

Symbol

Test Conditions

Min

Typ

Max Unit

Shutdown Current

Quiescent Current

Logic Threshold

I_SHDN

I_Q

T_A= 25C, V_EN= 0V

--

1

10

A

T_A= 25C, V_EN= 5V, V_FB= 0.8V

1.3

mA

Logic-High

Logic-Low

2

--

18

EN Input Voltage

V

--

0.4

V_FBVoltage and Discharge Resistance

T_A= 25C

0.757 0.765 0.773

Feedback Threshold Voltage

V_FB

T_A= 40C to 85C

V_FB= 0.8V, T_A= 25C

V_EN= 0V, V_S= 0.5V

0.755

--

0.775

0.1

Feedback Input Current

VOUT Discharge Resistance

V_REG5Output

I_FB

--

0.01

50

A

R_DIS

100



T_A= 25C, 6V  V_IN 18V,

0 < I_VREG5 5mA

V_REG5Output Voltage

V_REG5

4.8

5.1

5.4

V

Line Regulation

Load Regulation

Output Current

6V  V_IN 18V, I_VREG5= 5mA

0  I_VREG5 5mA

--

20

100

--

mV

mA

I_VREG5

V_IN= 6V, V_REG5= 4V, T_A= 25C

70

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

8

DS2859A/B-05 May 2019

RT2859A/B

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

m

A

R_DS(ON)

R_{DS(ON)_H}

R_{DS(ON)_L}

High-Side

Low-Side

T_A= 25C (V_BOOT V_SW) = 5.5V

T_A= 25C

--

70

--

Switch On

Resistance

Current Limit

I_LIM

4

5

6

Thermal Shutdown

Thermal Shutdown Threshold T_SD

Thermal Shutdown Hysteresis T_SD

On-Time Timer Control

Shutdown temperature

--

150

20

--

C

On-Time

t_ON

V_IN= 12V, V_OUT= 1.05V

--

135

260

--

ns

Minimum Off-Time

Soft-Start

t_OFF(MIN)

V_FB= 0.7V, T_A= 25C

310

SS Charge Current

V_SS= 0V

1.4

0.1

--

2

2.6

--

A

mA

A

V_SS= 0.5V (Latch Mode)

V_SS= 0.5V (Hiccup Mode)

0.2

0.5

SS Discharge Current

--

UVLO

UVLO Threshold

Hysteresis

Wake up V_REG5

3.6

3.85

0.35

4.1

V

0.13

0.47

Power Good

85

--

90

85

5

95

--

V_FBrising

%

PGOOD Threshold

V_FBfalling

PGOOD Sink Current

2.5

--

mA

PGOOD = 0.5V

Output Under Voltage and Over Voltage Protection

114

--

120

5

126

--

%

OVP Trip Threshold

OVP Prop Delay

UVP Trip Threshold

UVP Hysteresis

OVP detect

s

65

--

70

75

--

%

10

250

--

UVP Prop Delay

s

t_SS

x 1.7

--

ms

UVP Enable Delay

t_UVPEN

Relative to soft-start time

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those

indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions may affect device reliability.

Note 2. θ_JAis measured at T_A= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θ_JCis

measured at the exposed pad of the package.

Note 3. The device is not guaranteed to function outside its operating conditions.

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

9

RT2859A/B

Typical Application Circuit

L1

RT2859A/B

1.4µH

9, 10, 11

V

OUT

13, 14

SW

VIN

V

IN

1.05V/3A

C6

0.1µF

C1

10µF x 2

C2

0.1µF

C

OUT

15

12

16

1

VCC

BOOT

VS

22µF x 2

R1

8.25k

C

FF

Output Signal

R3 100k

5

6

PGOOD

EN

VREG5

FB

Input Signal

R2

22.1k

2

VREG5

V

REG5

C4

1µF

3

SS

C5

GND PGND

3.3nF

4

7, 8, 17 (Exposed Pad)

Table 1. Suggested Component Values (V_IN= 12V)

V_OUT(V)

R1 (k)

R2 (k)

22.1

C_FF(pF)

--

L1 (H)

1.4

2

C_OUT(F)

22 to 68

1

1.05

1.2

1.8

2.5

3.3

5

6.81

8.25

12.7

30.1

49.9

73.2

124

--

5 to 22

2

3.3

7

180

Note :

Considering the effective capacitance de-rated with biased voltage level and size, the effective capacitance of C_OUT

should be above 22μF at targeted output level for stable and normal operation.

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

10

DS2859A/B-05 May 2019

RT2859A/B

Typical Operating Characteristics

Efficiency vs. Output Current

100

90

80

70

60

50

40

30

20

10

0

RT2859A

RT2859B

V_OUT= 5V

90

V_OUT= 5V

80

70

60

50

40

30

20

10

0

V_OUT= 1.05V

V_IN= 12V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Output Current (A)

Output Voltage vs. Output Current

1.10

1.09

1.08

1.07

1.06

1.05

1.04

1.03

1.02

1.01

1.00

1.10

1.09

1.08

1.07

1.06

1.05

1.04

1.03

1.02

1.01

1.00

RT2859A

RT2859B

V_IN= 12V, V_OUT= 1.05V, I_OUT= 0A to 3A

0.5 1.0 1.5 2.0 2.5 3.0

V_IN= 12V, V_OUT= 1.05V, I_OUT= 0A to 3A

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

Output Current (A)

Switching Frequency vs. Output Current

800

700

600

500

400

300

200

100

0

800

700

600

500

400

300

200

100

0

RT2859A

RT2859B

V_IN= 12V, V_OUT= 1.05V, I_OUT= 0A to 3A

0

0.5

1

1.5

2

2.5

3

0

0.5

1

1.5

2

2.5

3

Output Current (A)

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

11

RT2859A/B

Feedback Voltage vs. Input Voltage

Feedback Voltage vs. Temperature

0.780

0.775

0.770

0.765

0.760

0.755

0.750

0.745

0.740

0.80

0.79

0.78

0.77

0.76

0.75

0.74

0.73

0.72

0.71

0.70

V_IN= 12V, V_OUT= 0.765V, I_OUT= 0.6A

4

6

8

10

12

14

16

18

-50

-25

0

25

50

75

100

125

Input Voltage (V)

Temperature (°C)

Shutdown Current vs. Temperature

Quiescent Current vs. Temperature

30

25

20

15

10

5

1000

950

900

850

800

750

700

650

600

V_IN= 12V, V_OUT= 1.05V, I_OUT= 0A

0

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

Current Limit vs. Input Voltage

Output Ripple Voltage

7.0

6.5

6.0

5.5

5.0

4.5

4.0

3.5

3.0

V_IN= 12V, V_OUT= 1.05V

V_IN= 12V, V_OUT= 1.05V, I_OUT= 3A

V_OUT

(10mV/Div)

Upper Threshold

Lower Threshold

V_SW

(5V/Div)

4

6

8

10

12

14

16

18

Time (500ns/Div)

Input Voltage (V)

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

12

DS2859A/B-05 May 2019

RT2859A/B

Load Transient Response

RT2859A

RT2859B

V_OUT

(50mV/Div)

I_OUT

(1A/Div)

V_IN= 12V, V_OUT= 1.05V, I_OUT= 0A to 3A

Time (100μs/Div)

Power On from VIN

Power Off from VIN

V_IN

(20V/Div)

V_OUT

(1V/Div)

V_SW

(10V/Div)

I_OUT

(2A/Div)

I_OUT

(2A/Div)

V_IN= 12V, V_OUT= 1.05V, I_OUT= 3A

Time (4ms/Div)

V_IN= 12V, V_OUT= 1.05V, I_OUT= 3A

Time (4ms/Div)

Power On from EN

Power Off from EN

V_EN

(10V/Div)

V_OUT

(1V/Div)

V_SW

(10V/Div)

I_OUT

(2A/Div)

I_OUT

(2A/Div)

V_IN= 12V, V_OUT= 1.05V, I_OUT= 3A

Time (4ms/Div)

V_IN= 12V, V_OUT= 1.05V, I_OUT= 3A

Time (100μs/Div)

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

13

RT2859A/B

Applications Information

R

100k

Soft-Start (SS)

EN

V

EN

RT2859A/B

GND

IN

The RT2859A/B soft-start uses an external capacitor at

SS to adjust the soft-start timing according to the following

equation :

Q1

Enable

C_SS(nF)0.765V

t_SS(ms) =

I_SS(μA)

Figure 2. Digital Enable Control Circuit

The soft-start timing is the output voltage rising time from

0V to settled level and can be programmed by the external

capacitor between the SS and GND pins. The available

capacitance range is from 2.7nF to 220nF. If a 3.9nF

capacitor is used, the typical soft-start will be 1.5ms. Do

not leave SS unconnected.

R

EN1

V

IN

EN

R

EN2

RT2859A/B

GND

Figure 3. ResistorDivider for Lockout Threshold Setting

Enable Operation (EN)

For automatic start-up the high-voltage EN pin can be

connected to V_IN, either directly or through a 100kΩ

resistor. Its large hysteresis band makes EN useful for

simple delay and timing circuits. EN can be externally

pulled to V_INby adding a resistor-capacitor delay (R_EN

and C_ENin Figure 1). Calculate the delay time using EN's

internal threshold where switching operation begins (1.4V,

typical).

Output Voltage Setting

Set the desired output voltage using a resistive divider

from the output to ground with the midpoint connected to

FB. The output voltage is set according to the following

equation :

R1

V_OUT= 0.765(1

)

R2

V

OUT

An external MOSFET can be added to implement digital

control of EN when no system voltage above 2V is available

(Figure 2). In this case, a 100kΩ pull-up resistor, R_EN, is

connected between VINand the ENpin. MOSFET Q1 will

be under logic control to pull down the ENpin. To prevent

enabling circuit when VINis smaller than the VOUT target

value or some other desired voltage level, a resistive voltage

divider can be placed between the input voltage and ground

and connected to EN to create an additional input under-

voltage lockout threshold (Figure 3).

R1

FB

RT2859A/B

GND

R2

Figure 4. Output Voltage Setting

Place the FB resistors within 5mm of the FB pin. Choose

R2 between 10kΩ and 100kΩ to minimize power

consumption without excessive noise pick-up and

calculate R1 as follows :

EN

R

EN

V

EN

RT2859A/B

R2(V

 0.765V)

IN

OUT

R1 =

0.765V

C

EN

For output voltage accuracy, use divider resistors with 1%

or better tolerance.

GND

Figure 1. External Timing Control

Under-Voltage Lockout Protection

The RT2859A/B feature an under-voltage lock-out (UVLO)

function that monitors the internal linear regulator output

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

14

DS2859A/B-05 May 2019

RT2859A/B

(PVCC) and prevents operation if V_PVCCis too low. In some

multiple input voltage applications, it may be desirable to

use a power input that is too low to allow V_PVCCto exceed

the UVLO threshold.

are recommended for their stable temperature and bias

voltage characteristics.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

External BOOT Bootstrap Diode

When the input voltage is lower than 5.5V it is

recommended to add an external bootstrap diode between

VIN(or VINR) and the BOOT pin to improve enhancement

of the internal MOSFET switch and improve efficiency.

The bootstrap diode can be a low cost one such as 1N4148

or BAT54.

P_D(MAX)= (T_J(MAX)− T_A) / θ_JA

5V

where T_J(MAX)is the maximum junction temperature, T_Ais

the ambient temperature, and θ_JAis the junction to ambient

thermal resistance.

BOOT

RT2859A/B

SW

0.1µF

For recommended operating condition specifications, the

maximum junction temperature is 125°C. The junction to

ambient thermal resistance, θ_JA, is layout dependent. For

WQFN-16L 3x3 package, the thermal resistance, θ_JA, is

47.4°C/W on a standard JEDEC 51-7 four-layer thermal

test board. The maximum power dissipation at T_A= 25°C

can be calculated by the following formula :

Figure 5. External Bootstrap Diode

External BOOT Capacitor Series Resistance

The internal power MOSFET switch gate driver is

optimized to turn the switch on fast enough for low power

loss and good efficiency, but also slow enough to reduce

EMI. Switch turn-on is when most EMI occurs since V_SW

rises rapidly. During switch turn-off, SW is discharged

relatively slowly by the inductor current during the dead-

time between high-side and low-side switch on-times.

P_D(MAX)= (125°C − 25°C) / (47.4°C/W) = 2.1W for

WQFN-16L 3x3 package

The maximum power dissipation depends on the operating

ambient temperature for fixed T_J(MAX)and thermal

resistance, θ_JA. The derating curve in Figure 1 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

In some cases it is desirable to reduce EMI further, at the

expense of some additional power dissipation. The switch

turn-on can be slowed by placing a small (<10Ω)

resistance between BOOT and the external bootstrap

capacitor. This will slow the high-side switch turn-on and

V_SW's rise. To remove the resistor from the capacitor

charging path (avoiding poor enhancement due to under-

charging the BOOT capacitor), use the external diode

shown in figure 5 to charge the BOOT capacitor and place

the resistance between BOOT and the capacitor/diode

connection.

2.5

Four-Layer PCB

2.0

1.5

1.0

0.5

0.0

PVCC Capacitor Selection

0

25

50

75

100

125

Decouple PVCC to PGND with a 1μF ceramic capacitor.

Ambient Temperature (°C)

High grade dielectric (X7R, or X5R) ceramic capacitors

Figure 1. Derating Curve of Maximum PowerDissipation

©

is a registered trademark of Richtek Technology Corporation.

DS2859A/B-05 May 2019

www.richtek.com

15

RT2859A/B

Layout Considerations

 Connect the feedback network to the output capacitors

rather than the inductor. Place the feedback components

near the FB pin.

Follow the PCB layout guidelines for optimal performance

of the RT2859A/B.

 Keep the traces of the main current paths as short and

 The exposed pad, PGND, andGNDshould be connected

to large copper areas for heat sinking and noise

protection. Provide dedicated wide copper traces for the

power path ground between the IC and the input and

output capacitor grounds, rather than connecting each

of these individually to an internal ground plane.

wide as possible.

 Put the input capacitor as close as possible to the device

pins (VINand PGND).

 The high-frequency switching node (SW) has large

voltage swings and fast edges and can easily radiate

noise to adjacent components. Keep its area small to

prevent excessive EMI, while providing wide copper

traces to minimize parasitic resistance and inductance.

Keep sensitive components away from the SW node or

provide ground traces between for shielding, to prevent

stray capacitive noise pickup.

 Avoid using vias in the power path connections that have

switched currents (from C_INto PGND and C_INto VIN)

and the switching node (SW).

Place the input capacitors as

close to the IC as possible.

Place the feedback components as close

to the FB as possible for better regulation.

C

IN

V

OUT

PGND

C

R1

16 15 14 13

1

2

3

4

12

11

10

9

FB

BOOT

SW

BOOT

VREG5

SS

R2

GND

SW

C

REG5

17

GND

SW

SW should be connected

C

SS

5

6

7

8

to inductor by wide and

short trace. Keep sensitive

components away from this

trace.

L

C

OUT

V

OUT

Place the output capacitors as

close to the IC as possible.

Figure 2. PCB Layout Guide

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

16

DS2859A/B-05 May 2019

RT2859A/B

Outline Dimension

SEE DETAIL A

D

D2

L

1

E

E2

1

2

1

2

e

b

DETAILA

A

A3

Pin #1 ID and Tie Bar Mark Options

A1

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.031

0.002

0.010

0.012

0.120

0.069

0.120

0.069

A

A1

A3

b

0.700

0.000

0.175

0.180

2.950

1.300

2.950

1.300

0.800

0.050

0.250

0.300

3.050

1.750

3.050

1.750

0.028

0.000

0.007

0.116

0.051

0.116

0.051

D

D2

E

E2

e

0.500

0.020

L

0.350

0.450

0.014

0.018

W-Type 16L QFN 3x3 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1^stStreet, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

DS2859A/B-05 May 2019

www.richtek.com

17


型号：	RT2859B
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	暂无描述
文件：	总17页 (文件大小：316K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RT2859B [RICHTEK]

相关型号：

RT2862

RT2862A

RT2862GSP

RT2872

RT2875A

RT2875AQ

RT2875AQGCP

RT2875BQ

RT2875BQGCP

RT2875DQ

RT290-20

RT290-20_15