RT9206PS [RICHTEK]
High Efficiency, Synchronous Buck with Dual Linear Controllers; 高效率，同步降压型带双线性控制器
| 型号： | RT9206PS |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | High Efficiency, Synchronous Buck with Dual Linear Controllers |
| 文件： | 总21页 (文件大小：337K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RT9206
High Efficiency, Synchronous Buck with Dual Linear
Controllers
General Description
Features
l Wide Input Range (4.75V to 28V)
The RT9206 is a low cost, combo power controller, which
integrates a synchronous step-down voltage-mode PWM
and two HV linear controllers. Directly drive external
N-MOSFET makes it easy to implement a high efficiency
and cost attractive power solution. Voltage mode control
loop and constant operation frequency with external
compensation network provide better stability in wide
operation range. Adjustable operation frequency up to
600kHz can minimize the inductor size and PCB space. It
is particularly suitable in wide input voltage range (from
4.75V to 28V) and multi-output applications.
l 0.8V Internal Reference
l High Efficiency Synchronous Buck Topology
l Integrate two HV Linear Controllers
l Low cost N-MOSFET Design
l Duty Cycle from 0% to 90%.
l Adjustable switching frequency from 200kHz to
600kHz, Default 200kHz
l Sense OCP by low Side MOSFET RDS(ON)
l Power Good Signal Output
l RoHS Compliant and 100% Lead (Pb)-Free
Linear controller features flexible linear power design.
Delivered power can be simply decided by external
N-MOSFET selection. Output voltage level is chosen via
external resistor divider. The 0.8V internal reference can
satisfy most of the applications. Under voltage lockout
provide cost effective protection of output.
Applications
l LCD Monitor
l Desk Note
l IEEE1394 Client
l Desktop IA
l Broadband
RT9206 provides complete safety protection function: soft
start, over currentprotection, overvoltage andunder voltage
protection. Set current limit by choosing different MOSFET.
Synchronous Buck control mode provides excellent over
voltage protection by turning on low side MOSFET to
prevent any damage of end device from abnormal voltage
stress as over voltage condition occurs.
Pin Configurations
(TOP VIEW)
LDRV1
VDD
16
15
LFB1
BOOT
UGATE
PHS
VINT
LGATE
GND
2
3
4
5
LDRV2
LFB2
14
13
12
COMP
FB
PGOOD
SS/EN
6
7
8
11
10
Ordering Information
RT9206
RT
9
SOP-16
Package Type
S : SOP-16
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
Note :
RichTek Pb-free and Green products are :
}RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
}Suitable for use in SnPb or Pb-free soldering processes.
}100%matte tin (Sn) plating.
DS9206-11 March 2007
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1
RT9206
Typical Application Circuit
R1 10
C15 500pF
R2 11k
V
12V
IN
C1
1uF
C3
220uF
C2
1uF
R4
3.3k
1N4148
V
V
D1
15
Q3
OUT1
1
2
3
4
5
16
15
14
C9
1uF
LDRV1
LFB1
R
C16 500pF
R3 11k
RT9206CS
BOOT
OUT2
3.3V
VDD
BOOT
UGATE
PHS
Si4800BDY
C6
10uF
Q4
V
2.5V
0 R13
OUT3
Q1
L1
C10
1000uF
V
C11
1uF
LDRV2
LFB2
OUT1
5V
13
12
4.7uH
C8 4.7uF
C7
10uF
R11
5.6k
COMP
FB
VINT
0
Q2
6
7
11
10
9
LGATE
GND
C17
R14
390pF
C13
1000uF
PGOOD
SS/EN
C14
33nF
8
RT
R
R12
4.3K
RT
Q5
R10
51k
R8
3k
1uF
C
EN
SS
R9
560
PGOOD
Figure 1. Typical Application for 12V Input
R1 10
V
24V
IN
C1
1uF
C3
220uF
C2
1uF
C15 500pF
R4
R2 11k
3.3k
1N4148
D1
Q3
V
OUT1
1
2
3
4
5
6
7
8
16
15
14
13
12
C9
1uF
LDRV1
LFB1
R
V
C16 500pF
R3 11k
BOOT
RT9206CS
15
0
OUT2
VDD
BOOT
UGATE
PHS
Si4800BDY
3.3V
C6
10uF
V
Q4
R13
OUT3
Q1
C10
1000uF 1uF
C11
V
LDRV2
LFB2
COMP
FB
L1
OUT1
5V
2.5V
33uH
C8 4.7uF
0
C7
10uF
R11
5.6k
VINT
Q2
11
10
9
LGATE
GND
220pF
C13
R14
PGOOD
SS/EN
Q5
C14
33nF
RT
R
R12
8.2K
RT
R10
51k
4.7uF
C
R8
3k
EN
SS
R9
560
PGOOD
Figure 2. Typical Application for 24V Input
Note : RBOOT is a must to suppress ringing spike.
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2
DS9206-11 March 2007
RT9206
Function Block Diagram
+
-
+
LCTR1
0.8V
LDRV1
LFB1
LCTR2
0.8V
+
-
LDRV2
LFB2
VDD
+
VINT
6.0V
Reg
+
Thermal
Protection
UV
0.6V
-
+
-
UV
BOOT
0.6V
UGATE
PHS
VINT
LGATE
GND
+
-
Driver
Control
Logic
UV
0.6V
0.8V
COMP
FB
+
-
GM
+
PWM
CP
-
RAMP
Generator
Soft Start
SS/EN
+
-
OSC
RT
OVP
1V
PGOOD
-
PG
+
0.72V
DS9206-11 March 2007
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3
RT9206
Operation
Introduction
Power On Reset (POR)
The RT9206 is a combo controller, which integrates an
adjustable frequency, voltage mode synchronous step
down controller and two HV linear controllers. The
synchronous step down controller consists of an internal
precision reference, an internal oscillator, an error amplifier,
a PWM comparator, control logic and floating gate driver,
a programmable soft-start, a power good indicator, an over
voltage protection, an overtemperature protection and short
circuit protection.
The power on reset circuit assures that the MOSFET driver
outputs remain in the off state whenever the VDD supply
voltages lower than the POR threshold.
Over-Current Protection
Whenever the over-current is occurred in soft-start or in
normal operation period, It will shut down PWM signal,
the MOSFET driver outputs remain in the off state, and
latch soft-start signal low until restart VDD supply voltage.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier, which is
the amplified error signal from the sensed output voltage
and the voltage on non-inverting input, which is connected
with internal 0.8V reference voltage. The amplified error
signal is compared to a fixed frequency linear sawtooth
ramp and generates fixed frequency pulse of variable duty-
cycle, which drivers the twoN-Channel external MOSFETs.
Over-Voltage Protection
Once over-voltage protection occurred, it will turn on low
side MOSFET and latch soft-start signal low to prevent
end device form abnormal voltage stress. Restart VDD
supply voltage will release the protection.
Power Good Indicator
The power good indicator is an open drain output to show
whether the synchronous converter output ready or not.
The power good indicator is available after soft-start end.
The timing of the synchronous converter is provide through
an internal oscillator circuit and can be programmed
between 200kHz to 600kHz via an external resistor
connected between RT pin and ground.
Short-Circuit Protection
The short-circuit phenomenon is sensed by the drop of
output voltage, synchronous converter and two linear
controller. Once the short-circuitoccurred, the dropof output
voltage lower than the under voltage threshold, 0.6V on
feedback, the PWM signal will shut down and both of the
external MOSFET will turn off and soft-start signal latch
low. Soft-start signal, SS, is also connected to two linear
controller error amplifier non-inverting input. Therefore,
whenever the drop of output of the synchronous converter
or two linear controllers lower than under voltage threshold,
all MOSFET drivers will turn off.
Soft-Start
RT9206 has a programmable soft-start to control the output
voltage rise time and limit the current surge at the start-
up. The soft-start will begin while VDD rises above POR
threshold for correct start-up. Soft-start function operates
by an internal sourcing current to charge an external
capacitor to around the voltage ofVINT.Thesoft-start signal,
SS pin, is the third input non-inverting input of the PWM
comparator. Before soft-start signal reach the bottom of
the sawtooth ramp, inverting input of the PWM comparator,
the soft-start current is twiceof the normal soft-start current.
Once the soft-start signal reach the bottom of the ramp,
the soft-start current became normal, and start to increase
duty cycle from zero to the point the feedback loop takes
control.
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DS9206-11 March 2007
RT9206
Pin Description
LDRV1(Pin 1)
The formula between resistor setting and operational
frequency are as follows:
Linear controller 1 (LCTR1) driver. Connect to the gate of
external N-Channel MOSFET pass transistor to form a
positive linear regulator
62´ 108
RRT =
FOSC - 200´ 103
VDD (Pin 2)
GND (Pin 10)
Input supply voltage
Ground
LDRV2 (Pin 3)
LGATE (Pin 11)
Linear controller 2 (LCTR2) driver. Connect to the gate of
external N-Channel MOSFET pass transistor to form a
positive linear regulator
Low side gate driver. Drives low side N-MOSFET with a
voltage swing between VINT andGND
VINT (Pin 12)
LFB2 (Pin 4)
Internal 6.0V regulator output. The low side gate driver and
control circuit and external bootstrap diode are powered
by this voltage. Decouple this pin to power ground with a
4.7uF or greater ceramic capacitor close to the VINT pin.
LDO2 feedback input. The feedback set point is 0.8V.
Connect to a resistive divider between the positive linear
regulator output andGND to adjust the output voltage.
COMP (Pin 5)
PHS (Pin 13)
Switching regulator compensation pin.
Inductor connection with (-) terminal bootstrap flying
capacitor connection.
FB (Pin 6)
Switching regulator feedback input. The feedback set point
is 0.8V. Connect to a resistive divider between the switching
regulator output andGND to adjust the output voltage.
UGATE (Pin 14)
High side gate driver.Drives highsideN-Channel MOSFET
with a voltage swing between BOOT and PHS
PGOOD (Pin 7)
BOOT (Pin 15)
Open drain power good indicator. PGOOD is low when
switching regulator output voltage is lower than 10% of its
regulation voltage. Connect a pull high resistor between
PGOOD and switching regulator output for pull high logic
levelvoltage.
High side floating driver supply with (+) terminal bootstrap
flying capacitor connection. Voltage swing is from a diode
drop below VINT to VIN+VINT
LFB1 (Pin 16)
SS/EN (Pin 8)
LDO1 feedback input. The feed back set point is 0.8V.
Connect to a resistive divider between the positive linear
regulator output andGND to adjust the output voltage.
Soft start input with 8uA sourcing current and IC enable
control.
RT (Pin 9)
Operational frequency setting. Connect a resistor between
RT andGND to set operational frequency. The operational
frequency will nominally run at 200kHz when open.
DS9206-11 March 2007
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5
RT9206
Absolute Maximum Ratings (Note 1)
l Supply Voltage (VIN) ------------------------------------------------------------------------------------------------ - 0.3 to 30V
l PHS--------------------------------------------------------------------------------------------------------------------- - 0.6V to 30V
l PHS (PHS Transient Time Interval < 50ns) --------------------------------------------------------------------- - 5V
l BOOT, UG to PHS --------------------------------------------------------------------------------------------------- - 0.3V to 7V
l BOOT toGND -------------------------------------------------------------------------------------------------------- - 0.3V to 35V
l LDRI1, LDRI2 --------------------------------------------------------------------------------------------------------- - 0.3V to 30V
l PowerGood Voltage------------------------------------------------------------------------------------------------- - 0.3V to 7V
l The other pins -------------------------------------------------------------------------------------------------------- - 0.3V to 7V
l PowerDissipation, PD @ TA = 25°C
SOP-16 ---------------------------------------------------------------------------------------------------------------- 0.625W
l PackageThermal Resistance
SOP-16, qJA --------------------------------------------------------------------------------------- 90°C/W
l JunctionTemperature ----------------------------------------------------------------------------------------------- 150°C
l Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------- 260°C
l OperationTemperature Range------------------------------------------------------------------------------------- - 20°C to 85°C
l StorageTemperature Range --------------------------------------------------------------------------------------- - 65°C to 150°C
l ESD Susceptibility (Note 2)
HBM (Human Body Mode) ----------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 3)
l AmbientTemperature Range -------------------------------------------------------------------------------------- 0°C to 70°C
l Junction Temperature Range -------------------------------------------------------------------------------------- 0°C to 125°C
Electrical Characteristics
(VIN = 12V, FADJ left floating, TA = 25°C, Unless Otherwise specification)
Parameter
System Supply Input
Operation voltage Range
Power On Reset
Symbol
Test Condition
Min
Typ
Max
Units
(Note 4)
4.75
3.8
200
--
--
28
4.7
600
4
V
V
V
DD
POR
Power On Reset Hysteresis
Supply Current
--
1.3
1
mV
mA
mA
%
I
I
V
V
=30V, V =V
SS INT
DD
DD
DD
Shut Down Current
Power Good under Threshold
PG Fault Condition
Soft Start
--
3.5
92
=30V, V <0.4V
DD
SS
VFB
VPG
82
--
--
--
0.2
V
I
= - 4mA, VFB = 80%
PG
Soft start Current
4
--
8
12
--
mA
V
I
SS
Normal Operation Voltage
Shut down Voltage
V
V
INT
SS
0.4
0.7
--
V
V
SS
To be continued
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DS9206-11 March 2007
RT9206
Parameter
PWM Section Reference Voltage
Feedback Voltage
Symbol
Test Condition
Min
Typ
Max Units
0.784
5.0
0.8
6
0.816
6.5
--
V
V
V
V
FB
Internal Voltage
I
= 10mA
= 12V
INT
INT
Internal Voltage Source Current
20
--
mA
I
V
IN
INT
PWM Section
Oscillator
Free Run Frequency
160
-30
--
200
--
240
+30
--
kHz
%
F
F
OSC
Operation Frequency Setting
Ramp Amplitude
By setting RT (Note 5)
OSC
1.9
90
V
Maximum Duty Cycle
Error Amplifier
85
--
%
GM
--
1.6
90
90
--
ms
mA
mA
Compensation Source Current
Compensation Sink Current
Gate Driver
45
45
140
140
Upper Gate Source (UGATE1 & 2)
Upper Gate Sink (UGATE1 & 2)
Lower Gate Source (LGATE1 & 2)
Lower Gate Sink (LGATE1 & 2)
Upper Gate Rising Time
Upper Gate Falling Time
Lower Gate Rising Time
Lower Gate Falling Time
Minimum On Time
--
--
--
--
--
--
--
--
--
5
5
8
8
W
W
W
W
ns
ns
ns
ns
ns
R
R
R
R
UGATE
UGATE
3
5
LGATE
1.5
30
30
30
30
--
3
LGATE
--
T
T
T
T
V
V
V
V
= 12V, C
= 12V, C
= 12V, C
= 12V, C
= 3nF
= 3nF
= 3nF
= 3nF
R_UGATE
F_UGATE
R_LGATE
F_LGATE
DD
DD
DD
DD
LOAD
LOAD
LOAD
LOAD
--
--
--
400
Protection
Over Current Threshold
Over Voltage Protection
Under Voltage Protection
-270
0.9
-300
1
-330
1.1
mV
V
VFB
VFB
0.54
0.6
0.66
V
Linear Controller Section
Error Amplifier
Feedback Voltage
Output Current
LFB1 / LFB2
0.780
10
0.8
--
0.824
--
V
LDRV1/LDRV2
mA
Protection
Under Voltage Protection
Over Temperature Protection
LFB1 / LFB2
0.54
125
0.6
0.66
--
V
170
°C
DS9206-11 March 2007
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7
RT9206
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended. The human body model is a 100pF capacitor
discharged through a 1.5kW resistor into each pin.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. VDD-VOUT2 or VDD-VOUT3 must be higher than 4V to keep linear controller operation
62´ 108
R
=
Note 5.
RT
FOSC - 200´ 103
Note 6. The LDOs are not suitable for low noise applications
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DS9206-11 March 2007
RT9206
Typical Operating Characteristics
Power On
Power On
IOUT1 = 4A
IOUT2 = 0.5A
IOUT3 = 0.5A
2V/Div
10V/Div
5V/Div
VIN
VIN
2V/Div
VOUT1
2V/Div
VOUT3
2V/Div
VOUT2
2V/Div
2V/Div
VOUT1
VOUT2
VOUT3
5V/Div
IOUT1 = 4A
IOUT2 = 0.5A
IOUT3 = 0.5A
5V/Div
PGOOD
PGOOD
VIN = 24V, f = 200kHz
VIN = 12V, f = 200kHz
Time (100ms/Div)
Time (200ms/Div)
Power Off
Power Off
IOUT1 = 4A
IOUT2 = 0.5A
IOUT3 = 0.5A
IOUT1 = 4A
IOUT2 = 0.5A
IOUT3 = 0.5A
20V/Div
5V/Div
5V/Div
VIN
5V/Div
VIN
VOUT1
2V/Div
VOUT1
2V/Div
2V/Div
5V/Div
VOUT3
VOUT2
2V/Div
VOUT3
5V/Div
VOUT2
PGOOD
PGOOD
VIN = 24V, f = 200kHz
Time (20ms/Div)
VIN = 12V, f = 200kHz
Time (20ms/Div)
Bootstrap Wave Form
Bootstrap Wave Form
10V/Div
20V/Div
5V/Div
BOOT
PHS
BOOT
10V/Div
PHS
10V/Div
UGATE
20V/Div
UGATE
LGATE
5V/Div
LGATE
20V/Div
VIN = 24V
VIN = 12V
Time (1ms/Div)
Time (1ms/Div)
DS9206-11 March 2007
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RT9206
Dead Time
Dead Time
LGATE
UGATE
LGATE
2V/Div
2V/Div
UGATE
5V/Div
10V/Div
VIN = 24V, IOUT1 = 4A
Time (20ns/Div)
VIN = 12V, IOUT1 = 4A
Time (20ns/Div)
Dead Time
Dead Time
UGATE
LGATE
UGATE
LGATE
5V/Div
2V/Div
10V/Div
2V/Div
VIN = 12V, IOUT1 = 4A
Time (20ns/Div)
VIN = 24V, IOUT1 = 4A
Time (20ns/Div)
Dynamic Loading
Dynamic Loading
UGATE
10V/Div
UGATE
10V/Div
LGATE
5V/Div
LGATE
5V/Div
VOUT1
100mV/Div
VOUT1
100mV/Div
IOUT1
5A/Div
IOUT1
5A/Div
VIN = 12V
VIN = 12V
Time (10ms/Div)
Time (10ms/Div)
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DS9206-11 March 2007
RT9206
Soft Start vs. Temperature
Short Latch
6.1
6.05
6
VIN = 12V
f = 200kHz
VIN = 12V
20V/Div
UGATE
5.95
5.9
2V/Div
VOUT1
5.85
5.8
10A/Div
IL
-50
-25
0
25
50
75
100 125 150
Time (20ms/Div)
(°C)
Temperature
Oscillator Frequency vs. Temperature
Reference Voltage vs. Temperature
240
0.82
0.815
0.81
VIN = 12V
f = 200kHz
VIN = 12V
RT = floating
235
230
225
220
215
210
205
200
195
190
0.805
0.8
0.795
0.79
0.785
-50
-25
0
25
50
75
100 125 150
-50
-25
0
25
50
75
100 125 150
Temperature
(°C)
Temperature
(°C)
POR(Rising/Falling) vs. Temperature
Quiescent Current vs. Input Voltage
5
4.75
4.5
4.25
4
1055
1050
1045
1040
1035
1030
1025
VIN = 12V
f = 200kHz
VSS = 0V
Rising
Falling
3.75
3.5
3.25
3
2.75
2.5
2.25
2
0
4
8
12
16
20
24
28
32
-50
-25
0
25
50
75
100 125 150
Temperature (°C)
VIN (V)
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11
RT9206
Efficiency vs. Load Current
Fosc vs. RRT
96
94
92
90
88
86
84
82
80
800
700
600
500
400
300
200
100
0
VIN = 12V
VIN = 12V
VIN = 24V
VOUT = 5V
Frequency = 200kHz
0
1
2
3
4
5
6
7
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70
Load Current (A)
RRT (k )
W
Over Current Threshold vs. Temperature
450
400
350
300
250
200
VIN = 12V
-50
-25
0
25
50
75
100 125 150
Temperature (°C)
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DS9206-11 March 2007
RT9206
Application Information
Synchronous Buck Converter
is1
is2
The RT9206 is specifically designed for synchronous buck
converter with wide input voltage from 4.75V to 28V and
operating frequency from 200kHz to 600kHz. To fully utilize
its advantages, peripheral components should be
appropriately selected. The following information provides
basic considerations for component selection.
Output Inductor Selection
The selection of output inductor is based on the
considerations of efficiency, output power and operating
frequency. Low inductance value has smaller size, but
results in low efficiency, large ripple current and high output
ripple voltage. Generally, an inductor that limits the ripple
current (DIL) between 20% and 50% of output current is
appropriate. Figure 1 shows the typical topology of
synchronous step-down converter and its related
waveforms.
Figure 1.The waveforms of synchronous step-down
converter
According to Figure 1 the ripple current of inductor can be
calculated as follows :
D
VOUT
VIN
VIN - VOUT = L ΔIL ;Δt = ;D =
Δt
fs
VOUT
(1)
L = (VIN - VOUT)´
VIN ´ fs ´ ΔIL
i
i
L
L
S1
Where :
VIN= Maximum input voltage
= Output Voltage
+ V -
L
I
i
OUT
C
i
S2
+
S1
+
r
V
V
OUT
C
OR
-
R
S2
L
V
V
OUT
IN
Dt=S1 turn on time
DIL=Inductor current ripple
fS= Switching frequency
D=Duty Cycle
+
V
C
OC
-
OUT
-
Ts
rC= Equivalent series resistor of output capacitor
Vg1
Vg2
Ton
Toff
Output Capacitor Selection
The selection of output capacitor depends on the output
ripple voltage requirement. Practically, the output ripple
voltage is a function of both capacitance value and the
equivalent series resistance (ESR) rC. Figure 2 shows the
related waveforms of output capacitor.
VIN-VOUT
VL
-VOUT
iL
IL=IOUT
ΔIL
DS9206-11 March 2007
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13
RT9206
V
-V
iL
V
d
IN OUT
d
dt
OUT
L
iL
iL
=
=
Input Capacitor Selection
dt
L
The selection of input capacitor is mainly based on its
maximum ripple current capability. The buck converter
draws pulsewise current from the input capacitor during
the on time of S1 as shown in Figure 1. The RMS value of
ripple current flowing through the input capacitor is
described as :
I O
T
S
ic
ΔI
1/2
L
0
ΔIL
(A)
(6)
Irms = IO D(1-D)
The input capacitor must be cable of handling this ripple
current. Sometime, for higher efficiency the low ESR
capacitor is necessarily.
V
OC
ΔV
OC
Power MOSFET Selection
The selection of MOSFETs is based on consideration of
maximum gate-source voltage (Vgs), drain-source voltage
(Vdss), maximum drain current (Id), drain-source on-state
resistance Rds(on)and thermalmanagement. The MOSFETs
are driven byVINT that is internally regulated as 6.0V. Low
threshold voltage MOSFET should be selected toguarantee
that it could fully turn on at Vgs = 6.0V.
V
OR
ΔI x rc
L
0
t1
t2
Figure 2. The related waveforms of output capacitor.
The total power dissipation of external MOSFETs consists
of conduction and switching losses. The conduction losses
of high-side and low-side MOSFETs are described by
equation (7) and (8), respectively.
The AC impedance of output capacitor at operating
frequency is quite smaller than the load impedance, so
the ripple current ( DIL) of the inductor current flows mainly
through output capacitor. The output ripple voltage is
described as :
(High-side MOSFET)
PH - con =I02 ´ D´ Rds(on)´ q r
(W)
(W)
(7)
(8)
(2)
ΔVOUT = ΔVOR + ΔVOC
(Low-side MOSFET)
PL - con =I02 ´ (1-D)´ Rds(on)´ q r
1
t2
(3)
(4)
ΔVOUT = ΔIL ´ rC +
ic d t
ò
t1
Where
Co
q r
is temperature dependency of Rds(on)
ΔVOUT = ΔIL ´ rC + 1 VOUT (1- D)TS2
The total switching loss is approximated as.
Vds(off)
8 COL
Psw =IOUT ´
´ (tr + tf)´ fs
(W)
(9)
where DVOR is caused by ESR and DVOC by capacitance.
2
Where
Vds(off) is voltage from drain to source at MOSFET
off time.
For electrolytic capacitor application, typically 90~95% of
the output voltage ripple is contributed by the ESR of output
capacitor. So Equation (4) could be simplified as :
tr and tf are rise-time and fall-time, respectively.
IOUT= Load current
(5)
ΔVOUT = ΔIL ´ rC
Users could connect capacitors in parallel to get calculated
ESR.
fs= Switching frequency
www.richtek.com
14
DS9206-11 March 2007
RT9206
The MOSFET should be capable of handling the power
loss over the entire operating range.
V
OUT
Ra
Design Example:
-
+
FB
(LFB1,LFB2)
Design the power stage for a synchronous step-down
converter having the following specifications:
Rb
0.8V
VIN = 12V, VOUT = 5V, IOUT = 5A, DVOUT < 25mV, switching
frequency = 200kHz, to determine the value of inductor
and output capacitor (Using electrolytic capacitor).
Figure 3. The connected diagram of external voltage
divider and reference voltage
First, select ripple current of inductor is 20% of output
current, from equation (1)
5
If high value resistors are used, the input bias current of
FB pin could cause a slight increase in output voltage.
The output voltage set point can be more accurate by using
precision resistor.
L = (12 - 5)´
= 14.58mH
12´ 200K ´ 0.2´ 5
Select L = 15mH
Soft-start setting
From equation (5)
Figure 4 shows the typical soft-start timing waveforms of
RT9206. The soft-start time of Buck converter can be set
by selecting the soft-start capacitance value. The delay
time between input voltage applied and output voltage
starting to ramp up (TDELAY) is calculated as: The total
time from input voltage applied to output voltage buildup
(TVR) is calculated as :
25mV=1 x rC
Select two electrolytic capacitors C = 470mF,rC = 43mW
in parallel.
Setting the Current Limit
The RT9206 limits output current by sensing low side
MOSFET voltage drop (VSD) when it turns on. The drop
voltage caused by on-state resistance RDS(ON) is described
as :
TVR = 57´ CSS ´ 106
(ms) (13)
The effective soft-start time (TSS) during that outputvoltage
ramps up from zero to set voltage is calculated as :
VSD=RDS(ON) x IL
(10)
When VSD >300mV, the current limit function will be
activated and latch the controller. So the current limit
function can be set by MOSFETs selection. The relation
of maximum inductor current IL(LIM) and on-state resistance
of MOSFET (RDS(ON)) is described as :
TSS = (320´ VOUT )´ 106 ´ CSS
(ms) (14)
VIN
300´ 10-3
Besides, appropriate soft-start capacitor should be selected
so that the start-up current will not trigger the current limit
function.And make sure that the input power source could
supply the soft-start current.
(W)
(11)
RDS(ON) =
IL(LIM)
Setting the Output voltage
The output voltage is set by external voltage divider and
reference voltage. The feedback pin (FB, LFB1, and LFB2)
is connected to the inverting input of error amplifier and is
referenced to 0.8V reference voltage at non-inverting input
as shown in Figure 3.The output voltage is set by the
following equation.
The total time from input voltage applied to power good
signal pull-high (TPGOOD) is calculated as :
TPG = 640´ CSS ´ 106
(ms) (15)
Ra
(12)
VOUT = (1+
)´ 0.8
Rb
DS9206-11 March 2007
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15
RT9206
V
V
Boost Component Selection
DD
SS
The booststrap gate drive circuit is used to drive high side
N-channel MOSFET. The boost capacitor should be a good
quality and can operate in high frequency. The value of
boost capacitor depends on the total gate charge (Q g) to
V
H
OUT
turn on the MOSFETs. Assuming steady state operation,
the following equation can be used to calculate the
capacitance value to achieve the targeted ripple voltage
PGOOD
T
VR
DVBOOT
.
T
QHg
SS
(F)
CBOOT =
T
ΔVBOOT
PGOOD
Figure 4. The soft-stat timing diagram of RT9206
The capacitor in the range of 0.1uF to 1uF is generally
adequate for most applications.
For the example of CSS = 1mF, VIN = 12V, VOUT = 5V, then
The VINT pin bypass capacitor CINT needs to charge the
boost capacitor, to drive the lowside MOSFET, and to power
the RT9206. CINT should locate near VINT andGND pins
with short and wide traces. Generally, a 4.7uF high
frequency ceramic capacitor is recommended.
TVR = 57ms, TSS = 133ms and TPGOOD = 640ms.
Shutdown
The power stage can be shutdown by pulling soft-start pin
below 0.7V. During shutdown, both of high side MOSFET
(S1) and low side MOSFET (S2) are turned off.
Feedback Compensation
The RT9206 is a voltage mode controller. The control loop
is a single voltage feedback loop including a trans-
conductance error amplifier and a PWM comparator.
Setting the switching frequency
The switching frequency can be set by a resistor (RRT)
connecting between RT and GND pins. Equation (16)
describes the relationship of RRT and switching frequency.
As RT open the normally operated frequency is 200kHz.
To achieve fast transient response and accurate output
regulation, appropriate feedback compensation is
necessary. The goal of the compensation network is to
provide a closed loop transfer function with the highest
0dB crossing frequency and adequate phase margin.
Generally, the phase margin in a range of 45° ~ 60° is
desirable. Figure 4 shows the simplified diagram of
synchronous buck converter and control loop.
62´ 108
fS - 200´ 103
RRT =
(W)
(16)
R
RT
Connecting Between
RT and GND Pins
f (kHz) (kW)
R
RT
S
250
120
300
350
400
450
500
550
600
55
37.5
30.6
24.4
22.5
19.3
16.8
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16
DS9206-11 March 2007
RT9206
Next, deriving the transfer function d(s)/vC (s) of the direct
i
i
L
L
S1
duty ratio pulse-width modulator (PWM Generator). The
+ V -
L
transfer functionT (s) of the modulator is given by
m
i
I
C
OUT
+
S1
i
S2
+
d(S)
1
(19)
Tm(S) =
=
r
V
C
OR
-
S2
VC(S)
Vr
V
R
IN
L
V
OUT
-
+
where, Vr is the amplitude of ramp-waveform which is listed
in datasheet.
V
C
OC
-
OUT
For simplification, the transfer function of PWM generator
and Buck converter can iscombined. The resulting is shown
in equation (20)
Sensor
Gain
V
REF
Compensator
d
Ra
VOUT(S)
VC(S)
1+ rc x CO x S
VIN
V
C
-
G(S) =
=
x
+
gm
L
Vr
S2 x L + CO x S(
+ rc x CO) + 1
+
-
RL
Rc1
Cc1
Cc2
(20)
PWM
Generator
Rb
The transfer function of Equation (20) is a second order
system and Bode plot is shown in Figure 7.
Gain
Figure 5. The simplified diagram for synchronous Buck
converter and control loop.
VIN/Vr
From control system point of view, the block diagram of
Figure 5 is shown in Figure 6.
f
fp
fz
G(S)
PWM
Generator
BUCK
Converter
Phase
Compensator
Vc(s)
V
V
REF
+
d(s)
OUT
C(s)
1/Vr
Gp(s)
-
f
0°
Rb
H (s)
-90°
Ra+Rb
Sensor Gain
-180°
Figure 6. The control block diagram of synchronous
Buck converter
Figure 7. The Bode plot of Buck power stage
First, deriving the accurate small-signal models of power
stage, the equation (18) is the transfer function of
vO(s)/d(s), which be obtained by space averaging
technique.
In Figure 7, the resonance of the output LC filter produces
a double pole and - 40dB/decade slop. The resonance
frequency is expressed as follows :
1
fP =
(Hz)
(21)
VOUT(S)
d(S)
1+ rc x CO x S
2p x L x CO
GP(S) =
=
x VIN
L
S2 x L x CO + S(
+ rc x CO) +1
RL
(18)
DS9206-11 March 2007
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17
RT9206
The effective series resistance (ESR) of capacitor and
Where the fC is zero crossover frequency defined as the
frequency when the loop gain equals unity. Typically, fC be
chosen in range 1/10 ~ 1/20 of switching frequency. fC
determines how fast the dynamic load response is. The
higher fC with the faster dynamic response, and the phase
margin in the range of 45° ~ 60° is desirable.
capacitance introduces one zero into system, the zero is
given as :
1
2p x rc x CO
(Hz)
(22)
fZ =
In the voltage-mode Buck converter shown in Figure 5, the
So, the transfer function of compensator C(s) must be
designed to meet these requirements. In many applications,
use an electrolytic capacitor as the output capacitor, if the
zero (fZ) caused by effective series resistance (ESR) of
capacitor is a few kHz and smaller than 8 times fP, the
type 2 (PI) can be used to get desired compensation. Figure
9 shows the typical type 2 trans-conductance error
amplifier and the Bode plot is also shown in Figure 10.
loop gain of system is
1
TL(S) = C(S) x
x GP(S) x H(S) = C(S) x G(S) x H(S)
(23)
Vr
The desired loop gain and phase margin is show in the
Bode plot of Figure 8.
G(s)
Gain
V
OUT
V
REF
Power
stage
Ra
VIN/Vr
Vc
+
gm
-
Rc1
Cc1
Cc2
Rb
f
fp
fz
TL(s)
Figure 9. The typical type 2 trans-conductance error
amplifier.
Desired
loop gain
fc
f
Gain(dB)
Phase
gmRc1
f
f
°
0
Phase
fcz
fcp
°
-90
Phase
margin
°
-180
Boost
-90
f
Figure 10. The Bode plot of type 2 trans-conductance
error amplifier
Figure 8. The Bode plot of desired loop gain and phase
margin
www.richtek.com
18
DS9206-11 March 2007
RT9206
The design procedure as following :
Step2. Determine the zero crossover frequency and
compensated type.
(1). Selecting the zero crossover frequency fC is 1/10 ~
1/20 switching frequency. Then according equation (24)
set the resistor RC1 to determine the zero crossover
frequency.
Select desired zero-crossover frequency :
fC £ fS/10 ~ fS/20
Select fC = 20kHz
Vr ´ L ´ fC
VOUT
(W) (24)
RC1 »
´
Step3. Determine desired location of poles and zeros for
type2 compensator.
VIN ´ gm ´ rC
VREF
(2). Place the zero of compensator is 70% fp that is
resonance frequency of power stage. The compensator
capacitor Cc1 can be selected to set the zero. The
equation is shown in following :
Select:
fCZ = 0.7 ´ fP = 0.7 ´ 1.34kHz = 938Hz
Assume
fS
fCP =
= 100kHz
2
L´ CO
Step4. Calculate the real parameters-resistor and
capacitors for type2 compensator.
(F)
(25)
CC1 =
0.7´ RC1
From equation (21), the RC1 is calculated as following :
(3). Set a second pole to suppress the switching noise.
Assume the pole is one half of switching frequency
fs, which results in capacitor Cc2 as shows in following:
fC ´ L ´ Vr
VOUT
VREF
RC1 =
´
rC ´ VIN ´ gm
1
1
CC2 =
»
(F) (26)
20kHz ´ 15mH ´ 1.9
5V
1
p ´ RC1´ fs
=
´
= 8.4kW
p ´ RC1´ fs -
22mW´ 12V ´ 1.6m s 0.8V
CC1
Design example
Design example of type 2 compensator: the schematic is
shown in Figure 4, where the parameters as following:
Select RC1 = 8.2kW
Calculate CC1 from equation (25)
VIN=12V,
VOUT=5V,
IOUT=5A,
switching
frequency=200kHz, L=15mH, CO=940mF, rC=22mW, the
parameters of RT9206 as following: gm=1.6ms, ramp
amplitude=1.9V,and reference voltageVref=0.8V.
L´ CO
15m ´ 940m
CC1 =
=
= 20.7nF
0.7´ RC1
0.7´ 8.2k
Select CC1 = 22nF
Step1. Determine the power stage poles and zeros. The
pole caused by the output inductor and output capacitor is
calculated as :
Second capacitor CC2 can be calculated using equation
(26)
1
1
1
1
C
=
=
=194pF
fP =
fZ =
=
=1.34kHz
C2
p ´ R ´ f
p ´ 8.2kW´ 200kHz
C1
S
2p L´ CO 2p 15m ´ 940m
1
1
Select CC2 = 220pF
=
= 7.7kHz
2p ´ rC ´ CO 2p ´ 22mΩ´ 940mF
DS9206-11 March 2007
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19
RT9206
Linear Regulator
Output Capacitor Selection
(1). The IC needs a bypassing ceramic capacitor C1 as a
R-C filter to isolate the pulse current from power stage
and supply to IC, so the ceramic capacitor C1 should
be placed adjacent to the IC.
Solid tantalum capacitors are recommended for use on
the output capacitors of LDO because their typical ESR is
veryclose to the ideal valuerequiredfor loopcompensation.
Tantalums also have good temperature stability: a good
quality tantalum will typically show a capacitance value
that varies less than 10-15% across the full temperature
range of 125°C to -40°C. ESR will vary only about 2X going
from the high to low temperature limits.
(2). Place the high frequency ceramic decoupling close
to the power MOSFETs.
(3). The feedback part should be placed as close to IC as
possible and keep away from the inductor and all noise
sources.
Linear Regular MOSFETs Selection
(4). The components of bootstraps (C8, C9 andD1) should
be closed to each other and close to MOSFETs.
Themainconsideration of passMOSFETsof linearregulator
ispackage selectionfor efficient removal of heat. The power
dissipation of a linear regulator is
(5).The PCB trace from UGATE and LGATE of controller to
MOSFETs should be as short as possible and can
carry 1A peak current.
Plinear = (VIN - VOUT)´ IOUT
(W) (26)
The criterion for selection of package is the junction
temperature below the maximum desired temperature with
the maximum expected ambient temperature.
(6). Place all of the components as close to IC as possible.
Figure 11 shows the typical PCB layout of synchronous
Buck converter with RT9206 controller
Layout Consideration
Layout is very important in high frequency switching
converter design. If designed improperly, the PCB could
radiate excessive noise and contribute to the converter
instability. First, place the PWM power stage components.
Mount all the power components and connections in the
top layer with wide copper areas. The MOSFETs of Buck,
inductor, and output capacitor should be as close to each
other as possible. This can reduce the radiation of EMI
due to the high frequency current loop. If the output
capacitors are placed in parallel to reduce the ESR of
capacitor, equal sharing ripple current should be
considered. Place the input capacitor directly to the drain
of high-side MOSFET. The MOSFETs of linear regulator
should have wide pad to dissipate the heat. In multilayer
PCB, use one layer as power ground and have a separate
control signal ground as the reference of the all signal. To
avoid the signal ground is effect by noise and have best
load regulation, it should be connected to the ground
terminal of output. Furthermore, follows below guidelines
can get better performance of IC:
Figure 11. The PCB layout of synchronous Buck
converter with RT9206 controller
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20
DS9206-11 March 2007
RT9206
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
B
C
D
F
H
I
9.804
3.810
1.346
0.330
1.194
0.178
0.102
5.791
0.406
10.008
3.988
1.753
0.508
1.346
0.254
0.254
6.198
1.270
0.386
0.150
0.053
0.013
0.047
0.007
0.004
0.228
0.016
0.394
0.157
0.069
0.020
0.053
0.010
0.010
0.244
0.050
J
M
16-Lead SOP Plastic Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
DS9206-11 March 2007
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21
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