RT9246AGC [RICHTEK]
Multi-Phase PWM Controller for CPU Core Power Supply; 多相PWM控制器，用于CPU核心供电
| 型号： | RT9246AGC |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | Multi-Phase PWM Controller for CPU Core Power Supply |
| 文件： | 总16页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RT9246A
Multi-Phase PWM Controller for CPU Core Power Supply
General Description
Features
z Multi-Phase Power Conversion with Automatic
The RT9246A is a multi-phase buck DC/DC controller
integrated with all control functions for GHz CPU VRM.
The RT9246A controls 2 or 3 buck switching stages
operating in interleaved phase set automatically. The multi-
phase architecture provides high output current while
maintaining low power dissipation on power devices and
low stress on input and output capacitors. The high
equivalent operating frequency also reduces the
component dimension and the output voltage ripple in load
transient.
Phase Selection
z K8 DAC Output with Active Droop Compensation
for Fast Load Transient
z Smooth VCORE Transition at VID Jump
z Power Stage Thermal Balance by Inductor DCR
Current Sense
z Hiccup Mode Over-Current Protection
z Programmable Switching Frequency (50kHz to
400kHz per Phase), Under-Voltage Lockout and
Soft-Start
RT9246Acontrols both voltage and current loops to achieve
good regulation, response & power stage thermal balance.
Precise current loop using Inductor DCR as sense
component builds precise load line for strict VRM DC &
transient specification and also ensures thermal balance
of different power stages. The settings of current sense,
droop tuning, VCORE initial offset and over current protection
are independent to compensation circuit of voltage loop.
The feature greatly facilitates the flexibility of CPU power
supply design and tuning.
z High Ripple Frequency Times Channel Number
z RoHS Compliant and 100% Lead (Pb)-Free
Applications
z AMD® AthlonTM 64 and OpteronTM Processors Voltage
Regulator
z Low Output Voltage, High CurrentDC-DC Converters
z Voltage Regulator Modules
Pin Configurations
The DAC output of RT9246A supports K8 CPU by 5-bit
VID input, precise initial value & smooth VCORE transient
at VID jump. The IC monitors the VCORE voltage for PGOOD
and over-voltage protection. Soft-start, over-current
protection and programmable under-voltage lockout are
also provided to assure the safety of microprocessor and
power system.
(TOP VIEW)
VID4
VID3
VID2
VID1
VID0
NC
VCC
28
27
26
25
24
23
22
21
PWM1
PWM2
PWM3
2
3
4
5
6
7
8
NC
ISP1
ISP2
ISP3
NC
FBRTN
FB
COMP
PGOOD
DVD
SS
RT
VOSS
9
20
19
18
17
16
15
Ordering Information
10
11
12
13
14
GND
RT9246A
ADJ
IOUT
ICOMMON
IMAX
Package Type
C : TSSOP-28
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
TSSOP-28
Note :
RichTek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
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RT9246A
Typical Application Circuit
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RT9246A
Functional Pin Description
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4),
VID0 (Pin 5)
SS (Pin 12)
Connect this SS pin to GND with a capacitor to set the
soft-start time interval and to smooth VCORE transient at
VID Jump.
DAC voltage identification inputs for K8. These pins are
internally pulled to 2.2V if left open.
NC (Pin 6, Pin 20, Pin 24)
RT (Pin 13)
No Input Connection
Switching frequency setting. Connect this pin toGNDwith
a resistor to set the frequency.
FBRTN (Pin 7)
VOSS (Pin 14)
VCORE differential sense return.
VCORE initial value offset. Connect this pin to GND with a
resistor to set the offset value.
FB (Pin 8)
Inverting input of the internal error amplifier.
IMAX (Pin 15)
COMP (Pin 9)
Over-Current protection set.
Output of the error amplifier and input of the PWM
comparator.
ICOMMON (Pin 16)
Common negative input of current sense amplifiers for all
three channels.
PGOOD (Pin 10)
Power good open-drain output.
IOUT (Pin 17)
DVD (Pin 11)
Output current indication pin. The current through IOUT
pin is proportional to the output current.
Programmable power UVLO detection or converter enable
input.
ADJ (Pin 18)
Current sense output for active droop adjust. Connect a
resistor from this pin to GND to set the load droop.
Oscillator Ferquency vs. RRT
700
600
500
400
300
200
100
0
GND (Pin 19)
IC ground.
ISP1 (Pin 23), ISP2 (Pin 22), ISP3 (Pin 21)
Current sense positive input pins for individual converter
channel current sensing.
PWM1 (Pin 27), PWM2 (Pin 26), PWM3 (Pin 25)
PWM outputs for each driven channel. Connect these pins
to the PWM input of the MOSFET driver. For systems
which use 2 channels, connect PWM3 high.
0
10
20
30
40
50
60
70
RRT (kΩ)
VCC (Pin 28)
IC power supply. Connect this pin to a 5V supply.
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RT9246A
Function Block Diagram
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RT9246A
Table 1. Output Voltage Program
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Nominal Output Voltage DACOUT
1.550
1.525
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.200
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
Shutdown
Note: (1) 0 : Connected to GND
(2) 1 : Open
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RT9246A
Absolute Maximum Ratings (Note 1)
z Supply Voltage, VCC ------------------------------------------------------------------------------------------- 7V
z Input, Output or I/O Voltage ---------------------------------------------------------------------------------- GND-0.3V to VCC+0.3V
z Power Dissipation, PD @ TA = 25°C
TSSOP-28 ------------------------------------------------------------------------------------------------------ 1W
z Package Thermal Resistance (Note 4)
TSSOP-28, θJA -------------------------------------------------------------------------------------------------- 100°C/W
z Junction Temperature ------------------------------------------------------------------------------------------ 150°C
z Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------- 260°C
z Storage Temperature Range --------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ----------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 3)
z Supply Voltage, VCC ------------------------------------------------------------------------------------------- 5V 10%
z Ambient Temperature Range--------------------------------------------------------------------------------- 0°C to 70°C
z Junction Temperature Range--------------------------------------------------------------------------------- 0°C to 125°C
Electrical Characteristics
(VCC = 5V, TA = 25°C, unless otherwise specified)
Parameter
Supply Current
Symbol
Test Conditions
Min
Typ
Max
Units
V
CC
Nominal Supply Current
Power-On Reset
POR Threshold
Hysteresis
PWM 1,2,3 Open
--
12
--
mA
I
CC
4.0
0.2
0.9
--
4.2
0.5
1.0
60
4.5
--
V
V
V
V
V
V
V
CC
Rising
CCRTH
CCHYS
DVDTH
DVDHYS
Input High
Input Low
Enable
1.1
--
V
V
DVD
Threshold
mV
Oscillator
Free Running Frequency
Frequency Adjustable Range
Ramp Amplitude
170
50
--
200
--
230
400
--
kHz
kHz
V
f
R
R
= 20kΩ
OSC
RT
f
OSC_ADJ
1.9
1.0
66
ΔV
= 20kΩ
OSC
RT
Ramp Valley
--
--
V
V
RV
Maximum On-Time of Each Channel
RT Pin Voltage
62
0.9
75
1.1
%
1.0
V
V
R
RT
= 20kΩ
≥ 1V
RT
Reference and DAC
--
--
--
--
+1
+10
0.8
--
%
mV
V
−1
−10
--
V
V
DAC
DACOUT Voltage Accuracy
ΔV
DAC
< 1V
DAC
DAC (VID0-VID4) Input Low
DAC (VID0-VID4) Input High
ΔV
ΔV
ILDAC
1.2
V
IHDAC
To be continued
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RT9246A
Parameter
DAC (VID0-VID4) Pull-up Voltage
DAC (VID0-VID4) Pull-up Resistance
VOSS Pin Voltage
Symbol
Test Conditions
Min
2.0
10
Typ
2.2
13
Max
2.4
16
Units
V
kΩ
V
0.9
1.0
1.1
RVOSS = 100kΩ
V
VOSS
Error Amplifier
DC Gain
--
--
--
65
10
8
--
--
--
dB
Gain-Bandwidth Product
Slew Rate
GBW
SR
MHz
V/μs
C
= 10pF
COMP
Current Sense GM Amplifier
ICOMMON Full Scale Source Current
ICOMMON Current for OCP
Protection
100
150
--
--
--
--
μA
μA
IMAX Voltage
0.84
340
0.94
400
1.05
450
V
V
R
= 10k
IMAX
IMAX
mV
Over-Voltage Trip (V - V
)
Δ
R
= 0
ADJ
FB
DAC
OVT
Power Good
Output Low Voltage
--
--
0.2
V
V
I
= 4mA
PGOODL
PGOOD
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
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RT9246A
Typical Operating Characteristics
Duty Ratio vs. VCOMP
Power On
70
RRT = 16kΩ
IOUT = 3A
60
50
40
30
20
10
0
VCC
(5V/Div)
SS
(2V/Div)
VOUT
(1V/Div)
PGOOD
(5V/Div)
0.5
1
1.5
2
2.5
3
3.5
Time (25ms/Div)
VCOMP (V)
Power Off
Start Up
IOUT = 3A
VCC
(5V/Div)
PWM
(5V/Div)
SS
(2V/Div)
SS
(2V/Div)
VOUT
(1V/Div)
COMP
(1V/Div)
PGOOD
(5V/Div)
VCORE
(1V/Div)
Time (25ms/Div)
Time (10ms/Div)
VID Jump
OVP
UnitGain
FB
(2V/Div)
SS
(2V/Div)
VCORE
(100mV/Div)
PWM
(2V/Div)
SS
(500mV/Div)
Time (5ms/Div)
Time (5ms/Div)
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RT9246A
Applications Information
output with 1~2ms delay. An SS capacitor about 47nF is
recommend for typical application.
VCC POR and DVD ready
RT9246A is a multi-phase DC/DC controller specifically
designed to deliver high quality power for next generation
CPU. Phase currents are sensed by innovative time-
sharingDCR current sensing technique for channel current
balance, droop tuning, and over current protection. Using
one commonGM amplifier for current sensing eliminates
offset errors and linearity variation betweenGMs.As sub-
milli-ohm-grade inductors are widely used in modern
mother boards, slight mismatch of GM amplifiers offset
and linearity results in considerable current shift between
phases. The time-sharingDCR current sensing technique
is extremely important to guarantee phase current balance
at mass production.
SS
VCORE
PGOOD
VID Jump
1~2ms
1~2ms
1~2ms
Figure 1. TimmingDiagramDuring Soft Start Interval
Voltage Control
CPU VCORE voltage is Kelvin sensed by FB and FBRTN
pins and precisely regulated to VID_DAC output by internal
high gain Error Amplifier (EA). The sensed signal is also
used for power good and over voltage function. The typical
OVP trip point is 400mV above VID_DAC output. RT9246A
pulls PWM outputs low and latches up upon OVP trip to
prevent CPU from damaging. It can only restart by resetting
either VCC or DVD pin.
Converter Initialization, Phase Selection, and
Power Good Function
The RT9246A initiates only after two pins are ready: VCC
pin power on reset (POR) and DVD pin is higher than 1V.
VCC POR is to make sure RT9246A is powered by a
voltage for normal work. The rising threshold voltage of
VCC POR is 4.2V typically.At VCC POR, RT9246Achecks
PWM3 status to determine phase number of operation.
Pull high PWM3 for two-phase operation. The unused
current sense pin should be connected to GND or left
floating.
The VID pins are internally pulled high to internal 2.2V
with 13kΩ resistors and are easily interfaced with CPU
VIDoutputs. The change of VID_DAC output at VIDJump
is also smoothed by capacitor connected to SS pin.
Consequently, VCORE shifts to its new position smoothly.
DVDis to make sure thatATX12V is ready for companion
MOSFET drivers(RT960X series) to work normally.
Connect a voltage divider from ATX12V to DVD pin as
shown in the Typical Application Circuit. Make sure that
DVDpin voltage is below its threshold voltage before drivers
are ready and above its threshold voltage for minimum
ATX12V during normal operation.
DCR Current Sensing
RT9246Aadopts an innovative time-sharingDCR current
sensing technique to sense the phase currents for phase
current balance (phase thermal balance) and load line
regulation as shown in Figure 2. Current sensing amplifier
GM samples and holds voltages VX across the current
sensing capacitor CX by turns in a switching cycle.
According to the Basic Circuit Theory, if
If either one of VCC andDVDis not ready, RT9246Akeeps
its PWM outputs high impedance and the companion
drivers turn off both upper and lower MOSFETs.After VCC
and DVD are ready, RT9246A initiates its soft start cycle
as shown in Figure 1.Atime-variant internal current source
charges the capacitor connected to SS pin. SS voltage
ramps up piecewise linearly and locks VID_DAC output
with a specified voltage drop. Consequently, VCORE is built
up according to VID_DAC output. PGOOD output is
tripped to high impedance when VCORE reaches VID_DAC
L
X
= R
X
x C
X
then V = ILX x RLX
X
RLX
Consequently, the sensing current IX is proportional to
inductor current ILX and is expressed as :
I
LX x RLX
IX =
RCOMM
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RT9246A
L
X
R
I
LX
LX
R
C
+
X
X
-
V
X
V
CORE
+
T1
+
-
S/H CKT
T2
Ix
T3
T1
T4
R
COMM
Figure 2
The sensed current IX is used for current balance and droop
tuning as described as followed. Since all phases share
one common GM, GM offset and linearity variation effect
is eliminated in practical applications. As sub-milli-ohm-
grade inductors are widely used in modern mother boards,
slight mismatch ofGM amplifiers offset and linearity results
in considerable current shift between phases. The time-
sharing DCR current sensing technical is extremely
important to guarantee phase current balance at mass
production.
Over Current Protection
RT9246A uses an external resistor RIMAX connected to
IMAX pin to generate a reference current IIMAX for over
current protection:
V
IMAX
IMAX
I
IMAX=
R
where VIMAX is 1.0V typical. OCP comparator compares
each sensed phase current IX with this reference current
as shown in Figure 3. Equivalently, the maximum phase
current is calculated as:
Phase Current Balance
3 VIMAX
R
COMM
The sampled and held phase current IX are summed and
I
LX(MAX)=
2 RIMAX
R
LX
averaged to get the averaged current
. Each phase
I
X
current IX then is compared with the averaged current.
OCP Comparator
The difference between IX and is injected to
I
X
1/3 I
+
-
X
corresponding PWM comparator. If phase current IX is
smaller than the averaged current , RT9246A increases
the duty cycle of corresponding phase to increase the
phase current accordingly, vice versa.
1/2 I
IMAX
Figure 3. Over Current Comparator
RT9246A uses hiccup mode to eliminate nuisance
detection of OCP or reduce output current when output is
shorted to ground as shown in Figure 4 and 5.
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DS9246A-04 March 2007
RT9246A
where Nis the phase number of operation.
Over Current Protection
The averaged current is also injected into the resistor
I
X
RIOUT connected to IOUT pin for monitoring load current.
Voltage at IOUT pin VIOUT is proportional to load current
and is calculated as:
(5V/Div)
PWM
(10A/Div)
(2V/Div)
8 x ICORE x RADJ x RLX
VIOUT = 8IX x RIOUT =
ICORE
VSS
N x RCOMM
Error
Amp.
R
FB1
(500mV/Div)
V
-
CORE
VCORE
I
VOSS 4
+
Time (5ms/Div)
V
ADJ
8IX
DAC
Figure 4. The Over Current Protection in the soft start
interval
R
ADJ
Figure 6. Load Line and Offset Function
Over Current Protection
Output Voltage Offset Function
RT9246A provides programmable initial offset function.
External resistor RVOSS and voltage source at VOSS pin
(5A/Div)
V
VOSS
I
VOSS
=
generate offset current
ICORE
R
VOSS
, where VVOSS is 1V typical. One quarter of IVOSS flows
through RFB1 as shown in Figure 6. Error amplifier would
hold the inverting pin equal to VDAC − VADJ. A constant
offset voltage is consequently added to VDAC − VADJ as :
(1V/Div)
VSS
RFB1
VCORE = VDAC − VADJ +
4 x RVOSS
Time (2.5ms/Div)
Figure 5. Over Current Protection at steady state
Current Ratio Setting
Droop and Load Line Setting
Current ratio adjustment is possible as described below.
It is important for achieving thermal balance in practical
application where thermal conditions between phases are
not identical. Figure 7 shows the application circuit ofGM
for current ratio requirement. According to Basic Circuit
Theory, if
RT9246A injects averaged phase current I
resistor RADJ connected to ADJ pin to generate a load-
X
into the
current-dependent voltage VADJ for droop setting:
VADJ = 8IX RADJ
VADJ is then subtracted form VID_DAC output as the real
reference voltage at non-inverting input of the error amplifier
as shown if Figure 6. Consequently, load line slope is
calculated as:
L
X
= (RSX // RPX) x C
X
then
R
LX
R
PX
VX =
x ILX x RLX
R
SX+RPX
ΔVCORE 8 x RADJ x RLX
LoadLine =
=
ΔICORE
N x RCOMM
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RT9246A
Phase Current Balance
With other phase kept unchanged, this phase would share
(RPX+RSX)/RPX times current than other phases. Figure 8
and 9 show different current ratio setting for the power
stage when Phase 3 is programmed 2 times current than
other phases. Figure 10 and 11 compare the above current
ratio setting results.
40
35
30
25
20
15
10
5
L
X
R
I
LX
LX
V
R
X
SX
+
-
C
X
0
R
0
15
30
45
60
75
PX
V
ICORE (A)
Figure 10
CORE
+
T
Current Ratio Function
35
30
25
20
15
10
5
Figure 7
0
Figure 8. Phase 3 Setting for current ratio function
0
15
30
45
60
75
IOUT (A)
Figure 11
Dead Zone Elimination
RT9246A samples and holds inductor valley current by
time-sharing sourcing a current IX to RCOMM. At light load
condition when averaged inductor current is smaller than
half of peak-to-peak inductor ripple current, voltage VX
across the sensing capacitor is negative at valley. It needs
a negative IX to sense the voltage. However, RT9246A
CANNOT provide a negative IX and consequently cannot
sense negative valley inductor current. This results in dead
zone of load line performance as shown in Figure 12.
Therefore a technique as shown in Figure 13 is required
to eliminate the dead zone of load line at light load
condition.
Figure 9. Phase 1~2 Setting for current ratio function
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RT9246A
RCOMM = 330Ω, RADJ = 160Ω, VOUT = 1.300V
Load Line without dead zone at light loads
1.31
1.3V
RCSN
-5A ×1mΩ
330Ω
≥
1.3
1.29
1.28
1.27
1.26
1.25
1.24
1.23
w/o Dead Zone Compensation
RCSN open
RCSN ≤ 85.8kΩ
Choose RCSN = 82kΩ
Figure 12 shows that dead zone of load line at light load
is eliminated by applying this technique.
RCSN = 82k
w/i Dead Zone Compensation
Error Amplifier Characteristic
For fast response of converter to meet stringent output
current transient response, RT9246Aprovides large slew
rate capability and high gain-bandwidth performance.
0
5
10
15
20
25
IOUT (A)
Figure 12
EA Falling Slew Rate
LX
R
LX
I
LX
R
X
C
X
V
OUT
+
-
V
VFB
X
500mV/Div)
+
-
R
(2V/Div)
COMM
GMx
Ix
R
CSN
VCOMP
Figure13. Application circuit of GM
Referring to Figure 13, IX is expressed as:
Time (250ns/Div)
Figure 14. EA Rising Transient with 10pF Loading; Slew
Rate=8V/us
V
OUT
CSN
I
LX_V x RLX
ILX_V x RLX
(1)
I
X
=
+
+
R
RCSN
RCOMM
EA Rising Slew Rate
I
where LX_V is the valley of inductor current. To make sure
RT9246A could sense the valley current, right hand side
of Equation (1) should always be positive:
VFB
(500mV/Div)
V
OUT
CSN
I
LX_V x RLX
ILX_V x RLX
+
+
≥ 0
(2)
R
RCSN
RCOMM
Since RCSN >> RCOMM in practical application, Equation (2)
could be simplified as:
V
R
OUT
CSN
ILX_V x RLX
VCOMP
≥
(2V/Div)
R
COMM
Time (250ns/Div)
For example, assuming the negative inductor valley current
is −5A at no load, then for
Figure 15. EA Falling Transient with 10pF Loading;
Slew Rate=8V/us
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13
RT9246A
4.7k
EA
4.7k
B
-
A
+
V
REF
Figure 16. Gain-Bandwidth Measurement by signal Adivided by signal B
Design Procedure Suggestion
a.Output filter pole and zero (Inductor, output capacitor
value & ESR).
DCR = 1mΩ of inductor at 25°C
L = 1.5μH
b.Error amplifier compensation & sawtooth wave amp-
litude (compensation network).
COUT = 8000μF with 5mΩ equivalent ESR.
1. Compensation Setting
Current Loop Setting
a. ModulatorGain, Pole and Zero:
a.GM amplifier S/H current (current sense component
DCR, ISPX and ICOMMONpin external resistor value).
From the following formula:
Modulator Gain =VIN/VRAMP =12/1.9 = 6.3 (i.e 16dB)
where VRAMP : ramp amplitude of saw-tooth wave
LC Filter Pole = 1.45kHz and
b.Over-current protection trip point (RIMAX resistor).
VRM Load Line Setting
a.Droop amplitude (ADJ pin resistor).
ESR Zero =3.98kHz
b.No load offset (RCSN
)
b. EA Compensation Network:
c.DAC offset voltage setting (VOSS pin and compensation
network resistor RB1)
Select R1 = 4.7k, R2 = 15k, C1 = 12nF, C2 = 68pF
and use the Type 2 compensation scheme shown in
Figure 17. By calculation, the FZ = 0.88kHz,
FP = 322kHz and Middle Band Gain is 3.19 (i.e
10.07dB).
Power Sequence & SS
DVD pin external resistor and SS pin capacitor.
PCB Layout
C2 68pF
a.Sense for current sense GM amplifier input.
C1
b.Refer to layout guide for other items.
RB2
15k
-
12nF
RB1
4.7k
Voltage Loop Setting
Design Example
EA
+
Figure 17. Type 2 compensation network of EA
Given:
Apply for four phase converter
VIN = 12V
VCORE = 1.5V
ILOAD(MAX) = 100A
VDROOP = 100mV at full load (1mΩ Load Line)
OCP trip point set at 35A for each channel (S/H)
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14
DS9246A-04 March 2007
RT9246A
Layout Guide
Place the high-power switching components first, and separate them from sensitive nodes.
1. Most critical path:
The current sense circuit is the most sensitive part of the converter. The current sense resistors tied to ISP1,2,3 and
ICOMMONshould be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCB
trace of sense nodes should be parallel and as short as possible. R&C filter of choke should place close to PWM and
the R & C connect directly to the pin of each output choke, use 10 mil differencial pair, and 20 mil gap to other phase
pair. Less via as possible.
2. Switching ripple current path:
a. Input capacitor to high side MOSFET.
b. Low side MOSFET to output capacitor.
c. The return path of input and output capacitor.
d. Separate the power and signalGND.
e. The switching nodes (the connection node of high/low side MOSFET and inductor) is the most noisy points.Keep
them away from sensitive small-signal node.
f . Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via.
3. MOSFET driver should be closed to MOSFET.
L1
SW1
V
V
OUT
IN
R
IN
C
OUT
R
L
C
IN
V
L2
SW2
Figure 18. Power Stage Ripple Current Path
DS9246A-04 March 2007
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15
RT9246A
Outline Dimension
D
L
E
E1
e
A2
A
A1
b
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
0.850
0.050
0.800
0.178
9.601
1.200
0.152
1.050
0.305
9.804
0.033
0.002
0.031
0.007
0.378
0.047
0.006
0.041
0.012
0.386
D
e
0.650
0.026
E
6.300
4.293
0.450
6.500
4.496
0.762
0.248
0.169
0.018
0.256
0.177
0.030
E1
L
28-Lead TSSOP Plastic Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
www.richtek.com
16
DS9246A-04 March 2007
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