EL4543IUZ [ROCHESTER]
TRIPLE LINE DRIVER, PDSO24, ROHS COMPLIANT, PLASTIC, QSOP-24;![EL4543IUZ](http://pdffile.icpdf.com/pdf2/p00286/img/icpdf/EL4543IUZ_1722799_icpdf.jpg)
型号: | EL4543IUZ |
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描述: | TRIPLE LINE DRIVER, PDSO24, ROHS COMPLIANT, PLASTIC, QSOP-24 驱动 光电二极管 接口集成电路 驱动器 |
文件: | 总19页 (文件大小:1225K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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EL4543
®
Data Sheet
September 13, 2007
FN7325.11
Triple Differential Twisted-Pair Driver with
Common-Mode Sync Encoding
Features
• Fully differential inputs, outputs, and feedback
• 350MHz -3dB bandwidth
The EL4543 is a high bandwidth triple differential amplifier
with integrated encoding of video sync signals. The inputs
are suitable for handling high speed video or other
communications signals in either single-ended or differential
form, and the common-mode input range extends all the way
to the negative rail enabling ground-referenced signalling in
single supply applications. The high bandwidth enables
differential signalling onto standard twisted-pair or coax with
very low harmonic distortion, while internal feedback
ensures balanced gain and phase at the outputs reducing
radiated EMI and harmonics.
• 1200V/µs slew rate
• -75dB distortion at 5MHz
• Single 5V to 12V operation
• 50mA minimum output current
• Low power - 36mA total typical supply current
• Pb-free available (RoHS compliant)
Applications
Embedded logic encodes standard video horizontal and
vertical sync signals onto the common mode of the twisted
pair(s), transmitting this additional information without the
requirement for additional buffers or transmission lines. The
EL4543 enables significant system cost savings when
compared with discrete line driver alternatives.
• Twisted-pair drivers
• Differential line drivers
• VGA over twisted-pair
• Transmission of analog signals in a noisy environment
The EL4543 is available in both a 24 Ld QSOP package and
a 20 Ld QFN package and is specified for operation over the
-40°C to +85°C temperature range.
Ordering Information
PART
PART
PKG.
DWG. #
NUMBER
MARKING
PACKAGE
24 Ld QSOP
24 Ld QSOP
24 Ld QSOP
TABLE 1. SYNC SIGNAL ENCODING
EL4543IU
EL4543IU
EL4543IU
EL4543IU
MDP0040
MDP0040
MDP0040
MDP0040
COMMON
MODE A
(RED)
COMMON
MODE B
(GREEN)
COMMON
MODE C
(BLUE)
EL4543IU-T7**
EL4543IU-T13**
H
V
EL4543IUZ
(See Note)
EL4543IUZ 24 Ld QSOP
(Pb-free)
Low
Low
High
High
High
Low
Low
High
3.0
2.5
2.0
2.5
2.0
3.0
3.0
2.0
2.5
2.0
2.5
3.0
EL4543IUZ-T7**
(See Note)
EL4543IUZ 24 Ld QSOP
(Pb-free)
MDP0040
MDP0040
EL4543IUZ-T13**
(See Note)
EL4543IUZ 24 Ld QSOP
(Pb-free)
EL4543IL
4543IL
4543IL
4543IL
4543ILZ
20 Ld 4x4 QFN* L20.4x4B
20 Ld 4x4 QFN* L20.4x4B
20 Ld 4x4 QFN* L20.4x4B
EL4543IL-T7**
EL4543IL-T13**
TABLE 2. INPUT LOGIC THRESHOLD (+5V SUPPLY)
V
, max
0.8V
2V
LO
EL4543ILZ
(See Note)
20 Ld 4x4 QFN* L20.4x4B
(Pb-free)
V
, min
HI
EL4543ILZ-T7**
(See Note)
4543ILZ
4543ILZ
20 Ld 4x4 QFN* L20.4x4B
(Pb-free)
EL4543ILZ-T13**
(See Note)
20 Ld 4x4 QFN* L20.4x4B
(Pb-free)
*20 Ld 4x4 QFN, exposed pad 2.7 x 2.7mm is connected to V -
S
**Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2007. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
EL4543
Pinouts
EL4543
(24 LD QSOP)
TOP VIEW
EL4543
(20 LD QFN)
TOP VIEW
EN
VINA+
VINA-
NC
1
2
3
4
5
6
7
8
9
24 VOUTA+
23 VOUTA-
22 NC
+
-
VSYNC
HSYNC
NC
1
2
3
4
5
15 VS+
21 VS+
14 VS-
VSYNC
HSYNC
NC
20 VS-
THERMAL
PAD
13 NC
19 NC
12 VOUTB+
11 VOUTB-
VINB+
VINB-
18 VOUTB+
17 VOUTB-
16 NC
+
-
VINB+
VINB-
NC 10
VINC+ 11
VINC- 12
15 VOUTC+
14 VOUTC-
13 NC
+
-
FN7325.11
September 13, 2007
2
EL4543
Absolute Maximum Ratings (T = +25°C)
A
Supply Voltage (V + & V -). . . . . . . . . . . . . . . . . . . . . . . . . . . .+12V
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
S
S
Maximum Output Continuous Current . . . . . . . . . . . . . . . . . . ±70mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+135°C
V
V
+, V . . . . . . . . . . . . . . . V - + 0.8V (min) to V + - 0.8V (max)
IN
IN
INB S S
- - V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±5V
INB
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = 0V, T = +25°C, V = 0V, R = 150Ω, unless otherwise specified.
S
S
A
IN
L
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 1)
TYP
(Note 1) UNIT
AC PERFORMANCE
BW (-3dB)
SR
-3dB Bandwidth
Differential Slew Rate
V
= 2V
350
1000
13.6
700
-70
MHz
V/µs
ns
OUT
P-P
R
= 200Ω
600
L
T
Settling Time to 0.1%
Gain Bandwidth Product
2nd Harmonic Distortion
3rd Harmonic Distortion
STL
GBW
HD2
HD3
dP
MHz
dBc
dBc
°
f = 20MHz, R = 200Ω
L
f = 20MHz, R = 200Ω
-70
L
Differential Phase @ 3.58MHz
Differential Gain @ 3.58MHz
0.01
0.01
dG
%
INPUT CHARACTERISTICS
V
Input Referred Offset Voltage
-10
-30
2
-15
180
4
10
mV
µA
kΩ
pF
OS
I
Input Bias Current (V +, V +)
-10
IN
IN IN
Z
Differential Input Impedance
Input Capacitance
IN
C
Capacitance between any single input pin
and the power supplies
IN
V
V
Differential Input Range
±0.75
V
V
DIFF
CM
Input Common Mode Voltage Range
V + = +5V, V - = 0V.
0
2.3
S
S
See Figure 7 for higher supply voltages.
V
Input Referred Voltage Noise
Input Common Mode Rejection Ratio
Threshold
27
80
nV/√Hz
N
CMRR
EN
V
= 0 to 2V
60
dB
V
CM
1.4
OUTPUT CHARACTERISTICS
I
Output Peak Current
40
60
12
mA
pF
OUT
C
Output Capacitance (Disabled)
Capacitance between any single output pin
and the power supplies when disabled
OUT
DC PERFORMANCE
Voltage Gain
SUPPLY CHARACTERISTICS
A
V
= 0.8V
P-P
1.82
1.96
2.05
V/V
V
IN
V
Supply Operating Range
V + to V -
5
12
V
SUPPLY
S
S
I
Power Supply Current (per Channel)
Power Supply Rejection Ratio
12.3
70
14.5
80
16.2
mA
dB
S
PSRR
NOTE:
1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
FN7325.11
September 13, 2007
3
EL4543
Pin Descriptions
QFN
QSOP
PIN NUMBER PIN NUMBER
PIN NAME
PIN DESCRIPTION
EQUIVALENT CIRCUIT
EN
18
1
EN
Disables video inputs and outputs
V
SM
CIRCUIT 1
19
20
2
3
VINA+
VINA-
NC
Non-inventing input
Inverting input
3, 8, 13
4, 7, 10, 13,
16, 19, 22
Not connected
1
5
VSYNC
Vertical sync logic input
SYNC
V
SM
CIRCUIT 2
2
4
6
HSYNC
VINB+
Horizontal sync logic input
Non-inverting input
Inverting input
Reference Circuit 2
8
5
9
VINB-
6
11
12
14
15
17
18
20
VINC+
VINC-
Non-inverting input
Inverting input
7
9
VOUTC-
VOUTC+
VOUTB-
VOUTB+
VS-
Inverting output
10
11
12
Non-inverting output
Inverting output
Non-inverting output
Negative supply
14, Thermal
Pad
15
16
17
21
23
24
VS+
Positive supply
VOUTA-
VOUTA+
Non-inverting output
Inverting output
FN7325.11
September 13, 2007
4
EL4543
Typical Performance Curves
-42
-46
-50
-54
-58
-62
BALANCE ERROR =
20 LOG(Δ ,CM/Δ ,DIFF)
VO VO
BLUE CM
OUT (CH C)
GREEN CM
OUT (CH B)
RED CM
OUT (CH A)
V
SYNC
H
SYNC
100k
1M
10M
100M
TIME (0.5ms/DIV)
FREQUENCY (Hz)
FIGURE 1. COMMON MODE OUTPUT
FIGURE 2. BALANCE ERROR
4
2
4
2
R
= 200Ω
C
= 0pF
L
L
R
= 500Ω
L
22pF
12pF
8.2pF
R
= 200Ω
L
0
0
2.2pF
R
= 100Ω
L
-2
-4
-6
-2
-4
-6
R
= 50Ω
L
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY RESPONSE (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 4. DIFFFERENTIAL FREQUENCY RESPONSE FOR
FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE FOR
VARIOUS C - DIFF
VARIOUS R - DIFF
L
L
4
0
R
C
= 100Ω
= 2.2pF
12pF
R
= 200Ω
L
L
L
8.2pF
4.7pF
2
0
20
40
2.2pF
-2
-4
-6
60
80
100
100k
100k
1M
10M
100M
1G
1M
10M
100M
1G
FREQUENCY RESPONSE (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 6. CMRR
FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE FOR
VARIOUS C - DIFF
L
FN7325.11
September 13, 2007
5
EL4543
Typical Performance Curves (Continued)
12
10
8
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
SWITCH
6
4
2
0
5
6
7
8
9
10
11
12
5
6
7
8
9
10
11
12
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 7. COMMON MODE INPUT RANGE vs SUPPLY
VOLTAGE
FIGURE 8. H
& V
THRESHOLD vs SUPPLY VOLTAGE
SYNC
SYNC
0
-20
45
40
35
30
25
20
15
10
5
-40
-60
-80
R
9
= 200Ω
L
-100
0
0
1
2
3
4
5
6
7
8
10 11 12
0
10k
100k
1M
10M
100M
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
FIGURE 9. PSRR vs FREQUENCY
FIGURE 10. I
vs V
SUPPLY SUPPLY
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
212ns
2.5V
ENABLE
OUTPUT
SIGNAL
5
6
7
8
9
10
11
12
TIME (200ns/DIV)
SUPPLY VOLTAGE (V)
FIGURE 11. ENABLE DISABLE vs SUPPLY VOLTAGE
FIGURE 12. ENABLE RESPONSE
FN7325.11
September 13, 2007
6
EL4543
Typical Performance Curves (Continued)
R
C
= 200Ω DIFF
= 0pF
L
L
ENABLE
2.5V
900ns
RISE
FALL
Δt = 2.5ns
Δt = 1.94ns
OUTPUT
SIGNAL
TIME (200ns/DIV)
TIME (20ns/DIV)
FIGURE 13. DISABLE RESPONSE
FIGURE 14. DIFFERENTIAL SMALL SIGNAL TRANSIENT
RESPONSE
9
LOGIC H
= 0V
R
C
= 200Ω DIFF
= 0pF
SYNC
= 0V
L
L
8
7
6
5
4
3
2
1
0
V
SYNC
RISE
FALL
Δt = 2.81ns
Δt = 2.31ns
5
6
7
8
9
10
11
12
TIME (20ns/DIV)
SUPPLY VOLTAGE (V)
FIGURE 15. DIFFERENTIAL LARGE SIGNAL TRANSIENT
RESPONSE
FIGURE 16. COMMON MODE DC LEVEL vs SUPPLY
VOLTAGE
9
9
LOGIC H
= 0V
LOGIC H
= 3V
SYNC
= 3V
SYNC
= 0V
8
7
6
5
4
3
2
1
0
8
7
6
5
4
3
2
1
0
V
V
SYNC
SYNC
5
6
7
8
9
10
11
12
5
6
7
8
9
10
11
12
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 17. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
FIGURE 18. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
FN7325.11
September 13, 2007
7
EL4543
Typical Performance Curves (Continued)
9
50
40
30
20
10
0
LOGIC H
= 3V
A = +2
V
SYNC
= 3V
8
7
6
5
4
3
2
1
0
V
SYNC
5
6
7
8
9
10
11
12
10k
100k
1M
10M
100M
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
FIGURE 19. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
FIGURE 20. OUTPUT IMPEDANCE
1M
0
-20
R
= 200Ω DIFF
L
CHAN A, B, C
100k
10k
1k
-40
-60
100
10
-80
1
10k
-100
100k
100k
1M
10M
100M
1M
10M
FREQUENCY (Hz)
100M
400M
FREQUENCY (Hz)
FIGURE 21. OUTPUT IMPEDANCE [DISABLED]
FIGURE 22. CHANNEL ISOLATION vs FREQUENCY
10k
1k
5
3
1
-1
-3
V
= 200mV
OP-P
100
10
V
= 2V
OP-P
1
-5
100k
5
6
7
8
9
10
12
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 23. INPUT VOLTAGE AND CURRENT NOISE
FIGURE 24. FREQUENCY RESPONSE vs OUTPUT AMPLITUDE
FN7325.11
September 13, 2007
8
EL4543
Typical Performance Curves (Continued)
FIGURE 26. GAIN vs FREQUENCY - 2 CHANNELS
FIGURE 28. PHASE vs FREQUENCY - 2 CHANNELS
FIGURE 30. PHASE vs FREQUENCY - 2 CHANNELS
FIGURE 25. GAIN vs FREQUENCY - 2 CHANNELS
FIGURE 27. GAIN vs FREQUENCY - 2 CHANNELS
FIGURE 29. PHASE vs FREQUENCY - 2 CHANNELS
FN7325.11
September 13, 2007
9
EL4543
Typical Performance Curves (Continued)
FIGURE 31. HARMONIC DISTORTION
FIGURE 32. HARMONIC DISTORTION
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.4
1.136W
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 34. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 33. HARMONIC DISTORTION
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
JEDEC JESD51-3 AND SEMI G42-88 (SINGLE
LAYER) TEST BOARD
CONDUCTIVITY TEST BOARD
0.8
1.2
667mW
0.7
1
870mW
0.6
0.5
0.4
0.3
0.2
0.1
0
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7325.11
September 13, 2007
10
EL4543
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
3
2.5
2
2.500W
1.5
1
0.5
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
differential output signals, decoded and transmitted along
with the RGB video signals to the video monitor.
Operational Description and Application
Information
Introduction
The EL4543 is designed to differentially drive composite
RGB video signals onto twisted pair lines, while
EN
+
+
+
INA
OUTA
simultaneously encoding horizontal and vertical sync signals
as common mode output. The entire video signal plus sync
can therefore be transmitted on 3 twisted pairs of wire. When
utilizing CAT5 cable, the 4th available twisted pair can be
used for transmission of audio, data or control information.
The distribution of composite video over standard CAT5
cable enables enormous cost and labor savings compared
with traditional coaxial cable, when considering both the
relative low price and ease of pulling CAT5 cable.
-
-
-
V
REF
EN
+
-
+
+
INB
OUTB
V
H
SYNC
SYNC
EN
-
-
RCM
GCM
BCM
V
REF
LOGIC
DECODING
EN
+
+
+
Functional Description
INC
OUTC
-
-
-
The EL4543 provides three fully differential high-speed
amplifiers, suitable for driving high-resolution composite
video signals onto twisted pair or standard coaxial cable.
The input common-mode range extends to the negative rail,
allowing simple ground-referenced input termination to be
used with a single supply. The amplifiers provide a fixed gain
of +2 to compensate for standard video cable termination
V
REF
FIGURE 38. BLOCK DIAGRAM EL4543
Sync Transmission
The EL4543 encodes H
and V
SYNC
signals on the
SYNC
common mode output of the differential video signals; Red,
Green and Blue respectively. Data Sheet Figures 16, 17 and
18 clearly illustrate that the sum of the common mode
voltages results in a fixed average DC level with no AC
content and illustrates the logic levels. This eliminates EMI
radiation into any common mode signal along the twisted
pairs of CAT5 cable.
schemes. Horizontal and Vertical sync signals (H
and
SYNC
V
) are passed to an internal Logic Encoding Block to
SYNC
encode the sync information as three discrete signals of
different voltage levels. Generally, in differential amplifiers an
external V
pin is used to control the common mode level
REF
of the differential output; in the case of the EL4543 the V
REF
of each of the three internal amplifier channels receives a
signal from the Logic Encoding Block with encoded H
SYNC
information. The final output consists of three
and V
SYNC
fully differential video signals, with sync encoded on the
common mode of each of the three RGB differential signals.
H
and V
SYNC
can easily be separated from the
SYNC
FN7325.11
September 13, 2007
11
EL4543
EL9110's common mode output pin, decodes and transmits
and V to the output device.
Extract Common Mode Sync and Decode H
SYNC
H
and V
SYNC
SYNC
SYNC
H
and V can be regenerated from the Common
SYNC
SYNC
Sync Transmission
Mode sync output voltages. The relationships between
, V and the 3 common mode levels are given by
The EL4543 encodes H
and V signals onto the
SYNC
SYNC
H
SYNC SYNC
common mode output of the differential video signals; Red,
Green and Blue respectively. Data Sheet Figure 8 clearly
illustrates that the sum of the common mode voltages results
in a fixed DC level with no AC content; thus eliminating EMI
interference.
Table 1. The common mode levels are easily separated from
the differential outputs of the EL4543 using this simple
resistor network at the cable receiver input of each
differential channel; see Figure 39.
Twisted Pair Termination
Output Drive Protection
The schematic in Figure 39 illustrates a termination scheme for
50Ω series termination and a 100Ω twisted pair cable. Note
RCM is the common mode termination to allow measurement
The EL4543 has internal short circuit protection set typically
at 60mA. if the output is shorted for extended periods of time
the increased power dissipation will eventually destroy the
part. To realize maximum reliability the output current should
never exceed 60mA. The 50Ω series back load matching
resistor provides additional protection.
of V
and should not be too small since it loads the EL4543; a
CM
little over a 100Ω is recommended for RCM.
TYPICAL EL4543 TERMINATION DRIVER
+
TWISTED
PAIR
50Ω
50Ω
Supply Voltage
50Ω
+
-
V
CM
While the EL4543 can be operated on ±5V split rails, single
supply 0V to 5V is the most common usage. It is very
important to note that the input logic thresholds are relative
to the negative supply pin, and therefore single supply,
ground referenced logic will not work when driving the
EL4543 on split rails. The amplifiers have an input common
mode range from 0V to 2.3V with a 0V to 5V supply,
50Ω
Z
=100Ω
O
120Ω
-
(RCM: SHOULD BE >100Ω)
(FOR LOADING
CONSIDERATIONS)
V
REF
FIGURE 39. TWISTED PAIR TERMINATION EL4543
Video Transmission
increasing with supply voltage (see Figure 7). The common
mode output DC level range is a linear function of the power
supply (see Figures 16, 17, 18, and 19). The common mode
input switching threshold as well as the Enable/Disable input
is a linear function of the supply voltage (see Figures 8 and
11). In the event that the EL4543 is to be used with ±5V split
rails then the input sync signals need to be voltage offset
before they are input to the EL4543. The circuit configuration
depicted in Figure 40 provides for the proper level shift.
The EL4543 is a twisted pair differential line driver directed at
the transmission of Video Signals through cables up to 100
feet; however, as signal losses increase with transmission line
length the EL4543 will need additional support to equalize
video signals along longer twisted pair transmission lines. A
full solution to accomplish this is the SXGA Video
Transmission System presented in the EL4543 Data Sheet.
Note the inclusion of the EL9110 for signal equalization of up
to 1000ft of CAT5 cable and common mode extraction; see
Data Sheet for additional information on the EL9110.
KST2907A
EL4543
HSYN Pin
Horizontal Sync in
Long Distance Video Transmission
4.30k
The SXGA Video Transmission System makes it possible to
transmit Red, Green and Blue (RGB) video plus sync up to
1000 feet through CAT5 cable. The input to the SXGA Video
Transmission System is the output of a video source
2.70k
-5V
KST2907A
EL4543
VSYN Pin
transmitting RGB video signals plus sync. The signals are
received initially by the EL4543; which converts the single
ended input RGB signals to three fully differential waveforms
with sync encoded on the discrete common modes of each
color channel and then drives the signals through a length of
CAT5 cable. The signal is received by the EL9110, which
can provide 6-pole equalization for both high and low
frequency signal transmission line losses. Then the EL9110
converts the differential RGB video signals back into single
ended format while extracting the common mode component
for decoding. The single ended RGB signal is taken directly
from the output of the El9110 and is ready for the output
device. The Common Mode Decoder Circuit receives the
common mode signals directly from each of the three
Vertical Sync in
4.30k
2.70k
-5V
FIGURE 40. LEVEL SHIFTING SYNC SIGNALS FOR USE
WITH ±5V SPLIT RAILS
FN7325.11
September 13, 2007
12
EL4543
Having obtained the application's power dissipation, the
maximum junction temperature can be calculated:
Disable and Power Down
The EL4543 provides an enable disable function which
powers down, logic input high, in 900ns and powers up, logic
input low, in 212ns. Disabled the amplifiers supply current is
reduced to 1.8mA (Positive Supply) and 0mA (Negative
Supply). Note that Enable/Disable threshold is a linear
function of the supply voltage levels. The Enable/Disable
threshold voltage level is compatible with standard
T
= T
+ Θ × PD
MAX JA
(EQ. 2)
JMAX
where:
• T
is the maximum junction temperature (125°C)
is the maximum ambient operating temperature
JMAX
• T
MAX
TTL/CMOS and referenced to the lowest supply potential.
• PD is the power dissipation calculated above
Proper Layout Technique
• θ is the thermal resistance, junction to ambient, of the
application (package + PCB combination). Refer to the
Package Power Dissipation curves.
JA
A critical concern with any PCB layout is the establishment
of a “healthy” ground plane. It is imperative to provide
ground planes terminated close to inputs to minimize input
capacitance. Additionally, the ground plane can be
selectively removed from inputs to prevent load and supply
currents from flowing near the input nodes.
• Note:
For the QFN package, the thermal pad is internally
connected to VS- and may only be grounded in
applications where a single supply is used and VS- is
returned to ground. In applications where VS- is tied to a
negative voltage the thermal pad must also be connected
to the same negative voltage.
In general the following guidelines apply to all PCB layout:
• Keep all traces as short as possible.
• Keep power supply bypass components as close to the
chip as possible - extremely close.
See Technical Bulletin 389
(http://www.intersil.com/data/tb/TB389.pdf) for additional
QFN PCB layout information.
• Create a healthy ground with low impedance and
continuous ground pathways available to all grounded
components board-wide.
Application Circuit
• In high frequency applications on multi-level boards try to
keep one level of board with continuous ground plane and
minimum via cutouts - providing it is affordable.
Video Transmission Along CAT5 Cable
VGA input RGB plus sync is connected with 75Ω termination
to the inputs of the EL4543. Single-ended RGB video is
converted to differential mode signals with H
and
encoded on the common-mode of the three
• Provide extremely short loops from power pin to ground.
SYNC
V
SYNC
• If it is affordable, a ferrite bead is always of benefit to
isolate device from Power Supply noise and the rest of the
circuit from the noise of the device.
differential signals, respectively. The 50Ω output-terminated
EL4543 drives the differential RGB with sync encoded
common-mode to CAT5 twisted pair cables. Note this
system, without signal frequency equalization, will
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL4543 drive capability is ultimately limited by the rise in die
temperature brought about by internal power dissipation. For
satisfactorily transmit along up to 200ft of CAT5 twisted-pair.
For longer cable lengths, frequency and gain equalization to
compensate for signal degradation is recommended
(EL9110) and a delay line technology (EL9115) to adjust for
phase mismatch between signals at the receiving end.
reliable operation die temperature must be kept below T
JMAX
(125°C). It is necessary to calculate the power dissipation for
a given application prior to selecting package type. Power
dissipation may be calculated:
ΔV
⎛
⎞
⎟
⎠
O
-----------
PD = 3 × V × I
+ V ×
S
⎜
(EQ. 1)
S
SMAX
R
⎝
LD
where:
• V is the total power supply to the EL4543 (from V + to V -)
S
S
S
• I
= Maximum quiescent supply current per channel
SMAX
• ΔV = Maximum differential output voltage of the
O
application
• R = Differential load resistance
LD
• I
LOAD
= Load current
FN7325.11
September 13, 2007
13
EL4543 and EL9110 Sync Extraction
CAT1
CAT2
RJOUTA+
49.9
R32 75
1
2
EL4543 QSOP
24
23
22
21
20
19
18
17
16
15
14
13
EN
OUTA+
OUTA-
N.C.
Red Out Differential
RED
C34
INA+
INA-
N.C.
0.1uf
1
2
3
4
8
7
6
5
RJA+ 75
RJOUTA-
49.9
VS+
+VS
3
R31 75
_
1
2
GREEN
4
VS+
+VS
0.1uf
C35
3
4
5
_
5
VSYNC
HSYNC
N.C.
VS-
6
RVSYNC 1K
7
6
8
N.C.
RJOUTB+
49.9
9
1K
RHSYNC
VS-
RED
GREEN
10
11
12
13
14
15
1
C35a
200pF
7
OUTB+
OUTB-
N.C.
2
BLUE
3
Green Out Differential
EL8201IS
U3
4
R30
2K
8
R29
2K
INB+
INB-
5
RJOUTB-
49.9
6
RJB+ 75
RJC+ 75
7
9
8
INPUT
RJOUTC+
49.9
9
10
11
12
13
14
15
10
11
12
N.C.
OUTC+
OUTC-
N.C.
HSYNC
Blue Out Differential
VSYNC
INC+
INC-
BLUE
RJOUTC-
49.9
OUTPUT
UJ1
-VS
+VS
-VS
D10
DIODE
DIODE
D9
+VS
+VS
-VS
DIODE D12
DIODE D11
DIODE D2
DIODE D4
DIODE D1
+VS
-VS
D3
DIODE
-VS
+VS
D5
DIODE
DIODE D6
VCRTL
VadjBlu
+VS
-VS
C20
1uf
DIODE D7
D8
VadjRed
DIODE
VCRTL
VCRTL
C9
Green InDifferential
Red In Differential
Blue In Differential
R31
330
Rred4
3000
1uf
NL
C1
NL
NL
C12
C23
5
R14
GREEN
RED
Cmext
5
BLUE
R1
NL
R2
R15
49.9
NL
R26
49.9
NL
R27
51
51
49.9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
R16
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
51
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Ctrl-ref
Vctrl
Cmext
Vsp
Ctrl-ref
Vctrl
Cmext
Vsp
Ctrl-ref
Vctrl
R21
R10
R32
R6 1K
R30 1K
R32 1K
Vsp
Vinp
Enbl
Vspo
Vout
Vsmo
0V
Vinp
Enbl
Vspo
Vout
Vsmo
0V
Vinp
Enbl
Vspo
Vout
Vsmo
0V
R5
R29
49.9
R31
49.9
+VS
Vinm
Vsm
Cmout
Vgain
Logic-ref
Vinm
Vsm
Cmout
Vgain
Logic-ref
Vinm
Vsm
Cmout
Vgain
Logic-ref
+VS
49.9
51
0.1uf
C31
0.1uf
C32
C13
0.1uf
51
C24
51
C2 0.1uf
0.1uf
C33
R33
+VS
R11
1uf
R22
R3
49.9
R17
49.9
R28
49.9
NL
R4
X2
NL
R18
X2
NL
R29
X2
NL
C3
NL
C14
NL
C25
EL9110 BLUE C
EL9110 GREEN B
EL9110 RED A
R9
330
R20
330
R27
330
C17
0.1uf
C27
0.1uf
-VS
VGAN
VGAN
-VS
VGAN
-VS
INDUCTOR 1
5
INDUCTOR3
5
INDUCTOR 5
5
C5
1uf
C16
1uf
C26
1uf
C7
C18
1uf
C19
0.1uf
C28
C29
0.1uf
R12
R23
R28
1uf
1uf
C8
0.1uf
+VS
+VS
+VS
+VS
+VS
-VS
+VS
NL = Not Loaded
Inductor =Ferrite 68 Ohms
BANANA JACK
GND
+
R33
3.6K
C36
4.7uf
R34
3.6K
R35
3.6K
C37
0.1uF
R39
3.6K
BANANA JACK
-VS
+
C38
R36
1K Pot
C39
R40
1K Pot
R37
1K Pot
R38
1K Pot
4.7uf
VadjBlue
VGAN
VCRTL
0.1uF
VadjRed
BANANA JACK
EL4543
measure of cable prop delay skew compensation for slight
EL4543/EL5375/EL8201 CAT5 RGB + Sync
Video Transmission System
Introducing a low cost turn-key system for transmitting
component video over short to moderate CAT5 cable lengths
(1 to 500 feet) with selectable cable loss and skew
differences in cable lengths between CAT5 pairs. Cable
skew can best be done around the 300ft range by under
compensating the shortest color pair (color on the left side of
a vertical line) and over compensate the longest color pair
(color on the right side of a vertical line). Around 450ft only
the shortest color pair can be under compensated.
compensation. Using only 3 of the 4 pairs in standard CAT5
th
the 4 pair is available for audio, function control or data
The board for the driver and receiver should use strip lines
or strip line waveguides for the inputs and outputs of the
drivers and receivers. The 75Ω input and output strip lines
waveguide on 0.06 inch epoxy board with ground back plain
should be 0.016 inch wide with 0.01 inch space to ground
area around them. The differential pair strip line waveguides
should be two 0.045 inch 50Ω lines spaced 0.01 inch apart
and spaced 0.01 inch to ground area around them. This is a
general guide and size values may very for many reasons.
transmission; an additional benefit.
RGB video plus sync (5 channels) is received at the VGA
terminal and presented single ended to the EL4543. The
EL4543 converts single ended RGB into fully differential
signals on three twisted pairs. Sync is encoded on the three
RGB differential signals as differential common mode and
then drives the differential signals with encoded sync
through CAT5 cable. The common mode of the signals is
extracted from the differential signals with a passive network
of resistors and passed to the EL8201 for sync decoding.
The differential signal is passed directly to the EL5375 where
it is amplified, converted back into single ended format.
Signal attenuation occurs in all transmission lines as a
function of increasing cable length; this application system
utilizes individual channel 2-pole compensation for cable
lengths of 150, 300 and 500 feet. Additionally, the
The receiver feedback and gain resistor network which goes
directly to the minus input should be connected very close
with minimal trace length and minimal capacitance to
ground. The ground plane on the backside of the board, in
back of these resistors and the minus input pin should be
removed as well.
compensation network can be manipulated to provide some
FN7325.11
September 13, 2007
15
EL4543/EL5375/EL8201 CAT5 RGB + Sync Video Transmission System
Output +5V
R34
U2
Open
R35
1
24
23
22
21
R40
2K
REF1
NC
FB1
0
2
3
INP1
INN1
NC
R41
2K
C20
OUT1
NC
~4pF
R47
500
R48
1K
150 Feet Comp
300 Feet Comp
Output +5V
4
R36
Open
R12
57
R13
57
Output +5V
R53 10K
C7 C8
10p
R55 3.9K
C9
C5
0.1uF
R54
68K
R37
0
5
20
R56
33K
REF2
INP2
INN2
NC
VSP
VSN
NC
36p
68p
C10
22p
C6
0.1uF
6
19
R14
49.9
R43
2K
7
18Output -5V
Output +5V
R38
R21
1K
8
17
16
15
14
13
C2
FB2
0.1uF
Open
150 Feet Comp
R57 10K
300 Feet Comp
R59 3.9K
C13
68p
C21
~4pF
Compensation Control Switch
On Off
R39
R49
500
R50
1K
9
R44
2K
REF3
INP3
INN3
NC
OUT2
EN
0
R58
68K
1
2
3
4
5
6
12
11
10
9
8
7
C12
10p
C14
22p
R60
33K
C11
36p
10
11
12
FB3
R15
57
R16
57
SW DIP-6
OUT3
Red In
R6
R45
2K
49.9
R51
1K
R52
500
1
2
EL4543 QSOP
24
EN
OUTA+
OUTA-
N.C.
300 Feet Comp
150 Feet Comp
R63 10K
EL5375
R1
75
Red Out Differential
23
3.9K
R61
R64
68K
R17
49.9
INA+
INA-
N.C.
R62
33K
C15
68p
C18
10p
C16
22p
C17
36p
R7
49.9
C22
~4pF
3
22
21
20
19
18
R46
2K
1
2
R63
75
1
Input +5V
3
2
R22
4
C3
0.1uF
75
4
VS+
R64
3
1K
R65 75
5
4
C1
0.1uf
6
5
5
7
VSYNC
HSYNC
N.C.
VS-
6
8
R2
7
1K
9
8
6
10
11
12
13
14
15
N.C.
9
10
11
12
13
14
15
R3 1K
R8
49.9
7
OUTB+
OUTB-
N.C.
R66 75
R67 75
Green Out Differential
R18
55
R19
55
Green In
Blue In
8
17
INB+
INB-
R9
49.9
R4
75
INPUT
C19
0.1uF
9
16
OUTPUT
R10
1
2
3
4
8
R20
49.9
VS+
49.9
10
11
12
15
N.C.
OUTC+
OUTC-
N.C.
Blue Out Differential
Output +5V
14
7
6
5
_
INC+
INC-
R11
49.9
R5
75
C4
0.1uF
R23
1K
C4a
220pF
13
_
EL4543IU
VS-
U3
EL8201IS
Input +5V
+
Input -5V
JB1
JB2
-VS In
+VS In
Csup2
4.7uF
JP+
JUMPER
+
Ground
Csup1
JP-
JUMPER
JUMPER
4.7uF
JB3
GND
Output +5V
Output -5V
JB4
JB5
-VS Out
+VS Out
Csup4
4.7uF
+
Csup3
4.7uF
+
JB6
GND
OUTPUT
INPUT
EL4543
Package Outline Drawing
L20.4x4B
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 1, 11/06
4X
2.0
4.00
0.50
16X
A
6
B
16
20
PIN #1 INDEX AREA
6
PIN 1
INDEX AREA
1
15
2 .70 REF
11
5
(4X)
0.15
6
10
0.10 M
C
A B
4
20X 0.25 ± 0.02
20X 0.4 ± 0.05
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
C
0.10
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
SEATING PLANE
0.08 C
2. 70 )
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
( 20X 0 . 6)
5
C
0 . 2 REF
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
FN7325.11
September 13, 2007
17
EL4543
Quarter Size Outline Plastic Packages Family (QSOP)
A
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
A
A1
A2
b
0.068
0.006
0.056
0.010
0.008
0.193
0.236
0.154
0.025
0.025
0.041
16
0.068
0.006
0.056
0.010
0.008
0.341
0.236
0.154
0.025
0.025
0.041
24
0.068
0.006
0.056
0.010
0.008
0.390
0.236
0.154
0.025
0.025
0.041
28
Max.
±0.002
±0.004
±0.002
±0.001
±0.004
±0.008
±0.004
Basic
-
PIN #1
I.D. MARK
E
E1
-
-
-
1
(N/2)
c
-
B
D
1, 3
0.010 C A B
E
-
e
E1
e
2, 3
H
-
C
SEATING
L
±0.009
Basic
-
PLANE
L1
N
-
0.007 C A B
b
0.004 C
Reference
-
Rev. F 2/07
L1
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7325.11
September 13, 2007
18
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