FSTU16862QSPX [ROCHESTER]
CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 0.150 INCH, MO-154, QVSOP-48;型号: | FSTU16862QSPX |
厂家: | Rochester Electronics |
描述: | CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 0.150 INCH, MO-154, QVSOP-48 驱动 光电二极管 输出元件 逻辑集成电路 |
文件: | 总8页 (文件大小:1059K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 2002
Revised October 2006
FSTU16862
20-Bit Bus Switch with ꢀ2V Undershoot Protection
General Description
Features
The Fairchild Switch FSTU16862 provides 20-bits of high-
speed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ Undershoot hardened to 2V (A and B Ports)
■ 4 switch connection between two ports
■ Minimal propagation delay through the switch
■ Low lCC
■ Zero bounce in flow-through mode
The device is organized as a 20-bit bus switch. When OEX
is LOW, the switch is ON and Port A is connected to Port B.
■ Control inputs compatible with TTL level
When OEX is HIGH,
a high impedance state exists
■ See Application Note AN-5008 for details on
between the A and B Ports. The A and B Ports are pro-
tected against undershoot to support an extended range to
2.0V below ground. Fairchild's integrated Undershoot
Hardened Circuit (UHC® ) senses undershoot at the I/O
and responds by preventing voltage differentials from
developing and turning the switch on.
FSTU - Undershoot Protected Fairchild Switch Family
Ordering Code:
Package
Order Number
Package Description
Number
FSTU16862QSP
FSTU16862MTD
MQA48A
MTD48
48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC® is a registered trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500703
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Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
Description
OEx
A
Bus Switch Enables
Bus A
B
Bus B
Truth Table
Inputs
Inputs/Outputs
OEx
L
A, B
A
B
H
Z
H
L
Z
HIGH Voltage Level
LOW Voltage Level
High Impedance
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC
)
0.5V to 7.0V
2.0V to 7.0V
0.5V to 7.0V
50 mA
DC Switch Voltage (VS) (Note 2)
DC Input Voltage (VIN) (Note 3)
DC Input Diode Current (lIK) VIN 0V
Power Supply Operating (VCC)
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
Input Voltage (VIN
)
Output Voltage (VOUT
)
DC Output Current (IOUT
DC VCC/GND Current (ICC/IGND
Storage Temperature Range (TSTG
)
128 mA
Input Rise and Fall Time (tr, tf)
Switch Control Input
)
100 mA
0 ns/V to 5 ns/V
0 ns/V to DC
)
65 C to 150
C
Switch I/O
Free Air Operating Temperature (TA)
-40 C to 85 C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: V is the voltage observed/applied at either the A or B Ports across
S
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
V
T
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
Min
Typ
Max
(Note 5)
V
V
V
Clamp Diode Voltage
4.5
4.0–5.5
4.0–5.5
5.5
1.2
V
V
V
A
A
A
I
18 mA
IK
IH
IL
IN
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
2.0
0.8
1.0
10
1.0
7
I
0
V
5.5V
5.5V
A, B
0V, I
I
IN
0
V
0
IN
I
OFF-STATE Leakage Current
Switch On Resistance
(Note 6)
5.5
V
OZ
CC
R
4.5
4
4
V
V
V
V
V
64 mA
30 mA
ON
IN
IN
IN
IN
IN
IN
IN
4.5
7
0V, I
4.5
8
14
20
3
2.4V, I
2.4V, I
15 mA
15 mA
IN
IN
4.0
11
I
Quiescent Supply Current
5.5
A
V
or GND, I
OUT
0
CC
CC
I
Increase in I per Input
CC
5.5
2.5
mA
One Input at 3.4V
Other Inputs at V or GND
CC
(Note 7)
CC
V
Voltage Undershoot
5.5
2.0
V
0.0 mA
I
50 mA
IKU
IN
OE 5.5V
Note 5: Typical values are at V
5.0V and T
25 C
CC
A
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 7: Per TTL driven input, control pins only.
3
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AC Electrical Characteristics
T
40 C to 85 C,
50pF, RU RD 500
A
C
Figure
L
Symbol
Parameter
Units
Conditions
V
4.5 – 5.5V
V
4.0V
Max
Number
CC
CC
Min
Max
Min
t
t
, t
Propagation Delay Bus-to-Bus
(Note 8)
0.25
0.25
ns
ns
V
OPEN
7V for t
Figures
2, 3
PHL PLH
I
, t
Output Enable Time
1.0
1.0
5.9
6.9
6.4
V
Figures
2, 3
PZH PZL
I
PZL
V
OPEN for t
I
PZH
t
, t
Output Disable Time
7.4
ns
V
7V for t
PLZ
Figures
2, 3
PHZ PLZ
I
V
OPEN for t
I
PHZ
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 9)
Symbol
Parameter
Typ
Max
Units
Conditions
5.0V, V 0V
, OE 5.0V, V 0V
C
Control Pin Input Capacitance
3
pF
V
V
IN
CC
CC
IN
C
Input/Output Capacitance “OFF State”
6
pF
I/O
Note 9: T
IN
25 C, f 1 MHz, Capacitance is characterized but not tested.
A
Undershoot Characteristic (Note 10)
Symbol
Parameter
Min
Typ
- 0.3
OH
Max
Units
Conditions
V
Output Voltage During Undershoot
2.5
V
V
Figure 1
OUTU
Note 10: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (V ) Waveform
Parameter
Value
see Waveform
100K
Units
IN
V
V
IN
R
R
2
1
V
11.0
V
V
TRI
V
5.5
CC
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4
AC Loading and Waveforms
Note: Input driven by 50 source terminated in 50
Note: C includes load and stray capacitance
L
Note: Input PRR 1.0 MHz, t
500 ns
W
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
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Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
Package Number MQA48A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号:
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