ISL4260EIRZ [ROCHESTER]
DUAL LINE TRANSCEIVER, PQCC32, 5 X 5 MM, LEAD FREE, PLASTIC, MO-220VHHD2, QFN-32;
| 型号： | ISL4260EIRZ |
| 厂家： | 
Rochester Electronics |
| 描述： | DUAL LINE TRANSCEIVER, PQCC32, 5 X 5 MM, LEAD FREE, PLASTIC, MO-220VHHD2, QFN-32 驱动 接口集成电路 驱动器 |
| 文件： | 总12页 (文件大小：1024K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL4260E
®
Data Sheet
June 21, 2010
FN6035.2
QFN Packaged, ±15kV ESD Protected, +3V
to +5.5V, 150nA, 250kbps, RS-232
Transmitters/Receivers with Separate
Logic Supply
Features
• Available in Near Chip Scale QFN (5mmx5mm) Package
• V Pin for Compatibility with Mixed Voltage Systems
L
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Single SHDN Pin Disables Transmitters and Receivers
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
The ISL4260E contains 3.0V to 5.5V powered RS-232
transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
= 3.0V. Targeted
CC
applications are PDAs, Palmtops, and cell phones where the
low operational, and even lower standby, power
• On-Chip Charge Pumps Require Only Four External
0.1μF Capacitors
consumption is critical. Efficient on-chip charge pumps,
coupled with a manual powerdown function reduces the
standby supply current to a 150nA trickle. Tiny 5mm x 5mm
Quad Flat No-Lead (QFN) packaging, and the use of small,
low value capacitors ensure board space savings as well.
Data rates greater than 250kbps are guaranteed at worst
case load conditions.
• Receiver Hysteresis For Improved Noise Immunity
• Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 300μA
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . .150nA
• Pb-Free (RoHS Compliant)
The ISL4260E features a V pin that adjusts the logic pin
L
(see Pin Descriptions table) output levels and input
thresholds to values compatible with the V
external logic (e.g., a UART).
powering the
CC
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Digital Cameras
The single pin powerdown function (SHDN = 0) disables all
the receiver and transmitter outputs, while shutting down the
charge pump to minimize supply current drain.
Table 1 summarizes the features of the ISL4260E, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
- PDAs and PDA Cradles
- Cellular/Mobile Phones
Ordering Information
TEMP.
PART
NUMBER
PART
MARKING
RANGE
( C)
PKG.
o
PACKAGE DWG. #.
ISL4260EIRZ* ISL4260 EIRZ -40 to +85 32 Lead QFN L32.5x5B
(Note) (Pb-free)
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
TABLE 1. SUMMARY OF FEATURES
NO. OF NO.OF DATARATE Rx. ENABLE LOGIC
PART
NUMBER
V
MANUAL
AUTOMATIC
L
Tx.
Rx.
(kbps)
FUNCTION?
SUPPLY PIN?
POWER- DOWN? POWERDOWN FUNCTION?
ISL4260E
3
2
250
NO
YES
YES
NO
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2010. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL4260E
Pinout
ISL4260E
(32 LD QFN)
TOP VIEW
32 31 30 29 28 27 26 25
NC
C2+
C2-
V-
NC
T1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
OUT
T2
T3
OUT
OUT
PD
NC
R1
T1
IN
T2
IN
IN
R2
NC
NC
IN
NC
9
10 11 12 13 14 15 16
Pin Descriptions
PIN
FUNCTION
V
System power supply input (3.0V to 5.5V).
CC
V+
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection. This is also the potential of the thermal pad (PD).
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
V-
GND
C1+
C1-
C2+
C2-
T
TTL/CMOS compatible transmitter Inputs. The switching point is a function of the V voltage.
L
IN
T
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
OUT
R
IN
R
TTL/CMOS level receiver outputs. Swings between GND and V .
L
OUT
V
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply.
L
SHDN
Active low TTL/CMOS input to tri-state receiver and transmitter outputs and to shut down the on-board power supply to place device
in low power mode. The switching point is a function of the V voltage.
L
NC
PD
No Connection
Exposed Thermal Pad. Connect to GND.
2
ISL4260E
Typical Operating Circuit
+3.3V to +5V
C
+
0.1μF
27
29
30
4
C1+
1
V
CC
+
+
C
3
+
+
V+
V-
0.1μF
31
2
0.1μF
C1-
C
0.1μF
2
C2+
C
4
0.1μF
3
C2-
T
T
1
2
5
23
T1
T2
T3
T1
T2
T3
IN
IN
IN
OUT
OUT
OUT
22
21
6
T
3
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
10
R
1
19
18
13
12
R1
R1
R2
OUT
OUT
IN
IN
5kΩ
5kΩ
R
2
R2
V
L
15
+
LOGIC V
CC
0.1μF
28
V
CC
SHDN
GND
26
3
ISL4260E
Absolute Maximum Ratings
Thermal Information
V
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance (Typical, Notes 1, 2)
θ
(°C/W)
30
θ
JC
(°C/W)
2.2
CC
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
JA
L
32 Ld QFN Package. . . . . . . . . . . . . . .
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
Moisture Sensitivity (see Technical Brief TB363)
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
o
o
o
T
, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
IN
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
T
OUT
Operating Conditions
Temperature Range
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V +0.3V)
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
L
o
o
ISL4260EIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
T
OUT
ESD Rating . . . . . . . . . . . . See “ESD PERFORMANCE” on page 5
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379, and Tech Brief TB389.
2. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1μF, V = V ; Unless Otherwise Specified.
CC
1
4
L
CC
o
Typicals are at T = 25 C, V
= V = 3.3V
A
CC
L
TEMP
( C)
MIN
(Note 4)
MAX
(Note 4) UNITS
o
PARAMETER
DC CHARACTERISTICS
Supply Current, Powerdown
Supply Current
TEST CONDITIONS
TYP
SHDN = GND, All Inputs at V
CC
or GND
25
25
-
-
0.15
0.3
1
1
μA
All Outputs Unloaded, SHDN = V , V
CC CC
= 3.15V
mA
LOGIC AND TRANSMITTER INPUTS
Input Logic Threshold Low
T
T
, SHDN
, SHDN
V
V
V
V
V
V
= 3.3V or 5V
= 2.5V
Full
Full
Full
Full
Full
25
-
-
-
0.8
V
V
IN
IN
L
L
L
L
L
L
-
0.6
Input Logic Threshold High
= 5V
2.4
2.0
1.4
-
-
-
-
-
V
= 3.3V
V
= 2.5V
-
-
V
= 1.8V
0.9
0.5
±0.01
-
V
Transmitter Input Hysteresis
Input Leakage Current
RECEIVER OUTPUTS
Output Leakage Current
Output Voltage Low
25
-
-
V
T
, SHDN
Full
-
±1
μA
IN
V
= 0V or 3V to 5.5V, SHDN = GND
Full
Full
Full
-
-
±0.05
±10
0.4
-
μA
V
CC
OUT
OUT
I
I
= 1.6mA
= -1.0mA
-
Output Voltage High
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
V - 0.6 V - 0.1
V
L
L
Full
25
25
25
25
25
-25
-
25
-
V
V
V
V
V
V
V
V
V
V
= 5.0V
0.8
1.5
1.2
1.8
1.5
0.5
L
L
L
L
= 3.3V
= 5.0V
= 3.3V
0.6
-
Input Threshold High
Input Hysteresis
-
-
-
2.4
2.4
-
4
ISL4260E
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1μF, V = V ; Unless Otherwise Specified.
CC
1
4
L
CC
o
Typicals are at T = 25 C, V
= V = 3.3V (Continued)
A
CC
L
TEMP
( C)
MIN
(Note 4)
MAX
(Note 4) UNITS
o
PARAMETER
Input Resistance
TEST CONDITIONS
TYP
25
3
5
7
kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
Full
Full
Full
±5.0
±5.4
-
V
Ω
Output Resistance
V
= V+ = V- = 0V, Transmitter Output = ±2V
300
10M
-
CC
Shorted to GND
= ±12V, V
Output Short-Circuit Current
Output Leakage Current
TIMING CHARACTERISTICS
Maximum Data Rate
-
-
-
-
±60
±25
mA
μA
V
= 0V or 3V to 5.5V, SHDN = GND
CC
OUT
R = 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
25
25
25
25
25
25
25
25
250
500
0.15
0.15
200
200
100
100
50
-
-
kbps
μs
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
t
t
-
-
PHL
PLH
L
-
μs
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Output Enable Time
Transmitter Skew
-
-
ns
-
-
ns
From SHDN Rising Edge to T
= ±3.7V
-
-
μs
OUT
t
t
- t
PHL PLH
(Note 3)
-
-
ns
Receiver Skew
- t
PHL PLH
-
-
ns
Transition Region Slew Rate
R
= 3kΩ to 7kΩ,
C = 150pF to 1000pF
6
4
18
30
30
V/μs
V/μs
L
L
Measured From 3V to -3V or
C = 150pF to 2500pF
13
L
-3V to 3V, V
= 3.3V
CC
ESD PERFORMANCE
RS-232 Pins (T , R
OUT IN
)
Human Body Model
25
25
25
-
-
-
±15
±15
±8
-
-
-
kV
kV
kV
IEC61000-4-2 Air Gap Discharge
IEC61000-4-2 Contact Discharge
NOTE:
3. Transmitter skew is measured at the transmitter zero crossing points.
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
in Table 3. The charge pumps operate discontinuously (i.e.,
Detailed Description
they turn off as soon as the V+ and V- supplies are pumped
The ISL4260E operates from a single +3V to +5.5V supply,
up to the nominal values), resulting in significant power
guarantees a 250kbps minimum data rate, requires only four
small external 0.1μF capacitors, features low power
savings.
consumption, and meets all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Charge-Pump
Intersil’s new ISL4260E utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1μF capacitors for the
voltage doubler and inverter functions over the full V
range; other capacitor combinations can be used as shown
All devices guarantee a 250kbps data rate for full load
CC
conditions (3kΩ and 1000pF), V
CC
≥ 3.0V, with one
5
ISL4260E
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
required to exit powerdown, and resume transmission is less
than 100μs. Connect SHDN to V if the powerdown
CC
L
L
CC
transmitter easily operates at 1.25Mbps.
function isn’t needed.
The transmitter input threshold is set by the voltage applied
to the V pin. Transmitter inputs float if left unconnected
SHDN
I/O CHIP
L
PWR
MGT
LOGIC
(there are no pull-up resistors), and may cause I
CC
POWER SUPPLY
increases. Connect unused inputs to GND for the best
performance.
V
L
ISL4260E
TABLE 2. POWERDOWN TRUTH TABLE
V
CC
SHDN TRANSMITTER RECEIVER
INPUT
OUTPUTS
High-Z
OUTPUTS MODE OF OPERATION
L
High-Z
Active
Manual Powerdown
Normal Operation
H
Active
I/O
UART
CPU
Receivers
The ISL4260E contains standard inverting receivers that
convert RS-232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
(V
= 0V). The receivers’ Schmitt trigger input stage uses
CC
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions. Receiver outputs swing
V Logic Supply Input
L
from GND to V , and tristate in powerdown.
L
Unlike other RS-232 interface devices where the CMOS
V
L
outputs swing between 0 and V , the ISL4260E features a
CC
R
R
XIN
XOUT
separate logic supply input (V ; 1.8V to 5V, regardless of
L
GND ≤ V
≤ V
-25V ≤ V
≤ +25V
5kΩ
V
) that sets V for the receiver outputs. Connecting V
ROUT
L
RIN
CC
OH L
to a host logic supply lower than V , prevents the
GND
CC
ISL4260E outputs from forward biasing the input diodes of a
logic device powered by that lower supply. Connecting V to
FIGURE 1. RECEIVER CONNECTIONS
L
a logic supply greater than V
ensures that the receiver
CC
output levels are compatible even with the CMOS input V
IH
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
of AC, HC, and CD4000 devices. Note that the V supply
L
current increases to 100μA with V = 5V and V
= 3.3V
L
CC
even at V = 5.5V, during normal operation (not in
(see Figure 11). V also powers the transmitter and logic
CC
L
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ISL4260E in new designs.
inputs, thereby setting their switching thresholds to levels
compatible with the logic supply. This separate logic supply
pin allows a great deal of flexibility in interfacing to systems
with different logic supplies. If logic translation isn’t required,
connect V to the ISL4260E V
L
.
CC
Powerdown Functionality
Capacitor Selection
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 150nA, because the on-chip charge
The ISL4260E charge pumps only require 0.1μF capacitors
for the full operational voltage range. Table 3 lists other
acceptable capacitor values for various supply voltage
ranges. Do not use values smaller than those listed in
Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
reduces power consumption.
pump turns off (V+ collapses to V , V- collapses to GND),
CC
and the transmitter and receiver outputs tristate. This micro-
power mode makes these devices ideal for battery powered
and portable applications.
Software Controlled (Manual) Powerdown
The ISL4260E may be forced into its low power, standby
state via a simple shutdown (SHDN) pin (see Figure 2).
Driving this pin high enables normal operation, while driving
it low forces the IC into its powerdown state. The time
6
ISL4260E
loopback results for a single transmitter driving 1000pF and
TABLE 3. REQUIRED CAPACITOR VALUES
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
V
(V)
C
(μF)
C , C , C
CC
1
2
3
4
(μF)
V
CC
3.0 to 3.6
4.5 to 5.5
3.0 to 5.5
0.1
0.1
0.33
1
+
0.1μF
0.047
0.22
V
V
L
CC
V+
V-
+
C1+
C1-
C2+
C2-
+
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
C
1
2
C
3
4
ISL4260E
+
C
C
+
T
T
IN
OUT
1000pF
Power Supply Decoupling
R
IN
R
OUT
In most circumstances a 0.1μF bypass capacitor is
adequate. In applications that are particularly sensitive to
5k
power supply noise, decouple V
capacitor of the same value as the charge-pump capacitor C .
to ground with a
CC
SHDN
V
CC
1
Connect the bypass capacitor as close as possible to the IC.
FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT
Transmitter Outputs when Exiting
Powerdown
5V/DIV.
T1
Figure 3 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
IN
T1
OUT
OUT
5V/DIV
SHDN
R1
T1
V
= +3.3V
CC
C1 - C4 = 0.1μF
5μs/DIV.
FIGURE 5. LOOPBACK TEST AT 120kbps
2V/DIV
5V/DIV.
T1
T2
IN
V
= +3.3V
CC
C1 - C4 = 0.1μF
TIME (20μs/DIV.)
T1
OUT
OUT
FIGURE 3. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
High Data Rates
R1
The ISL4260E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 4
details a transmitter loopback test circuit, and Figure 5
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 6 shows the
V
= +3.3V
CC
C1 - C4 = 0.1μF
2μs/DIV.
FIGURE 6. LOOPBACK TEST AT 250kbps
7
ISL4260E
IEC61000-4-2 Testing
Interconnection with 3V and 5V Logic
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
Standard 3.3V powered RS-232 devices interface well with
3V and 5V powered TTL compatible logic families (e.g., ACT
and HCT), but the logic outputs (e.g., R
OUTS
) fail to reach
the V level of 5V powered CMOS families like HC, AC, and
IH
CD4000. The ISL4260E V supply pin solves this problem.
L
By connecting V to the same supply (1.8V to 5V) powering
L
the logic device, the ISL4260E logic outputs will swing from
GND to the logic V
.
CC
±15kV ESD Protection
All pins on the 3V interface devices include ESD protection
structures, but the ISL4260E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
8
ISL4260E
o
Typical Performance Curves V = 3.3V, T = 25 C
CC
A
6.0
30
25
20
15
10
5
V
+
OUT
4.0
2.0
0
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
+SLEW
-2.0
-4.0
-SLEW
V
-
OUT
-6.0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 7. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 8. SLEW RATE vs LOAD CAPACITANCE
45
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
NO LOAD
ALL OUTPUTS STATIC
40
250kbps
35
30
120kbps
25
20
20kbps
15
10
4000
5000
2000
3000
1000
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 9. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
10m
NO LOAD
ALL OUTPUTS STATIC
= 3.3V
1m
100μ
10μ
1μ
V
CC
V
≤ V
V > V
L CC
L
CC
100n
10n
1n
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
V
(V)
L
FIGURE 11. V SUPPLY CURRENT vs V VOLTAGE
L
L
9
ISL4260E
Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL (POWERED UP)
GND
TRANSISTOR COUNT
422
PROCESS
Si Gate CMOS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
ISL4260E
Package Outline Drawing
L32.5x5B
32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 3, 5/10
4X
3.5
0.50
5.00
28X
A
6
B
PIN #1 INDEX AREA
32
25
6
1
24
PIN 1
INDEX AREA
3 .30 ± 0 . 15
17
8
(4X)
0.15
9
16
0.10 M C A B
0.07
+
32X 0.40 ± 0.10
4
32X 0.23
- 0.05
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
C
0.10
C
0 . 90 ± 0.1
BASE PLANE
SEATING PLANE
0.08
C
( 4. 80 TYP )
(
( 28X 0 . 5 )
SIDE VIEW
3. 30 )
(32X 0 . 23 )
( 32X 0 . 60)
5
C
0 . 2 REF
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
11
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