S3049B [ROCHESTER]
Interface Circuit, DIE-42;
| 型号： | S3049B |
| 厂家： | 
Rochester Electronics |
| 描述： | Interface Circuit, DIE-42 接口集成电路 |
| 文件： | 总20页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
DEVICE
SPECIFICATION
S3049
2.5 GBPS LASER DRIVER
FEATURES
GENERAL DESCRIPTION
• 2.5 Gbps data rate
The S3049 has three main sections: a reference
generator, a high speed current modulation driver,
and a laser bias block with automatic power control.
• Automatic Laser Power Control
• Laser Bias Enable Input
The reference generator generates a temperature sta-
bilized reference voltage, VREF, which can be used to
program the bias and the modulation currents.
• Differential PECL Inputs
• Temperature Compensated Reference Voltage
• Laser Fault and Fail indicators
• Selectable on-chip Re-Clocking
• 60 mA Modulation Current, 90 mA Bias Current
• 32 Pin TQFP Package
The high-speed modulation driver can switch up to
60 mA swing through the laser. The CLKSEL pin can
be used to select whether or not to re-clock the input
data.
The laser bias block sets the bias current of the laser
and has an Automatic Power Control (APC) system,
which keeps the current through the laser constant by
monitoring the current through the monitor photo-diode.
APPLICATIONS
• WDM for SONET OC-48
• OC-48 Fiber optic modules
• OC-48 Line termination equipment
The APC loop is also used to detect excessive laser
power and low laser power. These conditions are
flagged on the LSFAULT and LSFAIL output pins
respectively.
Figure 1. Typical Operating Circuit
V
CC
V
V
CC
CC
VCC1
TD+
VCC2
LSFAIL
LSFAULT
TD-
IMODMON
IBIASMON
TDCLK+
TDCLK–
V
CC
CLKSEL
DISABLE
CDEL
IMOD+
PH DIODE
LASER
IMOD–
IBIAS
VEE
IPD
VEE
VEE
1
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Figure 2. Functional Block Diagram
+5V
IMOD+
TD+
TD-
DFF
+
MUX
IMOD–
IBIAS
CLKSEL
TDCLK+
TDCLK-
IMODMON
IBIASMON
LSFAIL
VNOM-VE
+
–
Shut
Down
Control
LSFAULT
+
VNOM +VE
–
Vnom
+
Ref Gen
Circuit
DISABLE
_
IPD
CAPC
CDEL
2
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Monitor Pins
DETAILED DESCRIPTION
Reference Generator
IBIAS and IMOD are mirrored and brought out on the
IBIASMON and IMODMON pins respectively. The
monitor currents are a specified fraction of the actual
currents and are converted to a voltage by connect-
ing the pins to VCC through a resistor.
The reference generator provides temperature com-
pensated reference voltage, VREF, which is used to
program the laser diode bias current, IBIAS , the
modulation current, IMOD, and the photo-diode refer-
ence current, IPD. The currents are set by connecting
a resistor between VREF and the respective current
source pin.
FAULT Detection
If the monitor photo-diode current increases beyond
the point which can be controlled by the APC loop,
the LSFAULT signal is asserted, indicating exces-
sive laser power (a FAULT condition). This condition
occurs when the voltage at the IPD node exceeds
VNOM by more than 400mv.
Laser Bias Block with Automatic Power
Control
The laser bias current, IBIAS, is set by connecting a
resistor between the IBSET pin and VREF. The cur-
rent through the resistor is amplified by a gain factor,
LSFAULT is also asserted if VREF is detected to ex-
ceed 3.8V, as this will generate excessively high
laser current.
A
IBSET, to generate IBIAS.
There is a feedback configuration to adjust the laser
bias current to maintain constant laser power as la-
ser efficiency changes with temperature and age.
Light produced by the laser diode produces an aver-
age current in the monitor photo-diode. This current
flows into the IPD pin. The IPSET current source,
whose current is set by the IPSET resistor, draws
current away from the IPD node. When the two cur-
rents are equal, the voltage at that node is set by the
nominal reference voltage, VNOM, of a differential am-
plifier. When the currents are not equal a voltage
change is generated across the capacitor, CAPC,
which the differential amplifier translates to a voltage
which generates a current through the IBCMP resis-
tor. This current is summed with current through the
IBSET resistor which adjusts IBIAS until the monitor
photo-diode current equals the nominal monitor
FAIL Detection
If the monitor photo-diode current decreases beyond
the point which can be controlled by the APC loop,
LSFAIL is asserted, indicating low laser power (FAIL
condition). This condition occurs when the voltage at
the IPD pin drops below VNOM by more than 400mv.
Laser Shutdown
If a FAULT or FAIL condition is detected the laser
bias and modulation currents will be turned off.
The laser can be enabled only by toggling the DIS-
ABLE input or by initiating a power-on cycle.
LSFAULT and LSFAIL will be reset on DISABLE de-
assert or VCC > 4.4V.
If the CDEL pin is grounded, the shutdown of the
laser currents on a FAULT or FAIL detection is dis-
abled, and LSFAIL or LSFAULT will de-assert when
the FAULT or FAIL condition no longer exists.
photo-diode current, IPD
.
Modulation Driver
The modulation driver consists of a high speed input
buffer and a differential output stage. The modula-
tion current, IMOD, is programmed by connecting a
resistor between the IMSET pin and VREF.
Start-up Sequence
The laser bias and modulation currents are turned
on within a time tON from when VCC exceeds 4.4V or
from when the DISABLE input is de-asserted. During
the period tDELAY, set by the capacitor CDEL, the
shutdown of the laser is disabled in order to allow
the APC loop time to settle. During this time if a
FAULT or FAIL condition is detected the laser will
not be shut down as it could be caused by the APC
loop transient state. CDEL should be chosen such
that tDELAY is much longer than the APC loop settling
time. LSFAULT and LSFAIL will not assert during
The current through the resistor is amplified by a
gain factor, AIMSET , to generate IMOD
.
If the CLKSEL input is set Low, the data input, TD+/
TD–, is clocked at the input by TDCLK to provide low
jitter. If CLKSEL is High, TD+/TD– will be passed
through to the modulation driver with no re-clocking.
tDELAY
.
3
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Table 1. Pin Assignment and Descriptions
Pin Name
TD+
Level
I/O
Pin #
Description
Diff.
I
10
Positive PECL Data Input.
PECL
TD-
Diff.
PECL
I
I
I
I
I
12
14
16
9
Negative PECL Data Input.
Positive clock input.
TDCLK+
TDCLK-
CLKSEL
DISABLE
CDEL
Diff.
PECL
Diff.
PECL
Negative clock input.
TTL
A Low selects re-clocking of TD+, TD-. A High will pass the data
through without re-clocking.
TTL
17
3
High level disables bias and modulation currents. If left open it
will default to a low state.
A capacitor to ground sets the time for tDELAY,, the time during which
laser shutdown is disabled after Disable is de-asserted or
VCC > 4.4V. If this pin is grounded, laser shutdown is disabled.
IMSET
IBSET
IPSET
IBCMP
24
23
6
A resistor to VREF sets the modulation current. (See Figure 7.)
A resistor to VREF sets the bias current. (See Figure 6.)
A resistor to VREF sets the monitor photo-diode reference current.
(See Figure 8.)
22
A resistor to IBSET pin sets the maximum APC loop compensation
bias current. (See Figure 9.)
IPD
Current
Current
I
2
Monitor photo-diode current input.
IMOD-
O
27
Secondary Laser Modulation Current output. When TD+ is High,
current is driven through this pin.
IMOD+
Current
O
29
Primary Laser Modulation Current output. When TD+ is Low,
current is driven through this pin.
4
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Table 1. Pin Assignment and Descriptions (Continued)
Pin Name
IBIAS
Level
I/O
Pin #
Description
Current
O
25
Laser Bias Current output.
LSFAULT
LSFAIL
IMODMON
IBIASMON
VREF
Open
Collector
O
O
O
O
O
8
7
Active High output. Asserts when excessively high laser power is
detected or VREF exceeds 3.8V.
Open
Collector
Active High output. Asserts when excessively low laser power is
detected.
Open
Collector
20
Modulation current monitor output. It can be used to monitor IMOD
by connecting it to VCC through a resistor.
Open
Collector
19
Bias current monitor output. It can be used to monitor IBIAS by
connecting it to VCC through a resistor.
5, 21
18
Temperature compensated reference.
Positve supply for low frequency circuitry.
Positve supply for high frequency circuitry.
Ground for low frequency circuitry.
VCC1
VCC2
31, 32
4
VEE1
VEE2
1, 28, 30 Ground for high frequency circuitry.
VEE3
26
Ground for IBIAS circuitry.
VEE4
11, 13, 15 Ground for high frequency input shield.
5
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Figure 3. 32 TQPF Package
BOTTOM VIEW
TOP VIEW
Thermal Management
Θja
Device
Max Power
S3049
0.64 W
70˚ C/W
6
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Figure 4. S3049 Pinout
IMSET
IBSET
IBCMP
VREF
IMODMON
IBIASMON
VCC1
VEE2
IPD
CDEL
VEE1
VREF
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
S3049
32 TQFP
Top View
IPSET
LSFAIL
LSFAULT
DISABLE
7
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Figure 5. Bonding Pad Location
2.15 mm
Y - Axis
31
30
29
28
27
26
25
24
23
22
VEE3
IMOD-
IMOD-
VEE2
32
33
21
20
TDCLK-
TDCLK-
VEE4
34
19
18
35
36
TDCLK+
TDCLK+
IMOD+
IMOD+
17
16
2.32 mm
37
38
VEE4
VEE2
VEE2
VCC2
15
14
TD-
TD-
39
40
13
VEE4
41
42
VCC2
VCC2
12
11
TD+
TD+
1
2
3
4
5
6
7
8
9
10
X - Axis
(0,0)
8
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Table 2. Pad Assignment and Description
Pin Name
Level
I/O
Pad #
Coordinates [X,Y] 1
Description
11
12
[1772.5, 247.375]
[1775.5, 419.375]
TD+
Diff. PECL
I
Positive PECL Data Input.
14
15
[1772.5, 763.375]
[1772.5, 935.375]
TD-
Diff. PECL
Diff. PECL
Diff. PECL
I
I
I
Negative PECL Data Input.
Positve Clock Input.
17
18
[1772.5, 1279.375]
[1772.5, 1451.375]
TDCLK+
TDCLK-
20
21
[1772.5, 1795.375]
[1772.5, 1967.375]
Negative Clock Input.
A Low selects re-clocking of TD+,
TD-. A High will pass the data
through without re-clocking.
CLKSEL
TTL
TTL
I
I
10
22
[1592.375, 45]
High level disables Bias and
Modulation currents. If left open it
will default to a low state.
DISABLE
[1592.625, 2170]
A capacitor ground sets the time for
t
DELAY, the time during which laser
shutdown is disabled after DISABLE
is de-asserted, or VCC > 4.4V. If this
pin is grounded, laser shutdown is
disabled.
CDEL
3
[388.375, 45]
A resistor to VREF sets the
Modulation current. (See Figure 7.)
IMSET
IBSET
30
29
[216.625, 2170]
[388.625, 2170]
A resistor to VREF sets the Bias
current. (See Figure 6.)
A resistor to VREF sets the monitor
photo-diode reference current. (See
Figure 8.)
IPSET
7
[1076.375, 45]
A resistor to IBSET pin sets the
maximum APC loop compensation
bias current. (See Figure 9.)
IBCMP
IPD
28
2
[560.625, 2170]
[216.375, 45]
Current
Current
I
Monitor photo-diode current input.
Secondary Laser Modulation
Current output. When TD+ is High,
current is driven through this pin.
33
34
[-180.5, 1795.625]
[-180.5, 1623.625]
IMOD-
O
Primary Laser Modulation Current
output. When TD+ is Low, current
is driven through this pin.
36
37
[-180.5, 1279.625]
[-180.5, 1107.625]
IMOD+
IBIAS
Current
Current
O
O
O
31
9
[44.625, 2170]
[1420.375, 45]
Laser Bias Current output.
Active High output. Asserts when
excessively high laser power is
detected or VREF exceeds 3.8V.
Open
Collector
LSFAULT
9
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Table 2. Pad Assignment and Description (Continued)
Pin Name
Level
I/O
Pad #
Coordinates [X,Y] 1
Description
Active High output. Asserts when
excessively low laser power is
detected.
Open
Collector
LSFAIL
O
8
[1248.375, 45]
Modulation current monitor output. It
can be used to monitor IM O D by
connecting it to VC C through a
resistor.
Open
Collector
IMODMON
IBIASMON
O
26
25
[904.625, 2170]
[1076.625, 2170]
Bias current monitor output. It can be
used to monitor IBIAS by connecting it
to VCC through a resistor.
Open
Collector
O
O
6
27
[904.375, 45]
[732.625, 2170]
Temperature compensated
reference.
VREF
VCC1
23
24
[1420.625, 2170]
[1248.625, 2170]
Positive supply for low frequency
circuitry.
40
41
42
[-180.5, 591.625]
[-180.5, 419.625]
[-180.5, 247.625]
Positive supply for high frequency
circuitry.
VCC2
VEE1
4
5
[560.375, 45]
[732.375, 45]
Ground for low frequency circuitry.
1
[44.375, 45]
35
38
39
[180.5, 1451.625]
[180.5, 935.625]
[180.5, 763.625]
VEE2
Ground for high frequency circuitry.
Ground for IBIAS circuitry.
VEE3
VEE4
Notes
32
[-180.5, 1967.625]
13
16
19
[1772.5, 591.375]
[1772.5, 1107.375]
[1772.5, 1623.375]
Ground for high frequency input
shield.
1. The coordinates represent the position of the center of the pad, in µm, with respect to the lower left corner of Pad 1.
2. Pad size: 90 x 90 µm.
10
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Table 3. Absolute Maximum Ratings
Parameter
Storage temperature range
Processing temperature
Min
Typ
Max Units
-55
+175
+400
+5.5
+5.5
VCC
˚ C
˚ C
V
Voltage on VCC with respect to GND
Voltage on any TTL input pin
Voltage on any PECL input pin
-0.5
-0.5
V
V
CC -2
V
ESD Sensitivity 1
300
V
1. Human body model.
Table 4. Power and References
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚ C for die)
Parameter
Description
Supply Current
Min
Typ
Max
Units
Conditions
ICC
76
mA
IMOD = 0, IBIAS = 0, RLOAD = 25
VREF
Reference Voltage
3.3
V
Table 5. Laser Modulation (RLOAD = 25Ω)
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚ C for die)
Parameter
Description
Min
Typ
Max
Units
Conditions
Range of programmable
Laser Modulation
Current
IMOD
1
60
mA
Modulation Current Rise
and Fall Time
I
MOD = 30mA, IBIAS = 50mA,
Tr, Tf
Fmax
150
40
ps
Gbps
ps
20% to 80%
Maximum Operating
Frequency
2.5
Modulation current
pulse width distortation
PWD
VIMSET
AIMSET
IMOD = 30mA, IBIAS = 50mA
TA = 25˚ C
IMSET Pin Voltage
1.5
32
IMOD Current Source
Gain
IMOD, IMOD- Pin
minimum voltage
requirement
VIMOD
VCC -2.5
V
Modulation current drift
over full voltage range
IMOD
V
T
4
4
%
%
Modulation current drift
over temperature
IMOD
IMODMON Pin
minimum voltage
requirement
VIMODMON
VCC -3
V
IMOD/
IMODMON
Ratio IMOD to IMODMON
32
11
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Table 6. Laser Bias
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚C for die)
Parameter
Description
Min
Typ
Max
Units
Conditions
Range of programmable
Laser Bias current
IBIAS
1
50
mA
VIBSET
AIBIAS
VIBIAS
VIBIASM
IBSET pin voltage
1.5
50
V
TA = 25˚ C
IBIAS Current Source gain
IBIAS pin minimum
voltage requirement
1
V
V
IBIASMON pin minimum
voltage requirement
VCC -3
IBIAS/
IBIASMON
Ratio IBIAS to IBIASMON
50
Table 7. Automatic Power Control
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚C for die)
Parameter
Description
Min
Typ
Max
Units
Conditions
VIPSET
IPSET Pin Voltage
1.5
V
TA = 25˚ C
AIPD
IPD Current Souce Gain
1
Range of monitor photo
diode current
IPD
20
40
900
µA
Maximum
Compensation Bias
current generated by
APC circuit (up or down)
IBCMP
mA
12
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Table 8. Power Initialization and Latched Shutdown
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚C for die)
Parameter
Description
Min
Typ
Max
Units
Conditions
Internal power turn-on
threshold
VCCION
4.4
V
Internal power turn-off
threshold
VCCIOFF
4.3
V
Programmable delay for
disabling laser
tDELAY
shutdown after
Vcc > 4.4V or Disable
deasserted
1
20
1
ms
Laser currrent turn on
delay from DISABLE
de-assert
tON
µS
µS
Minimum DISABLE
assert time (or power-off
time) required to
tRESET
100
CDEL = 0.1 µF.
discharge CDEL cap
Table 9. PECL and TTL Input/Outputs
(VCC-VEE = 5V±5%, TA = -40˚C to 85˚C, 25˚C for die)
Parameter
Description
Min
Typ
Max
Units
Conditions
Single-ended Input
Voltage Swing
VIN
250
1400
mv
(TD ±, TDCLK ±)
Differential Input
VCM
Common Mode range
(TD ±, TDCLK ±)
VCC -1.5
VCC -3
VCC -1.1
V
VIL
VIH
TTL Input Low Voltage
TTL Input High Voltage
VEE +0.8
V
V
Open Collector Outputs,
Low Voltage
10kΩ pull-up
OUT = 1 mA
VOC
0.5
V
I
TD+/TD- Setup time
w.r.t. clock
tSTD
tHTD
70
10
ps
ps
TD+/TD- Hold time w.r.t.
clock
13
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Resistor and Capacitor Values
The resistors and capacitors can be selected using the following plots and formula.
Figure 6. Bias Current vs. IBSET Resistor Value
I
vs. R
IBSET
BIAS
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
11
RIBSET (kΩ)
Figure 7. Modulation Current vs. IMSET Resistor Value
IMOD vs. RIMSET
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10 11 12
R
IMSET
(kΩ)
14
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Figure 8. Photo Diode Current vs. IPSET Resistor Value
I
vs. R
IPSET
PD
1.2
1
0.8
0.6
0.4
0.2
0
0
0.5
1
1.5 2.0 2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
R
IPSET
(kΩ)
Figure 9. APC Loop Compensation Bias Current vs. IBCMP Resistor Value
IBCOMP vs. RIBCMP
60
55
50
45
40
35
30
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
R
(kΩ)
IBCOMP
Programming tDELAY
tDELAY = (100kΩ) (CDEL
)
15
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Timing for Start Up Sequence
Figure 10. DISABLE Unasserted
V
> 4.4V
CC
LSFAULT
DISABLE
t
ON
LASER
CURRENTS
ENABLED
(TRANSMIT
DATA)
t
APC
APC LOOP
SETTLING
ENABLE
SHUTDOWN
t
DELAY
Figure 11. DISABLE Asserted
V
> 4.4V
CC
LSFAULT
DISABLE
LASER
CURRENTS
ENABLED
(TRANSMIT
DATA)
t
ON
t
APC
APC LOOP
SETTLING
ENABLE
SHUTDOWN
t
DELAY
16
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
APPLICATION INFORMATION
Power Dissipation Across Device
The power dissipation in the package must be kept below 640mW. Quiescent power is 399mW. Therefore,
power dissipation due to the laser currents must be kept below 240mW.
Connecting to the Input of S3049
The equivalent input circuit of S3049 is shown in Figure 12. Both DC biasing and 50 ohm line termination have
been implemented internally.
Figure 12. S3049 Equivalent Input Circuit for Data and Clock
VCC
VCC
1980Ω
1980Ω
CIN
V
+
IN
100Ω
CIN
V
-
IN
5140Ω
5140Ω
17
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Typical Operating Characteristics
Figure 13. Supply Current vs. Temperature, IMOD = 0, IBIAS = 0
Icc vs. Temp
62.00
60.00
58.00
56.00
54.00
52.00
50.00
-40
25
80
Temperature (C)
Figure 14. Modulation Current vs. Temperature
I
vs. Temp
MOD
10
9
8
7
6
5
4
3
2
1
0
-60
-40
-20
0
20
40
60
80
100
Temperature (C)
18
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
S3049
Figure 15. Eye Diagram, IMOD = 30mA, 2.5 Gbps, 223–1 Pattern
50 ps/DIV
19
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
Ordering Information
PREFIX
DEVICE
PACKAGE
A – 32 Pin TQFP
B – Die
S – Integrated Circuit
3049
XXXX
X
X
Prefix
Device Package
Applied Micro Circuits Corporation • 6290 Sequence Dr., San Diego, CA 92121
Phone: (858) 450-9333 • (800) 755-2622 • Fax: (858) 450-9885
http://www.amcc.com
AMCC reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and
advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied
on is current.
AMCC does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it convey
any license under its patent rights nor the rights of others.
AMCC reserves the right to ship devices of higher grade in place of those of lower grade.
AMCC SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR
USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
AMCC is a registered trademark of Applied Micro Circuits Corporation.
Copyright ® 1999 Applied Micro Circuits Corporation
20
July 27, 1999 / Revision C
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