BD18364EFV-M (新产品)

Datasheet

For Automotive Sequential Winker

8 ch Internal By-pass Switch LED Driver

BD18364EFV-M

General Description

Key Specifications

The BD18364EFV-M is a buck-boost LED driver with

built-in 8 ch By-pass switch. Sequential winker and

animation lamp light circuits are made possible in this

circuit. The By-pass switch can be controlled ON and OFF

individually by micro-controller communication. In By-

pass switch control, generating high current can be

prevented from the current limit circuit.

◼ Input Voltage Range:

5.5 V to 45.0 V

60 V

0.8 A

±3 %

1.5 V to 13.5 V

0.3 Ω (Typ)

◼ Maximum Voltage Output:

◼ Maximum LED Current

◼ LED Current Accuracy:

◼ LED Voltage/Channel

◼ By-pass Switch ON Resistance:

◼ Junction Temperature Range: -40 °C to +150 °C

Features

◼

AEC-Q100 Qualified^{(Note 1)}

Applications

Functional Safety Supportive Automotive Products

Buck-boost LED Driver (Boost to VIN)

Prevents High Current During LED Switching

8 ch By-pass Switch

DC Dimming (10 bit)

Over Voltage Protection (OVP)

By-pass Switch Independent PWM Dimming

UART Communication Interface (Supports CAN and

LIN)

◼ Automotive Exterior Lamps

◼ Sequential Winker

◼ Animation Lamps, etc.

Package

W (Typ) x D (Typ) x H (Max)

10.0 mm x 7.6 mm x 1.0 mm

HTSSOP-B30

◼

LED Abnormality Detection Function

Spread Spectrum Frequency Modulation (Variable)

8-bit A/D Converter

(Note 1) Grade 1

Typical Application Circuit

C_OUT

+B

D₁

C_OUT

L₁

R_IS

M₁

C_PIN

C_BOOT

R_BOOT

PGND

IS

GL

PSW

C_PSW

BOOT

VIN

PCLIM

SNSP

C_IN

R_SNS

R_EN1

R_EN2

C_DRV5

EN

SNSN

Q₁

VDRV5

PGATE

M₂

C_PGATE

R_ADIM

D₂

NTC

ADIM

RT

CH8

LED₇

R_RT

C_COMP

CH7

R_COMP

COMP

GND

MONIAD

FAULT_B

CH2

CH1

CH0

LED₁

LED₀

R_FLTB

LDO

5 V

CS

RX

TX

CAN/LIN

Transceiver

EXP-PAD

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.

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Pin Configuration

HTSSOP-B30

(TOP VIEW)

1

2

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

IS

GL

PGND

PSW

PCLIM

SNSP

SNSN

PGATE

CH8

3

BOOT

VIN

4

5

EN

6

VDRV5

ADIM

RT

7

8

CH7

9

COMP

GND

CH6

10

11

12

13

14

15

CH5

MONIAD

CH4

FAULT_B

CS

CH3

EXP-PAD

CH2

RX

CH1

TX

CH0

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Pin Descriptions

Pin No

Pin Name

Function

1

IS

GL

Inductor current sense input.

2

Output for N-ch MOSFET gate drive.

3

BOOT

VIN

Power supply voltage capacitor connection for switch drive.

Power supply voltage input.

4

5

EN

Enable input.

6

VDRV5

ADIM

RT

Capacitor connection for gate drive 5 V output.

Analog dimming input.

7

8

Resistance connection for switching frequency setting.

Phase compensation capacitor connection.

GND

9

COMP

GND

MONIAD

FAULT_B

CS

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

A/D input.

LED abnormality detection output (Open drain).

Chip select (Pull up to VDRV5 or Pull down to GND).

UART Interface

RX

TX

UART Interface

CH0

LED0 cathode connection.

CH1

LED0 anode and LED1 cathode connection.

LED1 anode and LED2 cathode connection.

LED2 anode and LED3 cathode connection.

LED3 anode and LED4 cathode connection.

LED4 anode and LED5 cathode connection.

LED5 anode and LED6 cathode connection.

LED6 anode and LED7 cathode connection.

LED7 anode connection.

CH2

CH3

CH4

CH5

CH6

CH7

CH8

PGATE

SNSN

SNSP

PCLIM

PSW

PGND

EXP-PAD

Current limit MOS drive output.

Current sense input (-).

Current sense input (+).

Current limit circuit power supply.

Power supply voltage capacitor connection for By-pass switch drive.

Power GND

Connect EXP-PAD to GND.

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Block Diagram

CURRENT

LIMIT

CURRENT

SENSE

DCDC

CLK

OVP

Driver

Slope

OCP

x4.5

234 mV

LEDOCL

REF

195 mV

DC dimming

DCREF1

DCREF2

ADIM

VIN

ERRAMP

DCDIM

DC/DC

BOOT

REG

VIN

PSW

CH8

VDRV5

Reference

Voltage

PSW

CH8

Internal

Power Supply

VDRV5

Internal

Regulator

LED

open/short

detection

LED open/short

ON/OFF

Level

shift

Gate

Drive

SW7

PWMDIM

UVLO/

TSD

CH7

CH2

EN

PSW

Internal

Power Supply

CH2

Internal

OSC

Control

Logic

LED

open/short

detection

LED open/short

ON/OFF

Level

shift

Gate

Drive

SW1

FAULT_B

MONIAD

PWMDIM

FAULT

PSW

CH1

Internal

Power Supply

A/D

converter

RX

TX

UART

I/O

LED

open/short

detection

LED open/short

ON/OFF

Level

shift

Gate

Drive

SW0

PWMDIM

CS

CH8

CH4

CH0

CH6

CH2

CHxSCP

CH0

LEDSW

GND

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Description of Blocks

1. Total Function

BD18364EFV-M is a buck-boost LED driver with built-in 8 ch By-pass switch. Individual ON and OFF control of LED is

possible and by this Sequential winker and Animation lamps are made possible. In the By-pass switch, one or two serial

connection of LED is possible. The By-pass switch can be set ON, OFF and PWM dimming by UART communication. LED

open detection and short detection functions are built in the By-pass switch. The LED driver is configured with Buck-boost

(Boost to VIN). Damages from high current in LED when rush current is generated from output capacitor when By-pass

switch switches from OFF to ON (light of LED turns OFF) can be suppressed by current limiting circuit.

2. LED Driver Section

2.1 LED Current Setting (CURRENT SENSE)

LED current can be set by resistor R_SNSthat is connected in between the SNSP pin and the SNSN pin.

푉

푅

푆푁푆

퐼_퐿퐸퐷

=

[A]

푆푁푆

2.2 Analog Dimming (DCDIM)

Analog Dimming can be set by DCDIM register (10-bit)

[

]

ꢀ

ꢄ퐶ꢄ퐼푀 9: 0

1

ꢁꢂꢁ

퐼_퐿퐸퐷

=

= (

× ꢀ_퐹ꢁ푅− 0.195 ꢀ) ×

ꢃ_ꢁꢂꢁ

1024

4.5 × ꢃ_ꢁꢂꢁ

Where:

ꢀ_퐹ꢁ푅is the internal ADC converter Full-Scale-Range Voltage 2.5 V (Typ).

2.3 Analog Dimming (ADIM)

With voltage input in the ADIM pin, analog dimming is made possible.

ꢀ

− 0.195 ꢀ

ꢁꢂꢁ

퐴퐷ꢅꢆ

퐼_퐿퐸퐷

=

ꢃ_ꢁꢂꢁ

4.5 × ꢃ_ꢁꢂꢁ

V_SNS

511.8 mV

25.6 mV

0 mV

V_FSR

2.5 V

0

V_ADIM

0.195 V

0 %

ΔV_ADIM

5 %

100 %

1024

DCDIM[9:0]

0

80 127

1023

Figure 1. Analog Dimming (DCDIM/ADIM) Setting

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2. LED Driver Section – continued

2.4 Input Voltage (VIN) Derating

When input voltage drops, output current can be dropped, depending on input voltage, to prevent increase in input

current. Derating starting voltage can be set in register.

resister setting start delating voltage

V_SNS

(OFF,) 6.92 V, 7.49 V, 8.02 V, 8.62 V, 9.17 V, 9.69 V

511.8 mV

(100 %)

341.8 mV

(66.8 %)

231.8 mV

(45.3 %)

0 mV

(0 %)

4.8 V 5.2 V

6.92 V

9.69 V VIN (V)

-43.3 mV

(offset)

Figure 2. Input Voltage Derating Setting

ADIM

VIN

minimum voltage

select

current sense

reference voltage

Resister setting

VINDIM

Resister setting

DCDIM

Figure 3. Analog Dimming Circuit

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2.4 Input Voltage (VIN) Derating – continued

The DCDIM pin, the ADIM pin and input voltage derating becomes as the circuit configuration such as shown in Figure

3. It will be as the current value that was set at the lowest.

For example, the V_SNSvoltage characteristics base on ADIM when current value was set to 50 % in the DCDIM is such

as shown in Figure 4.

V_SNS

511.8 mV

(100 %)

DCDIM[9:0] = 1023

256.2 mV

(50 %)

DCDIM[9:0] = 552

0 mV

(0 %)

V_ADIM(V)

Figure 4. Example of DCDIM and ADIM Dimming

2.5 DC/DC Switching Frequency (OSC)

The switching frequency can be set based on the formula below depending on the external resistor R_RT

.

ꢇꢇꢈꢈ

푓

표푠푐

≒

× 10³[kHz]

푅

ꢉ푇

2.6 Spread Spectrum Frequency Modulation (SSFM)

With built-in spread spectrum function to reduce DC/DC switching noise peak level. Frequency modulation range is

within ± 6 %. The modulation period is set from the register.

f_SW

f_SSFMW= f_SW± 6 %

f_SSFM

t

Figure 5. Spread Spectrum Frequency Modulation

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2. LED Driver Section – continued

2.7 Protection

2.7.1 Over Voltage Protection (DCDCOVP)

The DC/DC output voltage is monitored by the SNSP pin voltage. If the SNSP pin voltage becomes higher than

V_OVPvoltage, DC/DC will stop. The COMP pin is discharged until GND level voltage. The PMOS for current limit

turns OFF. The OVPDET of ERRDET register updates into 1. If the SNSP pin voltage becomes less than

V_{OVP_HYS}voltage, the DC/DC reboots. After rebooting, the OVPDET of ERRDET register will update to 0 after

t_OVP

.

Over Voltage Protection threshold can be set by UART communication as following.

[

]

ꢀ_푂푉푃= ꢊꢀꢋꢌꢍꢎ ꢏ: 0 × 2.18 + ꢏ4.8 [V]

V_OUT

SNSP

OVP

Figure 6. DCDCOVP

Error

Normal

V_OVP

V_OVP-V_OVPHYS

V_OUT( = SNSP )

OVPDET

GL

0

1

0

t_OVP

Figure 7. DCDCOVP Timing Chart (OVP)

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2.7 Protection – continued

2.7.2 CHx pin Short Circuit Protection (CHxSCP)

During the CH0 to CH8 pin ground, when V_OUTvoltage is higher than LED voltage, the current to be decided by

current limit circuit will flow. IC has built-in ground short protection circuit to prevent overheating of the PMOS

for current limitation. DC/DC stops when the CH0 to CH8 pin falls below V_SCPvoltage and t_SCPelapses. The

current limit PMOS turns off. SCPDET in the ERRDET register is updated to 1. When the CH0 to CH8 pin

becomes higher than the V_{SCP_HYS}voltage, and t_SCPRECelapses, DC/DC reboots. SCPDET of the ERRDET

register is updated to 0. Setting SCPEN of the SWRST register to 0, disables the ground fault protection function.

When each CH pin is grounded, be sure to insert a backflow prevention diode between CH0 and VIN to prevent

current from flowing through the parasitic diode of the By-pass switch inside the IC.

V_OUT

VIN

CH8

SW7

CH7

CHxSCP

CH2

SW1

CH2

SW1

CH1

SW0

CH1

SW0

CH0

Figure 8. CHxSCP

3. Current limit part

LED Current Limit Pch-FET Drive Circuit (CURLIM)

Damages from high current in LED when rush current is generated from output capacitor when By-pass switch switches

from OFF to ON (light of LED turns OFF) can be suppressed by current limit circuit. Rush current is limited by V_SNS

+

ΔV_{SNS_LIM}. To prevent overshoot brought by delayed current-limiting circuit, when the bypass switch is switched from off to

on (lighting off operation), the PMOS is first turned off for 50 µs (Typ), And the bypass switch is switched while the current

is limited by the PMOS.

ꢀ

ꢁꢂꢁ

+ 훥ꢀ

ꢁꢂꢁ_퐿ꢅꢆ

퐼_{퐿퐸퐷_퐿ꢅꢆ}

=

ꢃ_ꢁꢂꢁ

Refer to Table 20 (OCLIM Description) for ΔV_{SNS_LIM}

.

PCLIM

Gate Driving

for the PGATE

Driver

SNSP

VSNS

Slope

PWM Comp

x4.5

RSNS

COMP

Rail to Rail

current sense

CCOMP

195 mV

SNSN

CPGATE

M2

VDCDIM

DCDIM[9:0]

DCREF1

PGATE

234 mV

（default)

LEDOCL

REF

OCLIM[2:0]

COMP DISCHARGE

Figure 9. CURLIM

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Description of Blocks – continued

4. By-pass Switch Section

4.1 By-pass Switch On/Off Control

The 8 ch By-pass switch is built-in and used by connecting a LED between CHn and CHn+1 of each switch. If 1 is set

in register LEDEN, the By-pass switch turns OFF and the LED lights up with the configured duty. If set to 0, the By-pass

switch is on and the LED turns off. Each By-pass switch can be individually PWM dimmed and light depends on duty

set in register PWMDIM [n]. However, the PWM signal is output from the next PWM period with 1 set in LEDEN. Also,

if 1 is set in register LEDFC [n], By-pass switch is turned off and the LED lights up regardless of the duty set in PWMDIM

[n].

CHn+1

LEDEN

(register)

SWON

PWM

generator

PWM pulse

PWMDIM

(register)

CHn

main counter

LEDFC

(register)

Figure 10. By-pass Switch on-off Control

It is possible to connect two LEDs in series and control them at the same time. The number of wire harnesses can be

reduced. However, be careful in the design of the maximum output voltage.

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

SW7

SW6

SW5

SW4

SW3

SW2

SW1

SW0

SW7

SW6

SW5

SW4

SW3

SW2

SW1

SW0

Figure 11. Example of LED8 Light Connection

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4.1 By-pass Switch On/Off Control – continued

The LED current rising delay during PWM dimming by the bypass switch depends on the rising delay of the boosted

voltage of the DC/DC converter. Therefore, it is determined by the number of simultaneous LED lighting, LED current

setting and the COMP pin setting. The measured waveforms of the LED current rise delay for the number of

simultaneous LED lights, LED current setting, and the COMP pin setting are shown below.

The Number of Simultaneous LED Lights: 0 LED -> 1 LED, 2 LED, 4 LED, 8 LED (LED Vf 3.0 V)

VIN = 13 V, Ta = 25 °C, C_OUT= 12.5 µF, C_COMP= 0.22 µF, R_COMP= 470 Ω, R_SNS= 0.82 Ω, R_IS= 0.051 Ω

PWM frequency 200 Hz (50 % duty), COMPDIS [1:0] = 0

V_{SNS_100}(DCDIM [9:0] = 1023) Waveforms

LED current rising delay: 31 µs

V_{SNS_26}(DCDIM [9:0] = 325) Waveforms

LED current rising delay: 62 µs

PWM 1 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

LED current rising delay: 49 µs

LED current rising delay: 137 µs

PWM 2 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

L

LED current rising delay: 89 µs

LED current rising delay: 271 µs

PWM 4 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

LED current rising delay: 192 µs

LED current rising delay: 520 µs

PWM 8 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

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4.1 By-pass Switch On/Off Control – continued

R_COMP= 470 Ω / 0 Ω, The Number of Simultaneous LED Lights: 0 LED -> 1 LED, 8 LED (LED Vf 3.0 V)

VIN = 13 V, Ta = 25°C, C_OUT= 12.5 µF, C_COMP= 0.22 µF, R_SNS= 0.82 Ω, R_IS= 0.05 Ω,

PWM frequency 200 Hz (50 % duty), COMPDIS [1:0] = 0.

V_{SNS_100}(DCDIM [9:0] = 1023) waveforms

R_COMP= 470 Ω

V_{SNS_100}(DCDIM [9:0] = 1023) waveforms

R_COMP= 0 Ω

LED current rising delay: 31 µs

LED current rising delay: 46 µs

PWM 1 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

LED current rising delay: 192 µs

LED current rising delay: 282 µs

PWM 8 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

V_{SNS_26}(DCDIM [9:0] = 325) waveforms

R_COMP= 470 Ω

V_{SNS_26}(DCDIM [9:0] = 325) waveforms

R_COMP= 0 Ω

LED current rising delay: 62 µs

LED current rising delay: 131 µs

PWM 1 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

LED current rising delay: 520 µs

LED current rising delay: 576 µs

PWM 8 LED

1 ch:

V_OUTVoltage

(200 mV/div)

2 ch:

COMP Voltage

(10 V/div)

4 ch:

LED Current

(100 mA/div)

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4. By-pass switch section – continued

4.2 Phase Shift

When the By-pass switch turns on, DC/DC output voltage decreases significantly. It is possible to shift the timing at

which each switch is turned on to suppress voltage fluctuations.

For details, refer to the explanation of the page 30 "PHEN" register setting.

4.3 LED Short Detection

Each By-pass switch has LED Short detection function.

Detect

The voltage between CHn+1 and CHn are monitored while (LED current is generated and under the SGB release

condition, and) the By-pass switch is off. When less than LED Short detection voltage (V_CHLS), LED Short time tLS

passes detect LED Short. The LEDSHORT [n] of diagnostic register LEDSHORT and LEDSHORTALL of ERRDET are

updated into 1.

Release

The voltage between CHn+1 and CHn are monitored while (LED current is generated and under the SGB release

condition, and) the By-pass switch is off. When higher than LED Short detection voltage (V_CHLS), LED Short time t_LS

passes, LEDSHORT [n] of diagnostic register LEDSHORT [n] and LEDSHORTALL of ERRDET are updated to 0.

When LEDEN [n] is set to 0, LEDSHORT [n] of diagnostic register LEDSHORT and LEDSHORTALL of ERRDET are

updated to 0.

ILED

V_CHLS

CHn+2

V_{CHn+1_CHn}

SWn+1

OFF

t_LS

CHn+1

0

1

LEDSHORT[n]

SWn

LEDSHORTALL

CHn

Figure 12. LED Short Detection

V_CHLS

V_{CHn+1_CHn}

t_LS

0

1

LEDEN[n]

0

1

0

LEDSHORT[n]

1

LEDSHORTALL

Figure 13. LED Short Detection Release

V_CHLS

V_{CHn+1_CHn}

t_LS

0

1

0

1

LEDEN[n]

0

1

0

LEDSHORT[n]

LEDSHORTALL

Figure 14. LED Short Detection Release (LEDEN Control)

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4.3 LED Short Detection – continued

This section describes the mask time t_LScounting operation for LED Short detection.

LED short occur

LED short release

PWMON

LED short

(before filter）

(L: LED short det)

SGB mask function

SGB

（before filter）

SGB = H -> L, count start

LED short

counter

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

80 µs to 100 µs

LED short

det Flag

H: LED short register detection state

L -> H change

H -> L change

L(no change)

Figure 15. LED Short detection and release

(During PWM control, SGB signal and counter status)

The figure above is the timing chart LED Short detection and SGB signal (detection state at high: LED current is not

sufficiently generated).

LED short is detected with low condition (PWMON = H) and SGB = low, and LED short detection flag = 1.

Since the LED short function at DC/DC startup is masked with SGB = high, LED short is not erroneously detected.

LED short occur

PWMON

LED short

(before filter）

L: LED short det

SGB

（before filter）

SGB = H -> L, count start

LED short

counter

0

1

0

1

0

1

0

1

0

1

0

80 µs to 100 µs

LED short

det Flag

H: LED short register detection state

L(no chage)

L -> H change

Figure 16. LED Short Detection

(In the case of low duty that cannot be sufficiently boosted LED voltage during PWM control.)

If the LED voltage is not boosted sufficiently due to low PWM duty, the LED short detection flag = 1 will be set in the

logic of the LED short state detected when PWMON = H after SGB = H -> L.

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4.3 LED Short detection – continued

LED short occur

LED short release

PWMON

LED short

(before filter）

L: LED short det

SGB

（before filter）

LED short

counter

0

1

0

1

0

1

0

1

0

1

0

80 µs to 100 µs

80 µs

LED short

det Flag

to 100 µs

H: LED short register detection state

L -> H change

L(no change)

H -> L change

Figure 17. LED Short detection (Maximum Duty, During PWM Control)

LED short is detected with detection condition (PWMON = H) and SGB = low, and LED short detection flag = 1.

4.4 LED Open Detection

Each By-pass switch has LED open detection function.

Detection

CHn and CHn+1 voltages are monitored while the By-pass switch is off to detect LED open when it becomes greater

than LED open detection voltage (V_CHLO1, V_CHLO2). When detecting LED open, the By-pass switch turns on to prevent

destruction. (Latch) LEDOPEN [n] of the diagnostic register LEDOPEN and LEDOPENALL of ERRDET are updated to

1.

Release

If LEDEN [n] is set to 0, the latch is released. LEDOPEN [n] of diagnostic register LEDOPEN and LEDOPENALL of

ERRDET are updated to 0.

ILED

CHn+2

V_CHLO

SWn+1

OFF

ON

CHn+1

V_{CHn+1_CHn}

SWn

0

1

LEDEN[n]

CHn

0

1

LEDOPEN[n]

LEDOPENALL

Figure 18. LED Open Detection

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4.4 LED open detection – continued

VCHLO

LED open error

LED open release

V_{CHn+1_CHn}

0

1

0

1

0

1

0

1

0

LEDEN[n]

0

1

0

1

0

LEDSHORT[n]

LEDSHORTALL

Figure 19. LED Open Detection Release (When LEDEN Control)

VCHLO

LED open error

PWM Duty

Setting

ON

OFF

ON

OFF

ON

OFF

-

0

1

LEDEN[n]

0

1

0

LEDSHORT[n]

LEDSHORTALL

Figure 20. LED Open Detection Release (PWM Control)

4.5 Forced-LED Lighting Control

When switching from PWM dimming to 100 % Duty, updating with the PWMDIM register setting may delay the switch

depending on the timing of the communication. Setting LEDFC [n] = 1 in the LEDFC register does not affect the PWM

period when transmitting data, and the By-pass switch is turned off.

PWMDIM0 = 0x7F

LEDFC[0] = 0

PWMDIM0 = 0xFF

LEDFC[0] = 0

PWMDIM0 = 0x7F

LEDFC[0] = 0

PWMDIM0 = 0x7F

LEDFC[0] = 1

PWM period

OF

F

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

LED0

(a) Control by PWM dimming settings

(b) Control by forced LED lighting

Figure 21. Forced LEDON Control

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4. By-pass switch section – continued

4.6 Open Drain Outputs For Abnormal Status (FAULT_B)

When LEDOPENALL and LEDSHORTALL of the register are updated to 1, the FAULT_B pin outputs the L level. When

the register is updated to 0, the FAULT_B pin outputs Hi-z.

Table 1. Abnormal Detection/Protection Function

Detecting Condition

Description in Detecting

(All The Value is Typical)

Function

By-pass

Switch

FAULT_B

output

Detection

Release

DC/DC

PGATE

COMP

Register

Reset

All SWn on

EN pin

< 0.9 V

EN pin

> 1.0 V

High

( = SNSP)

EN (Low)

OFF

(LED OFF)

Discharge

Hiz

(Note 2)

All SWn on

VIN UVLO

Detect

VIN pin

< 4.80 V

VIN pin

< 5.20 V

High

( = SNSP)

OFF

(LED OFF)

Discharge

Reset

(Note 2)

All SWn on

VDRV5

< 4.10 V

VDRV5

> 4.40 V

High

( = SNSP)

VDRV5 UVLO

TSD Detect

OFF

(LED OFF)

Discharge

-

Reset

Hiz

Low

Hiz

(Note 2)

All SWn on

High

( = SNSP)

Tj > 175 °C^{(Note 1)}

Tj < 150 °C

(LED OFF)

(Note 2)

DC/DC

OCP Detect

(BSTEN = 1)

OVP Detect

(OVPSET [3:0] =

10)

IS Pin

> 300 mV

IS Pin

< 300 mV

-

Low

(Release

after 20

ms)

OVPDET

SNSP Pin

> 56.6 V

SNSP Pin

< 54.8 V

High

( = SNSP)

OFF

Discharge (Release

after 20 ms)

(BSTEN = 1)

CHx Pin

< 0.9 V

And

CHx Pin

> 2.0 V

And

Low

SCPDET

Discharge (Release

after 20 ms)

CHxSCP

(BSTEN = 1)

High

( = SNSP)

(Release

after 20

ms)

-

After 50 µs

After 20 ms

LEDEN = 1,

V_{CHn+1_CHn}

> 1.0 V

LEDEN = 1,

V_{CHn+1_CHn}< 1.0 V

and

V_SNS> 13.6 mV

After 100 µs

LED

SHORT [n]

-

LED Short Detect

and

Low

Don’t care Don’t care

V_SNS> 13.6 mV

After 100 µs

or LEDEN = 0

LEDSHORT

ALL

LEDOPEN

[n]

SWn on

(LED OFF)

LED Open Detect

(LEDOPSETn =

0)

LEDEN = 1,

V_{CHn+1_CHn}> 6.0 V

-

LEDEN = 0

Low

Hiz

Don’t care Depend on Don’t care Don’t care

LEDOPEN

ALL

detect ch

LED Average

Current Status

(BSTEN = 1)

V_SNSVoltage <

11.1 mV

After 10 ms

V_SNSVoltage

> 13.6 mV

After 1 ms

-

SGB

Don’t care Don’t care

-

CRC Error

ERRCLR = 1

CRCER

Low

Don’t care Don’t care

WDTEN = 1

No Access Over

100 ms

Watch Dog Timer

Error

-

WDTDET

Don’t care Don’t care

(Note 1) TSD does not work below Tj = 150 °C.

(Note 2) Due to the reset condition, the bypass switch section has SW ON logic, but the boost DC/DC section stops, so the PSW pin voltage, which is the power

supply for the SW section, drops, and finally the SW turns OFF. At the same time, PGATE turns off PMOS, so the LED turns off.

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Description of Blocks – continued

5. UART

5.1 UART Protocol and AC Electrical Characteristics

UART Interface (UART) controls the IC with RX and TX signals. In the start of UART communication the initial value of

RX and TX is ‘Hi-z’ (high). The format of a frame consist of 10-bits: start bit, 8-bit data and stop bit. Data is sent from

LSB first. This IC synchronizes timing every stop/start bit. Hence, when MCU read data, it is synchronized every

stop/start bit.

start bit

"0"

stop bit

"1"

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7

Figure 22. Data Format of a Frame

start bit

"0"

stop bit

"1"

1

0

1

0

1

0

1

0

initialized format

Figure 23. Clock Synchronization (SYNC)

SYNC

Dev,B,RW

NumOfData

Address

Data1

Datan

CRCL

CRCH

RX

TX

Hi-z

Figure 24. UART Protocol (Write)

DA

[0]

ND ND ND ND ND ND ND ND

[0] [1] [2] [3] [4] [5] [6] [7]

RW

B

1

0

1

0

1

0

1

0

RX

TX

S

P

S

P

S

P

S:

P:

RW:

B:

start condition

stop condition

0: Write / 1: Read

Broadcast

Device Address[5:0]

RW,B,DevAdd[5:0]

clock synchronization

(0x55)

NumofData[7:0]

DA[5:0]: Device Address

ND[7:0]: Number Of Data

AD[7:0]: Register Address

DT[7:0]: Data

Hi-z

CR[15:0]: CRC16

AD AD AD AD AD AD AD AD

[0] [1] [2] [3] [4] [5] [6] [7]

DT DT DT DT DT DT DT DT

[0] [1] [2] [3] [4] [5] [6] [7]

CR CR CR CR CR CR CR CR

[0] [1] [2] [3] [4] [5] [6] [7]

CR CR CR CR CR CR CR CR

P

[8] [9] [10] [11] [12] [13] [14] [15]

RX

TX

S

P

S

P

S

P

S

Hi-z

Figure 25. Detail of UART Protocol (Write)

stop

SYNC

Dev,B,RW

NumOfData

Address

CRCL

CRCH

RX

TX

start

Hi-z

Data1

Datan

CRCL

CRCH

Figure 26. UART Protocol (Read)

Communication Reset

This IC has a communication reset function. This interface circuit can be recovered from abnormal condition of UART

communication with this function. Set RX to Low for 12 consecutive cycles based on baud rate used. Set RX to Low

over 500 µs to invoke communication reset. If communication reset is executed, register value do not change, it will not

affect LED Dimming.

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5. UART – continued

5.2 UART AC Timing chart

RX

TX

V_{RX_IH}

V_{RX_IL}

t_rxt_rxslew1

t_rxslew2

t_txwait

t_txslew1

t_txslew2

t_tx

Figure 27. UART AC Timing

Table 2. UART AC characteristics

Recommended Operation Condition (Unless otherwise specified, Tj = -40 °C to +150 °C, VIN = 13 V)

Rating

Parameter

Symbol

Unit

Comments

Min

Typ

Max

20

RX Transfer Time

t_rx

2

-

μs

TX Transfer Time

t_tx

20

TX Output Delay Time

RX Slew Rate High -> Low

RX Slew Rate Low -> High

TX Slew Rate High -> Low

t_txwait

t_rxslew1

t_rxslew2

t_txslew1

0.5

-

1

-

1.5

bit

μs

t_rxx 10 %

t_txx 10 %

μs

-

TX Slew Rate Low -> High

t_txslew2

-

t_txx 10 %

Baud rate at 500 kHz to 200

kHz, use synchronized to each

START bit.

TX_tore1

-6.25

-

+6.25

%

TX Output Tolerance

Baud rate under 200 kHz,

use synchronized to each

START bit.

TX_tore2

-3.75

-

+3.75

(Output load capacitance: 15 pF)

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5. UART – continued

5.3 UART Protocol

5.3.1 Initialize Format

bit 7 bit 6 bit 5 bit 4 Bit 3 Bit 2 bit 1 bit 0

0

1

0

1

0

1

0

1

MCU sends 55 h (0101_0101b) to the IC to adjust communication rate. IC will receive the data and determine

the baud rate of the incoming command. IC generates internal sampling time based on the computed baud rate

(1-bit period / 2).

After sending SYNC byte, BD18364EFV-M expects succeeding frames have the same data rate as that of SYNC

frame. If incorrect input timing occurred it will trigger CRC error.

5.3.2 Device address, Broadcast, Write/Read

bit 7 bit 6 bit 5 bit 4 Bit 3 Bit 2 bit 1 bit 0

RW

B

DA [5:0]

bit

Parameter

Function

We can set “000000b” or “000001b”.

DA [0] = CS setting

DA [1] = 0

DA [5:0]

Device Address

DA [2] = 0

DA [3] = 0

DA [4] = 0

DA [5] = 0

bit

B

Parameter

Broadcast

Function

0: It accesses register to device which matched

device address.

1: It accesses register to all device.

Note:

1. Broadcast is not possible for Read access.

2. If Broadcast = 1; ignore device address setting.

bit

Parameter

Read/Write

Function

0: Write access

1: Read access

RW

5.3.3 Number of Data

bit 7 bit 6 bit 5 bit 4 Bit 3 Bit 2 bit 1 bit 0

Num of Data [7:0]

bit

Parameter

Number of Data transferred

Function

It is available to use from 1 to 10

Num of Data [7:0]

Note:

1. Available data buffer for multiple write access is maximum 10 data.

2. Num of Data = 0 is not valid

3. Num of Data > 10 is not valid

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5.3 UART Protocol – continued

5.3.4 Register Address

bit 7 bit 6 bit 5 bit 4 Bit 3 Bit 2 bit 1 bit 0

Reg Addr [7:0]

bit

Parameter

Register Address

Function

It is available to access from 0x00 to 0x15

Reg Addr [7:0]

5.3.5 Data

bit 7 bit 6 bit 5 bit 4 Bit 3 Bit 2 bit 1 bit 0

Data [7:0]

bit

Parameter

value

Data [7:0]

Data

0x00 to 0xFF

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5.3 UART Protocol – continued

5.3.6 CRC

16 bit LSB First

Cyclic Redundancy Check (CRC)

The CRC-16 (BUYPASS) is used to detect errors in the I/F transaction data.

CRC is calculated in the order of Device address, Number of Data, Address Data, Write or Read Data.

For Write Sequence

This received CRC 2 byte data will then be compared to the computed CRC checksum.

If CRC data is the same with the computed CRC checksum, Register Map will be updated with all the written

data.

Else, All written data will be disregarded.

CRC Polynomial

CRC Polynomial is expressed as :

CRC16-IBM

푥^ꢐ6+ 푥^ꢐꢑ+ 푥^ꢒ+ 1

Bit order LSB First

The CRC calculation starts with LSB and proceeds from bit [0] to bit [7] of each byte.

Figure 28. Polynomial

CRC Initial Setting

The initial value is “0000h”.

The CRC calculate registers are reset to the initial value of “0000h” prior to each CRC bytes calculation.

Example for

RW,B,DA[5:0] NumofData[7:0]

Address[7:0]

Data[7:0]

CRC Data[7:0] CRC Data[15:8]

Figure 29. CRC Data format

RW, B, DA [5:0]:

Num Of Data [7:0]: ND [7:0]

Address [7:0]:

Data [7:0]:

CRC Data [7:0]:

CRC Data [15:8]:

DA [7:0]

= 0x01

= 0x02

= 0xAA

= 0xC4

AD [7:0]

DT [7:0]

CR [7:0]

CR [15:8] = 0x8B

5.3.7 Example of UART Protocol

Single device, 1 byte Write (Write to Device #1)

B =

0:

Target Device Receives the Data

RW =

0:

Write

Dev Addr [5:0] =

Num Of Data [7:0] = 1:

Reg Addr [7:0] =

Data [7:0] =

0x01:

Target Device Address

1 byte Write Mode

Address

0x02:

0xAA:

Data

RX

S

initialize (0x55)

P

S

Device address

(0x1)

B

RWP

S

NumOfData (0x1)

P

S

Address (0x2)

P

S

Data(0xAA)

P

Figure 30. UART Protocol of the 1 byte Write to Device #1

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5. UART – continued

5.4 Register Map

All registers except PWMDIM (LEDEN = 0 -> 1) are updated immediately.

PWMDIM function is applied on the next PWM timing.

Type A

UART Write

Analog

Circuit

and

MCU

Register

Logic

function

Type B

PWM base

UART Read

timing

(Control

Signal)

Figure 31. Data Update Image

Type A update immediately:

All registers except for TypeB registers

UART

PWM timing

Register Map

Control Signal

update

Type B update at internal PWM timing:

PWMDIMn, LEDEN(only 0 -> 1 setting)

UART

PWM timing

Register Map

Control Signal

update

Figure 32. Data Update Image Timing Chart

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5.4 Register Map – continued

Table 3. Register MAP

Register

Access

update

timing

Register Name

Address

Bit[7]

Bit[6]

Bit[5]

Bit[4]

Bit[3]

Bit[2]

Bit[1]

Bit[0]

initial

SWRST

0x00

0x01

0x02

ERRCLR

FAULTBCNT

FAULTBEN

VINDIM[2:0]

SYNCEREN

WDTEN

CURLIMEN

SSFM[2:0]

SCPEN

SWRST

BSTEN

R/W

0x06

0x00

0x0A

Type A

SYSSET1

SYSSET2

-

COMPDIS_EN

COMPDIS[1:0]

-

OVPSET[3:0]

LEDOPSET

SYSSET3

ADCTRL

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

0x14

0x15

LEDOPSET[7:0]

R/W

WO

RO

0x00

Type A

reserved

PWMSYNCEN

-

PHEN

-

FPWM[3:0]

0xC1 Type A

-

AD_TRIG

0x00

0x8A

0x00

0xFF

0x00

Type A

Type B

Type A

ADSTORE

DCDIMH

AD_STORE[7:0]

DCDIM[9:2]

R/W

RO

DCDIML

OCLIM[2:0]

-

DCDIM[1:0]

PWMDIM0

PWMDIM1

PWMDIM2

PWMDIM3

PWMDIM4

PWMDIM5

PWMDIM6

PWMDIM7

LEDEN

PWMDIM0[7:0]

PWMDIM1[7:0]

PWMDIM2[7:0]

PWMDIM3[7:0]

PWMDIM4[7:0]

PWMDIM5[7:0]

PWMDIM6[7:0]

PWMDIM7[7:0]

LEDEN[7:0]

LEDFC

LEDFC[7:0]

ERRDET

CRCER

SGB

-

WDTDET

LEDSHORTALL LEDOPENALL

SCPDET

OVPDET

LEDOPEN

LEDSHORT

LEDOPEN[7:0]

LEDSHORT[7:0]

RO

Reset Condition

EN = Low, VDRV5 UVLO, VIN UVLO, TSD, SWRST = 1 (Except for SWRST register)

R/W: Read/Write, WO: Write only, RO: Read only

There are two Update timing for LEDEN. LEDEN (0 -> 1 setting) is Type B. LEDEN (1 -> 0 setting) is Type A.

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5. UART – continued

5.5 Description of Registers

●Address 0x00: SWRST

Software reset

bit [5]

[Read/Write]

bit [3]

initial value 0x06

bit No

bit [7]

bit [6]

bit [4]

bit [2]

bit [1]

bit [0]

Name ERRCLR FAULTBCNT

Initial

value

FAULTBEN

SYNCEREN WDTEN

CURLIMEN

SCPEN

SWRST

0

1

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [0]

bit [1]

bit [2]

SWRST

Set ‘1’ in this register when you want to reset digital circuit.

SWRST register return ‘0’ automatically.

Table 4. SWRST Description

SWRST

reset

0

1

Normal

Reset for digital circuit (return ‘0’ automatically)

SCPEN

This register is enabled for “CHx pin Short Circuit Protection “ function.

Table 5. SCPEN Description

SCPEN

operation

It is not available to use SCP function.

SCPDET register is ‘0’.

0

1

It is available to use SCP function

CURLIMEN

This register is enabled for current limiter.

Table 6. CURLIMEN Description

CURLIMEN

operation

It is not available to control AMP for current limit.

(OFF)

0

1

It is available to control AMP for current limit.

bit [3]

WDTEN

This register is setting of WDT enable. This timer is reset by CRC OK.

FAULT_B = Low and WDTDET = 1 when WDTEN = 1 and no UART access during 100 ms (Typ).

Table 7. WDTEN Description

WDTEN

operation

UART Watch Dog Timer is disable

UART Watch Dog Timer is enable

0

1

bit [4]

SYNCEREN

Set only ‘0’. ‘1’ is prohibit.

Table 8. SYNCEREN Description

operation

SYNCEREN

0

1

Default. (do not change)

prohibit

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5.5 Description of Registers – continued

bit [5]

bit [6]

FAULTBEN

FAULTBCNT

When FAULTBEN = 1, the FAULT_B pin is controlled by FAULTBCNT register.

Table 9. FAULTBEN and FAULTBCNT Description

FAULTBEN

0

FAULTBCNT

FAULT_B

0

1

0

1

error status

Low

High (Hi-z)

1

FAULT_B

error signal

0

1

FAULTBCNT register

FAULTBEN register

Figure 33. FAULT_B Controlled

bit [7]

ERRCLR

“UART Watch Dog Timer Error condition” and “CRC error” clear.

The WDTDET and CRCER register are cleared by set ‘1’ in this register.

FAULT_B will de-assert.

ERRCLR register return ‘0’ automatically.

Table 10. ERRCLR Description

ERRCLR

operation

0

1

Normal

WDTDET and CRCER are cleared and FAULT_B de-asserts.

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5.5 Description of Registers – continued

●Address 0x01: SYSSET1

system setting1

bit [5]

VINDIM [2:0]

[Read / Write]

bit [2]

SSFM [2:0]

initial value 0x00

bit No

Name

Initial

value

bit [7]

-

bit [6]

bit [4]

0

bit [3]

0

bit [1]

bit [0]

BSTEN

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [0]

BSTEN

This register controls Boost enable.

Table 11. BSTEN Setting

DC/DC operation

BSTEN

0

1

DC/DC OFF

DC/DC ON

bit [3:1]

SSFM [2:0]

This register controls SSCG ON/OFF and modulation frequency.

Table 12. SSFM Setting

SSFM[2:0]

SSCG modulation ratio

0

1

2

3

4

5

6

7

SSCG OFF (Fixed frequency of DC/DC)

137 Hz

183 Hz

275 Hz

366 Hz

549 Hz

732 Hz

1,099 Hz

bit[6:4]

VINDIM

VIN derating start voltage setting.

This IC has protection for input current. If input voltage (VIN) is down, it flows big current. So it controls

output current for decreasing input current. This register is setting of voltage of “derating start threshold”. If

VIN voltage is down and under UVLO, it controls V_SNS= 0 V. Refer description (Description of Blocks “2.

LED Driver Section / 2.4 Input Voltage (VIN) Derating”)

Table 13. VINDIM Start Setting

VINDIM

Setting

0

1

2

3

4

5

6

7

OFF

6.92 V

7.49 V

8.02 V

8.62 V

9.17 V

9.69 V

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5.5 Description of Registers – continued

●Address 0x02: SYSSET2

bit No bit [7]

Name COMPDIS_EN

system setting2

bit [6] bit [5]

COMPDIS [1:0]

[Read / Write] initial value 0x0A

bit [4]

-

bit [3]

1

bit [2]

bit [1]

bit [0]

OVPSET [3:0]

Initial

value

0

1

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [3:0]

OVPSET

OVP Setting Value

This register controls the threshold of voltage OVP detection.

[

]

ꢀ_푂푉푃= ꢊꢀꢋꢌꢍꢎ ꢏ: 0 × 2.18 + ꢏ4.8 [V]

bit [6:5]

bit [7]

COMPDIS

COMP Discharge current setting in “LED over current detection”

COMPDIS_EN

COMP Discharge function setting in “LED over current detection”

Table 14. COMPDIS, COMPDIS_EN

COMPDIS_EN

COMPDIS

operation

No COMP Discharge

x1 (discharge current 180 µA)

x2 (360 µA)

x4 (720 µA)

x6 (1080 µA)

0

1

*

0

1

2

3

●Address 0x03: LEDOPSET LED open error detection voltage setting [Read / Write]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

LEDOPSET [7:0]

bit [3]

bit [2]

bit [1]

bit [0]

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [7:0]

LEDOPSET

This register is setting of detection voltage of LED open error.

Set this register when LEDEN = 0x00.

Table 15. LEDOPSET

LEDOPSET

Monitor

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

operation

0: LED open error detection voltage1

(V_CHLO1).

1: LED open error detection voltage2

(V_CHLO2).

[0]

[1]

[2]

[3]

[4]

[5]

[6]

[7]

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5.5 Description of Registers – continued

●Address 0x04: SYSSET3

system setting3

bit [5]

PWMSYNCEN

[Read/Write]

bit [2]

initial value 0xC1

bit No

Name

Initial

value

bit [7]

bit [6]

bit [4]

PHEN

bit [3]

0

bit [1]

bit [0]

Reserved

FPWM [3:0]

1

0

1

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [3:0]FPWM

This register control PWM frequency when PWMSYNCEN register = 0.

Set this register when LEDEN = 0x00 (Set this register before starting PWM dimming and keep this value

until reset.)

Table 16. PWM Frequency Setting

FPWM

0x0

0x1

0x2

0x3

0x4

0x5

0x6

0x7

0x8

0x9

0xA

0xB

0xC

0xD

0xE

0xF

PWM frequency [Hz]

200

252

300

347

400

446

504

558

600

651

710

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5.5 Description of Registers – continued

bit [4]

PHEN:

Phase Shift function enable.

This register controls phase in PWM dimming.

Set this register when LEDEN = 0x00 (Set this register before starting PWM dimming and keep this value

until reset.)

Table 17. PHEN Description

Phase Shift (Delay value)

PHEN

PWMSYNCEN

0

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

0/8 x (1/FPWM)

1/8 x (1/FPWM)

2/8 x (1/FPWM)

3/8 x (1/FPWM)

4/8 x (1/FPWM)

5/8 x (1/FPWM)

6/8 x (1/FPWM)

7/8 x (1/FPWM)

1

0

Phase Shift function is disable.

Phase Shift

Lighting

SW7

SW6

SW5

SW4

SW3

Lighting

SW2

SW1

Lighting

Lighting Duty

SW0

5 ms (FPWM = 0x0)

Figure 34. Phase Shift Function

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5.5 Description of Registers – continued

bit [5]

PWMSYNCEN

Set only ‘0’. ‘1’ is prohibit.

Table 18. PWMSYNCEN Description

PWMSYNCEN

operation

Default (do not change)

Prohibit

0

1

bit [7:6]

(Reserved)

Set only ‘3’. ‘0,1,2’ is prohibit.

Table 19. SYSSET3 bit [7:6] Description

bit [7:6] (Reserved)

operation

0, 1, 2

3

Prohibit

Do not change

●Address 0x05: ADCTRL

A/D Control

[Write]

bit [2]

-

initial value 0x00

bit No

Name

Initial

value

bit [7]

-

bit [6]

bit [5]

-

bit [4]

-

bit [3]

-

bit [1]

-

bit [0]

AD_TRIG

-

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [0]

AD_TRIG

A/D Sampling Start

When this register is set to ‘1’, A/D sampling (1 sample) will commence.

This register will auto-reset to ‘0’ after A/D sampling finishes.

●Address 0x06: ADSTORE A/D Store Value

[Read]

bit [2]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

AD_STORE [7:0]

bit [3]

bit [1]

bit [0]

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

bit [7:0]

AD_STORE

A/D Stored Value

This register contains the sampled 8-bit value of the A/D converter.

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5.5 Description of Registers – continued

●Address 0x07: DCDIMH

DC current setting bit 9 to 2

[Read / Write] initial value 0x8A

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

bit [3]

1

bit [2]

bit [1]

bit [0]

DCDIM[9:2]

1

0

1

0

Update: Immediately

initial value 0x00

●Address 0x08: DCDIML

DC current setting bit 1 to 0

[Read / Write]

bit No

Name

Initial

value

bit [7]

bit [6]

OCLIM [2:0]

bit [5]

bit [4]

-

bit [3]

-

bit [2]

-

bit [1]

bit [0]

DCDIM [1:0]

0

Update: Immediately

The data in register is updated to the newest data immediately when the new data is written.

DCDIMH, DCDIML

bit [7:0]

bit [1:0]

DCDIM [9:0]:

Analog Dimming Setting by Adjusting 10-bit Reference Voltage (V_DCDIM) for LED current sense Voltage V_SNS

.

[

]

ꢄ퐶ꢄ퐼푀 9: 0

1

ꢀ

ꢁꢂꢁ

= ꢓ

× 2.5 ꢀ − 0.195 ꢀꢔ ×

1024

4.5

V_SNS

511.8 mV

25.6 mV

0 mV

V_FSR

0

2.5 V

V_ADIM

0.195 V

0 %

ΔV_ADIM

5 %

100 %

1024

DCDIM[9:0]

0

80 127

1023

Figure 35. DCDIM Setting

bit [4:2]

bit [7:5]

-

OCLIM [2:0]

LED over current detection threshold is programmed by this register.

Table 20. OCLIM Description

OCLIM[2:0]

ΔV_{SNS_LIM}[V]

0.0520

0.0869

0.1216

0.1563

0.1910

0.2256

0.2606

0.2952

0

1

2

3

4

5

6

7

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5.5 Description of Registers – continued

●Address 0x09: PWMDIM0

PWM dimming setting for SW0

[Read / Write]

bit [2]

initial value 0xFF

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

bit [3]

bit [1]

bit [0]

PWMDIM0 [7:0]

1

Update: PWM

bit [7:0]

PWMDIM0

PWM Dimming Setting for SW0

This register controls Lighting PWM duty (By-pass Switch OFF) when LEDEN [0] = 1 and LEDFC [0] = 0.

Lighting position is tail as Figure 36.

Table 21. PWMDIM0 Description

PWMDIM0

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

to

Lighting Duty [%]

0 %

2.34 %

2.73 %

3.12 %

Xx

(PWMDIM0 + 1) /256

to

0xFD

0xFE

0xFF

99.22 %

99.61 %

100.00 %

5 ms (FPWM = 0x0)

Lighting Duty

OFF

Lighting

SW0

Figure 36. PWM Dimming Setting

●Address 0x0A to 0x10: PWMDIMn (n = 1 to 7)

This register is used to make PWM setting for SW1 to SW7. The setting procedure is the same as that for SW0 of

Address 0x09.

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5.5 Description of Registers – continued

●Address 0x11: LEDEN

LED enable

[Read / Write]

bit [3] bit [2]

LEDEN [7:0]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

0

bit [5]

bit [4]

bit [1]

bit [0]

0

Update: PWM/immediately

bit [7:0]

LEDEN [7:0]

This register controls channel enable.

LEDEN = 1 -> 0 is updated immediately. But LEDEN = 0 -> 1 is updated same as PWMDIMn (n = 0 to 7).

Table 22. LEDEN Setting

LEDEN[n]

0

Description

LED is light OFF. (SWn = ON)

If it detects “LED open error” or “LED short error”,

it releases these error latched condition.

1

It is available to control PWM dimming and detect

“LED open error” and “LED short error” protection.

n = 0 to 7

●Address 0x12: LEDFC LED force 100 % duty lighting

[Read / Write]

bit [3] bit [2]

LEDFC [7:0]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

bit [1]

bit [0]

0

Update: immediately

bit [7:0]

LEDFC [7:0]

This register controls PWM dimming or not. If this register is 1, PWM Duty is fixed by 100 %.

Table 23. LEDFC Setting

LEDFC[n]

Description

0

1

By-pass switch is controlled by PWMDIMn and LEDEN [n].

100 % duty lighting (SWn = OFF).

Update immediately. Asynchronous with PWM cycle.

n = 0 to 7

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5.5 Description of Registers – continued

●Address 0x13: ERRDET

SG and Error status register

[Read]

bit [2]

initial value 0x00

bit No

bit [7]

bit [6]

SGB

bit [5]

-

bit [4]

bit [3]

bit [1]

bit [0]

Name CRCER

WDTDET LEDSHORTALL LEDOPENALL SCPDET

OVPDET

Initial

value

0

Update: Immediately

bit [0]

OVPDET

Table 24. OVPDET Operation

Description

OVPDET

0

1

Not detect “Over Voltage Protection”.

Detect “Over Voltage Protection”.

It outputs FAULT_B = Low.

bit [1]

SCPDET

This register is “CHx pin Short Circuit Protection error” status. This register is programmed by SCPEN. This

status register doesn’t become 1 when SCPEN = 0.

Table 25. SCPDET Operation

SCPDET

0

Description

Not detect “CHx pin Short Circuit Protection”.

Detect “CHx pin Short Circuit Protection”.

It outputs FAULT_B = Low.

1

bit [2]

bit [3]

bit [4]

LEDOPENALL

This register is logical OR of each bit of LEDOPEN register.

Table 26. LEDOPENALL Operation

LEDOPENALL

0

Description

Not detect “LED open error” each SW.

Detect “LED open error” any of SW.

It outputs FAULT_B = Low.

LEDOPENALL becomes 0 when LEDOPEN [7:0] = 0x00.

1

LEDSHORTALL

This register is logical OR of each bit of LEDSHORT register.

Table 27. LEDSHORTALL Operation

LEDSHORTALL

0

Description

Not detect “LED short error” in all SW.

Detects “LED short error” in any of SW.

It outputs FAULT_B = Low.

1

LEDSHORTALL becomes 0 when LEDSHORT [7:0] = 0x00.

WDTDET

This register is “Watch Dog Timer error” status. This register is programmed by WDTEN. If MCU don’t

communicate with this IC over 100 ms, this IC detects error. This status register doesn’t become 1 when

WDTEN = 0.

Table 28. WDTDET Setting

WDTDET

0

Description

Not detect “Watch Dog Timer error”

Detects “Watch Dog Timer error” .

It outputs FAULT_B = Low.

1

WDTDET becomes 0 when ERRCLR = 1.

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5.5 Description of Registers – continued

bit [5]

-

Table 29. ERRDET bit [5]

Description

ERRDET Bit[5]

0

Default.

bit [6]

SGB

LED average current status. Detect SGB condition, V_SNSVoltage < SGB Detect Voltage.

Table 30. LED Average Current Status

SGB

0

Description

“LED Average Current” status is good.

“LED Average Current” status is not good.

Only monitor status. It doesn’t control FAULT_B.

1

bit [7]

CRCER

CRC error status.

Table 31. CRC Error

Description

Not detect “CRC Error”.

CRCER

0

Detect “CRC Error”.

1

FAULT_B = Low when CRCER = 1.

CRCER becomes 0 by ERRCLR = 1

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5.5 Description of Registers – continued

●Address 0x14: LEDOPEN

LED open error status register

[Read]

bit [2]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

bit [3]

bit [1]

bit [0]

LEDOPEN [7:0]

0

Update: Immediately

Table 32. LEDOPEN Setting

Description

Not detect “LED open error” SWn.

Detect “LED open error” SWn

Keep this value until writing LEDENn = 0

LEDOPEN[n]

0

1

(n = 0 to 7)

●Address 0x15: LEDSHORT

LED short error status register

[Read]

bit [2]

initial value 0x00

bit No

Name

Initial

value

bit [7]

bit [6]

bit [5]

bit [4]

bit [3]

bit [1]

bit [0]

LEDSHORT [7:0]

0

Update: Immediately

Table 33. LEDSHORT Setting

Description

LEDSHORT[n]

0

1

Not detect “LED short error” SWn.

Detect “LED short error” SWn

Keep this value until writing LEDENn = 0 or released “LED short

error”

(n = 0 to 7)

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5. UART – continued

5.6 Lighting Pattern Example

No.

Dimming type

Sequential Winker

(Sequential LED ON)

LEDEN register

0xFF

LEDFC register

Control

PWMDIM register

0x00 (0 % setting)

1

Sequential Winker

2

3

4

Control

0x00

0xFF

0x00

0xFF (100 % setting)

0xXX (all setting)

(Sequential LED ON)

Sequential Winker OFF 1

(Sequential LED OFF)

Sequential Winker OFF 2

(Sequential LED OFF)

0xFF (100 % setting)

5.6.1 Sequential Winker 1 (Sequential LED ON)

LEDEN: 0xFF

LEDFC: Control

PWMDIMn: 0 % Duty Setting (All SW)

UART

LEDEN

writing

0xFF

0x00

LEDFC

0x00

0x01

0x03

0x07

0x0F

0x1F

0x3F

PWMDIMn

internal

PWM Cycle

LED7

LED6

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

LED5

LED4

ON

LED3

LED2

LED1

LED0

ON

Figure 37. Sequential Winker 1 (Sequential LED ON) LEDFC Controlled

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5.6 Lighting Pattern Example – continued

5.6.2 Sequential Winker 2 (Sequential LED ON)

LEDEN: Control

LEDFC: 0x00

PWMDIMn: 100 % Duty Setting (All SW)

UART

LEDEN

writing

0x00

0x01

0x03

0x07

0x0F

0x1F

0x3F

LEDFC

0x00

0xFF

PWMDIMn

internal

PWM Cycle

OFF

ON

OFF

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

OFF

ON

OFF

ON

OFF

ON

OFF

ON

Figure 38. Sequential Winker 2 (Sequential LED ON) LEDEN Controlled

5.6.3 Sequential Winker OFF 1 (Sequential LED OFF)

LEDEN: Control

LEDFC: 0xFF

PWMDIMn: All Setting

UART

LEDEN

writing

0xFF

0x7F

0x3F

0x1F

0x0F

0x07

0x03

LEDFC

0xFF

all setting

PWMDIMn

internal

PWM Cycle

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

OFF

ON

Figure 39. Sequential Winker 1 (Sequential LED OFF) LEDEN controlled

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5.6 Lighting Pattern Example – continued

5.6.4 Sequential Winker OFF 2 (Sequential LED OFF)

LEDEN: Control

LEDFC: 0x00

PWMDIMn: 100 %

UART

writing

LEDEN

0xFF

0x7F

0x3F

0x1F

0x0F

0x07

0x03

LEDFC

0x00

0xFF

PWMDIMn

internal

PWM Cycle

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

ON

Figure 40. Sequential Winker 2 (Sequential LED OFF) LEDEN Controlled

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5.6 Lighting Pattern Example – continued

5.6.5 PWM Dimming

PWM Frequency:

FPWM Setting:

PWMSYNCEN:

FPWM Register

Valid

0

RX Status in No Communication: High

PWM frequency

①

UART(RX)

Low Counter

Low detector

Less than target counter value

Low

PWMSYNCEN

register

② This timing is controlled by

internal counter.

internal base

signal

PWMDIM7

register

③

PWMDIM7

control data

LED7

LED6

Lighting

OFF

Lighting

OFF

Lighting

OFF

Lighting

OFF

Lighting

OFF

Lighting

OFF

Lighting

LED0

Lighting

OFF

Lighting

OFF

Lighting

OFF

Lighting

Figure 41. PWM Dimming

1

2

3

PWMDIMn register is written.

This Timing is controlled by internal counter.

PWMDIMn setting is updated from register every timing of internal base signal.

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BD18364EFV-M

Absolute Maximum Ratings (Ta = 25 °C)

Parameter

Symbol

Rating

-0.3 to +50

-0.3 to +7

Unit

V

Power Supply Voltage (VIN)

EN Voltage

V_IN

V_EN

V

VDRV5 Voltage

V_DRV5

V

VIN to VDRV5 Voltage

PCLIM Voltage

V_{VIN_VDRV5}

V_PCLIM

V_{PSW_PCLIM}

V_BOOT

V_SNSP, V_SNSN

V_SNS

-0.3 to +50

-0.3 to +72

-0.3 to +7

V

PSW to PCLIM Voltage

BOOT Voltage

V

-0.3 to V_{PSW_PCLIM}+ V_PCLIM

-0.3 to V_PCLIM

-0.3 to +0.6

-0.3 to V_PCLIM

-0.3 to +7

V

SNSP, SNSN Voltage

SNSP to SNSN Voltage

PGATE Voltage

V

V_PGATE

V

PCLIM to PGATE Voltage

CHn Voltage

V_{PCLIM_PGATE}

V_CHn

V

-0.3 to V_PCLIM

-0.3 to +20

-0.3 to +7

V

CHn to CHn_-1Voltage

MONIAD, RX, TX, CS Voltage

FAULT_B Voltage

V_{CHn+1_CHn}

V_MONIAD, V_RX, V_TX, V_CS

V_{FAULT_B}

V

-0.3 to +7

V

GL, IS, ADIM, RT, COMP Voltage

Maximum Junction Temperature

Storage Temperature Range

V_GL, V_IS, V_ADIM, V_RT, V_COMP

Tjmax

-0.3 to V_DRV5

+150

V

°C

Tstg

-55 to +150

°C

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing

board size and copper area so as not to exceed the maximum junction temperature rating.

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Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

HTSSOP-B30

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

86.40

13.00

31.80

9.00

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A (Still-Air), using a BD18364EFV-M Chip.

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface

of the component package.

(Note 3) Using a PCB board based on JESD51-3.

(Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

70 μm

Footprints and Traces

Layer Number of

Measurement Board

Thermal Via^{(Note 5)}

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

70 μm

Copper Pattern

Thickness

Copper Pattern

Thickness

70 μm

Footprints and Traces

74.2 mm x 74.2 mm

35 μm

74.2 mm x 74.2 mm

(Note 5) This thermal via connects with the copper pattern of layers 1,2, and 4. The placement and dimensions obey a land pattern.

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BD18364EFV-M

Recommended Operating Conditions

Parameter

Symbol

V_IN

Min

5.5

-

Typ

Max

45.0

60

Unit

V

Power Supply Voltage (VIN) ^{(Note 1)}

Output Voltage (PCLIM)

13.0

V_PCLIM

-

V

LED Voltage (V_{CHn+1_CHn}

)

V_{CHn+1_CHn}

1.5

13.5

V

PWM Minimum Pulse Width

t_{MIN_100}

t_{MIN_26}

50

-

μs

(V_{SNS_100}1 LED: 3.0 V Vf Condition)^{(Note 2)}

PWM Minimum Pulse Width

100

(V_{SNS_26}1 LED : 3.0 V Vf Condition)^{(Note 2)}

Switching Frequency Setting Range

CHx Pin Allowable Pulse Current^{(Note 3)}

f_SW

I_PLSCHx

Topr

200

2.0

-40

-

550

-

kHz

A

Operating Temperature

+25

+125

°C

(Note 1) ASO should not be exceeded.

(Note 2) C_OUT= 12.5 µF, C_COMP= 0.22 µF, R_COMP= 470 Ω, R_SNS= 0.82 Ω, R_IS= 0.051 Ω, PWM frequency 200 Hz , COMPDIS [1:0]: 0,

Time when the LED current reaches 50 % of the setting from the start of PWM dimming lighting. Please refer to page 11 for the measured waveform.

(Note 3) Pulse width time 100 µs, Pulse current cycle 800 ms.

Recommended Setting Parts Range

Parameter

Symbol

C_IN

Min

1.0

0.10

700

0.047

4.7

0

Typ

2.2

0.22

1000

0.1

-

Max

-

Unit

μF

pF

μF

Ω

Capacitor Connecting to the VIN Pin^{(Note 4)}

Capacitor Connecting to the VDRV5 Pin^{(Note 4)}

Capacitor Connecting to the COMP Pin^{(Note 4)}

PGATE－PCLIM Capacitor^{(Note 4), (Note 5)}

BOOT, PSW Capacitor^{(Note 4)}

C_VDRV5

C_COMP

C_PGATE

C_BOOT, C_PSW

C_OUT

3.3

0.30

1500

0.15

20

DC/DC Output Capacitor^{(Note 4)}

Resistor Connecting to the COMP Pin

Resistor Connecting to the BOOT Pin

Resistor Connecting to the RT Pin

R_COMP

R_BOOT

470

47

750

56

38

Ω

R_RT

15

-

49

kΩ

(Note 4) Set the capacitor taking temperature characteristics, DC bias characteristics, etc. into consideration.

(Note 5) Regarding PMOS (M2), ROHM's: RSQ015P10 and ON semiconductor's: FDC3535 are assumed as basic parts.

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TSZ22111 • 15 • 001

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BD18364EFV-M

Electrical Characteristics (Unless otherwise specified V_IN= 13 V, Tj = -40 °C to +150 °C)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

[Total]

VIN Circuit Current 1

I_IN1

-

5

10

20

mA

V

V_EN= 0 V

VIN Circuit Current 2

I_IN2

-

10

V_EN= 5 V

VIN UVLO Detect Voltage

VIN UVLO Release Voltage

VIN UVLO Hysteresis Voltage

VDRV5 UVLO Detect Voltage

VDRV5 UVLO Release Voltage

V_INUVD

V_INUVR

V_INUVHYS

V_DRV5UVD

V_DRV5UVR

4.57

4.95

-

4.80

5.20

0.4

5.04

5.46

-

VIN Falling

VIN Rising

V

3.94

4.22

4.10

4.40

4.26

4.58

V

V_DRV5Falling

V_DRV5Rising

V

VDRV5 UVLO

Hysteresis Voltage

-

0.3

-

V_DRV5UVHYS

V

V_DRV5UVR- V_DRV5UVD

[Reference Voltage]

C_VDRV5= 2.2 μF

I_VDRV5= 0 mA to 10 mA

VDRV5 Reference Voltage

V_DRV5

4.85

45

5.00

5.15

V

VDRV5 Current Limit

[EN]

I_DRV5LM

-

mA

EN Pull Down Current

EN High Level Threshold Voltage

EN Low Level Threshold Voltage

EN Hysteresis Voltage

[OSCILLATOR]

I_EN

0.6

0.96

0.86

-

1.2

1.00

0.90

0.1

1.8

1.04

0.94

-

μA

V

V_EN= 5 V

V_ENIH

V_ENIL

V_ENHYS

V_ENRising

V_ENFalling

V_ENIH- V_ENIL

V

Switching Frequency

RT Output Voltage

f_SW

V_RT

270

-

300

0.8

330

-

kHz R_RT= 33 kΩ

V

SSFM Disable

SSFM [2:0] = 3

Spread Spectrum Sweep Frequency

f_SSFM

220

275

330

Hz

Spread Spectrum Frequency

Sweep Width

f_SSFMW

-

±6

-

%

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TSZ22111 • 15 • 001

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BD18364EFV-M

Electrical Characteristics – continued (Unless otherwise specified V_IN= 13 V, Tj = -40 °C to +150 °C)

Limit

Parameter

[N-ch Gate Driver]

Symbol

Unit

Conditions

Min

Typ

Max

GL ON Resistor High

R_GLH

R_GLL

-

1

2.5

1.5

-

Ω

I_GL= -10 mA

GL ON Resistor Low

0.6

60

I_GL= 10 mA

R_RT= 33 kΩ

Minimum OFF Time

t_OFFMIN

ns

[DC/DC Current Detection]

Over Current Detection Threshold Voltage

Leading Edge Blanking Time

Slope Compensation Current Ramp Peak

279

300

120

50

321

V_ISOCP

t_ISBLK

mV

ns

-

I_ISSLPP

μA

No Slope Compensation

Added

-

1.26

-

IS to COMP Level Shift Voltage

V_ISCMPLS

V

[Error Amplifier]

Trans Conductance

g_M

-

120

130

195

-

μs

μA

mV

V_SNS= 256 mV

V_SNS= 512 mV

V_SNS= 0 V

COMP Sink Current

COMP Source Current

ADIM OFF Threshold Voltage

I_COMPSI

I_COMPSO

V_{ADIM_0}

65

150

260

240

ADIM falling

V_SNS= 511.8 mV

VINDIM = 1

V_SNS= 511.8 mV

VINDIM = 2

V_SNS= 511.8 mV

VINDIM = 3

V_SNS= 511.8 mV

VINDIM = 4

V_SNS= 511.8 mV

VINDIM = 5

V_SNS= 511.8 mV

VINDIM = 6

V_SNS= 511.8 mV

VINDIM = 7

V_VINDIM1

V_VINDIM2

V_VINDIM3

V_VINDIM4

V_VINDIM5

V_VINDIM6

V_VINDIM7

6.40

6.93

7.41

7.97

8.47

8.95

6.92

7.49

8.02

8.62

9.17

9.69

7.48

8.10

V

8.67

VINDIM Start Voltage

9.32

9.90

10.46

g_VINDIM1

g_VINDIM2

g_VINDIM3

g_VINDIM4

g_VINDIM5

g_VINDIM6

g_VINDIM7

75

70

65

60

57

54

80

74

69

64

61

57

85

78

73

68

64

60

mV/V VINDIM = 1

mV/V VINDIM = 2

mV/V VINDIM = 3

mV/V VINDIM = 4

mV/V VINDIM = 5

mV/V VINDIM = 6

mV/V VINDIM = 7

VINDIM Derating Gain

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BD18364EFV-M

Electrical Characteristics – continued (Unless otherwise specified V_IN= 13 V, Tj = -40 °C to +150 °C)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

[Current Sense Amplifier]

V_SNSP- V_SNSN, V_SNSN= 40 V,

DCDIM [9:0] = 1023

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 552 (default)

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 410

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 325

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 278

V_{SNS_100}

V_{SNS_50}

V_{SNS_35}

V_{SNS_26}

V_{SNS_21}

V_{SNS_05}

496.4

248.5

173.8

128.4

103.2

21.7

511.8

256.2

179.2

133.1

107.6

25.6

527.1

263.9

184.6

137.7

111.9

29.5

mV

Current Sense Voltage

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 127

SNSN Voltage Dependence

Characteristics of Current

Sense Voltage

V_SNSN= 6 V to 40 V

DCDIM [9:0] = 552 (default)

ΔV_{SNS_LINE}

-0.5

-

+0.5

%

Current Sense Threshold

Resolution

Current Sense Threshold

Differential Non-linearity

Current Sense Input Voltage

Range

2.5/4.5

/1024

ΔV_{SNS_LSB}

ΔV_{SNS_DNL}

V_SNSND

I_SNSP

-

+3

-

mV

LSB

V

-3

-

4.0

49

18

-

V_SNSNRising

V_{SNSP_SNSN}= 511.8 mV

V_SNSN= 60 V

V_{SNSP_SNSN}= 511.8 mV

V_SNSN= 60 V

SNSP Input Current

SNSN Input Current

95

31

140

43

μA

I_SNSN

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 552 (default)

OCLIM [2:0] = 7

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 552 (default)

OCLIM [2:0] = 3

ΔV_{SNS_LIM7}

241.8

116.2

295.2

156.3

348.6

196.3

mV

LED Over Current Limit

Voltage

ΔV_{SNS_LIM3}

V_SNSP- V_SNSN, V_SNSN= 40 V

DCDIM [9:0] = 552 (default)

OCLIM [2:0] = 0 (default)

ΔV_{SNS_LIM0}

25.3

4.7

52.0

5.1

78.7

5.5

mV

V

Low Voltage between

PCLIM – PGATE Pin

V_PCLIM-PGATE

SGB Detect Voltage

V_SGBDET

V_SGBREL

3.0

4.0

11.1

13.6

20.7

21.7

mV

V_SNSFalling

V_SNSRising

SGB Release Voltage

[Over Voltage Protection]

V_SNSPRising

OVPSET [3:0] = 15

V_SNSPRising

OVPSET [3:0] = 10 (default)

V_SNSPRising

OVPSET [3:0] = 5

V_SNSPRising

OVPSET [3:0] = 0

V_{OVP_15}

V_{OVP_10}

V_{OVP_5}

V_{OVP_0}

V_OVPHYS

t_OVP

65.0

54.1

43.2

32.3

-

67.5

56.6

45.7

34.8

1.8

70.0

59.1

48.2

37.3

-

V

Over Voltage Protection

Voltage

V

Over Voltage Protection

Hysteresis Voltage

Over Voltage Register

Recovery Time

V

V_SNSPFalling

17

20

23

ms

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TSZ22111 • 15 • 001

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BD18364EFV-M

Electrical Characteristics – continued (Unless otherwise specified VIN = 13 V, Tj = -40 °C to +150 °C)

Limit

Parameter

Symbol

Unit

Conditions

Min

1.6

Typ

Max

2.4

[CH0 to CH8 Short Circuit Protection]

CH0, CH2, CH4, CH6, CH8

Short Circuit Protection

Voltage

V_CH0,V_CH2,V_CH4,V_CH6,V_CH8

Falling Monitor

V_CH8SCP

2.0

V

CH1, CH3, CH5, CH7 Short

Circuit Protection Voltage

CHx Short Circuit Protection

Hysteresis Voltage

V_CH1,V_CH3,V_CH5,V_CH7Falling

Monitor

V_CH7SCP

0.7

-

1.4

0.2

2.1

-

V

V_{SCP_HYS}

V_CH0to V_CH8Rising

CHxSCP Detect Time

CHxSCP Recovery Time

[By-pass Switch]

t_SCP

30

17

50

20

70

23

μs

t_SCPREC

ms

By-pass Switch ON Resistor

1

Between CHn+1, CHn

I_SW= 300 mA

R_CH

-

0.30

0.75

Ω

By-pass Switch ON Resistor

2

Between CH8, CH0

I_SW= 300 mA

R_CH80

V_CHLS

V_CHLO1

-

1.70

1.0

4.25

1.5

Ω

V

V_{CHn+1_CHn}Falling

LED Short Detection Voltage

0.7

4.5

V_{CHn+1_CHn}Rising

LED Open Detection Voltage

1

6.0

7.0

(LEDOPSETn = 0)

V_{CHn+1_CHn}Rising

LED Open Detection Voltage

2

V_CHLO2

13.5

15.0

16.5

V

(LEDOPSETn = 1)

LED Short Time

t_LS

80

100

200

120

230

μs

PWM Dimming Frequency

[A/D Convertor ]

A/D Resolution

f_PWM

170

Hz

FPWM [3:0] = 0

RES_ADC

-

8

-

bit

μs

MONIAD Input

A/D Conversion time

tADC

150

A/D Full Scale

Reference Voltage

V_FSRADC

-

V_DRV5

-

V

Integral Non-linearity

Differential Non-linearity

[Interface]

INL

-2

-

LSB

+2

DNL

FAULT_B Output Voltage Low

FAULT_B Leak Current

RX Input High Voltage

RX Input Low Voltage

RX Input Current

V_{FAULT_BOL}

I_{FAULT_B}

V_{RX_IH}

-

0.1

0

-

0.4

V

μA

V

I_{FAULT_B}= 5 mA

V_{FAULT_B}= 5.5 V

-

1

-

2.2

V_{RX_IL}

-

0.8

1

V

I_{RX_IN}

-

0

-

μA

V

V_RX= 5 V

V_RX= 0 V

I_TX= -1 mA

I_TX= 1 mA

RX Output Current

I_{RX_OUT}

V_{TX_OH}

V_{TX_OL}

-1

-

TX Output Voltage High

V_DRV5-0.4

-

V_DRV5

0.4

-

V

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TSZ22111 • 15 • 001

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BD18364EFV-M

Typical Performance Curves

(Unless otherwise specified VIN = 13 V, Tj = +25 °C)

Figure 42. VIN Circuit Current 1 vs VIN Supply Voltage

(EN = 0 V)

Figure 43. VIN Circuit Current 2 vs VIN Supply Voltage

(EN = 5 V)

Figure 44. VIN UVLO Detect/Release Voltage vs

Temperature

Figure 45. VDR5 Reference Voltage vs Temperature

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BD18364EFV-M

Typical Performance Curves – continued

(Unless otherwise specified VIN = 13 V, Tj = +25 °C)

Figure 46. Switching Frequency vs Temperature

(R_RT= 33 kΩ)

Figure 47. Current Sense Voltage V_{SNS_100}vs Temperature

(DCDIM [9:0] = 1023)

Figure 48. Current Sense Voltage V_{SNS_50}vs Temperature

(DCDIM [9:0] = 552)

Figure 49. Current Sense Voltage V_{SNS_35}vs Temperature

(DCDIM [9:0] = 410)

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TSZ22111 • 15 • 001

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BD18364EFV-M

Typical Performance Curves – continued

(Unless otherwise specified VIN = 13 V, Tj = +25 °C)

Figure 50. Current Sense Voltage V_{SNS_26}vs Temperature

(DCDIM [9:0] = 325)

Figure 51. Current Sense Voltage V_{SNS_21}vs Temperature

(DCDIM [9:0] = 278)

Figure 52. Current Sense Voltage V_{SNS_05}vs Temperature

(DCDIM [9:0] = 127)

Figure 53. Over Voltage Protection Voltage V_{OVP_15}vs

Temperature

(OVPSET [3:0] = 15)

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BD18364EFV-M

Typical Performance Curves – continued

(Unless otherwise specified VIN = 13 V, Tj = +25 °C)

Figure 55. LED Open Detection Voltage 1 vs Temperature

(LEDOPSETn = 0)

Figure 54. Over Voltage Resister Recovery Time vs

Temperature

Figure 56. LED Open Detection Voltage 2 vs Temperature

(LEDOPSETn = 1)

Figure 57. LED Short Detection Voltage vs Temperature

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BD18364EFV-M

Typical Performance Curves – continued

(Unless otherwise specified VIN = 13 V, Tj = +25 °C)

Figure 58. LED Short Time vs Temperature

Figure 59. PWM Dimming Frequency vs Temperature

(FPWM [3:0] = 0)

Figure 60. Low voltage between PCLIM – PGATE Pin vs

Temperature

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TSZ22111 • 15 • 001

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BD18364EFV-M

Application Examples

(VIN = 13 V, ILED = 316 mA at DCDIM [9:0] = 552, 8 LED)

D2

Cathode

L1

Q1

VIN

VOUT

D1

R_SNS2

R_SNS1

MP1

C_INP3

C_INP2

C_INP1

C_BOOT

C_OUT6C_OUT7C_OUT8

MN1

Anode

R_GL

C_PGATE

R_GMN

R_IS

C_OUT1

GND

C_OUT2C_OUT3C_OUT4C_OUT5

GND

R_BOOT

U1 BD18364EFV-M

PGND

IS

GL

PGND

PSW

1

30

29

28

27

26

25

24

23

IS

C_PSW

2

GL

PSW

PCLIM

SNSP

SNSN

PGATE

CH8

BOOT

C_VIN

BOOT

VIN

PCLIM

SNSP

SNSN

PGATE

3

R_VIN

BOOT

VIN

R_anode

4

VDRV5

SW

C2_VIN

EN

5

EN

VDRV5

LED board

C2_VDRV5

C_VDRV5

VDRV5

ADIM

RT

6

C_EN

R_ADIM1

VDRV5

ADIM

RT

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

7

ADIM

C_ADIM

R_ADIM2

8

CH7

R_RT

C_COMP

COMP

9

22

COMP

GND

MONIAD

FAULT_B

CS

CH6

CH5

VDRV5

R_MONIAD1

R_COMP

GND

10

11

12

13

14

15

21

20

19

18

17

16

CH4

CH3

CH2

CH1

CH0

VDRV5

C_MONIAD

R_MONIAD2

R_FLTB

R_CS1

GND

FAULT_B

GND

RX

UART

Communication

TX

Figure 61. Application Circuit

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BD18364EFV-M

Application Parts Choice Example

Parts

Component Name

Value

Product Name

Manufacture

Capacitor

C_INP1

C_INP2

C_INP3

C_VIN

4.7 µF

Open

GCM32ER71H475KA55#_X7R_±10 %

Murata

-

GCM32ER71H475KA55#_X7R_±10 %

-

0.1 µF

1000 pF

2.2 µF

1000 pF

0.01 µF

0.22 µF

0.01 µF

0.1 µF

1000 pF

0.1 µF

4.7 µF

Open

GCM188L81H104KA57#_-_±10 %

Murata

-

C2_VIN

C_VDRV5

C2_VDRV5

C_EN

GCM1882C1H102JA01#_CH_±5 %

GCM21BR71E225KA73#_X7R_±10 %

GCM1882C1H102JA01#_CH_±5 %

GCM188R92A102KA37#_X8R_±10 %

C_ADIM

C_COMP

C_MONIAD

C_BOOT

C_PSW

C_PGATE

C_OUT1

C_OUT2

C_OUT3

C_OUT4

C_OUT5

C_OUT6

C_OUT7

C_OUT8

R_IS

GCM188L81H103KA03#_-_±10 %

GCG188R91H224KA01#_X8R_±10 %

GCM188L81H103KA03#_-_±10 %

GCJ188R72A104KA01#_X7R_±10 %

GCM188R92A102KA37#_X8R_±10 %

GCJ188R72A104KA01#_X7R_±10 %

GCM32DC72A475KE02#_X7S_±10 %

-

Open

-

Open

-

4.7 µF

Open

GCM32DC72A475KE02#_X7S_±10 %

Murata

-

GCM32DC72A475KE02#_X7S_±10 %

-

LTR18

Resistor

0.051 Ω

10 Ω

ROHM

-

R_GL

MCR03

R_GMN

R_BOOT

R_VIN

Open

-

47 Ω

MCR03

ROHM

-

10 Ω

MCR03

R_ADIM1

R_ADIM2

R_RT

100 kΩ

Open

MCR03

-

33 kΩ

470

MCR03

ROHM

-

R_COMP

R_MONIAD1

R_MONIAD2

R_FLTB

R_CS1

MCR03

100 kΩ

10 kΩ

100 kΩ

0.51 Ω

0.30 Ω

Short

MCR03

R_SNS1

R_SNS2

R_anode

L1

LTR18

-

Coil

Tr

10 µH

MSS1278-103MLB

IRLR3110ZTRPBF

FDC3535

SST2907AHZG

RB098BM100FH

BD18364EFV-M

Coilcraft

Infineon

ON Semiconductor

ROHM

MN1

MP1

Q1

Diode

IC

D1

D2

U1

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BD18364EFV-M

I/O Equivalence Circuits

No

Name

No

Name

I/O Equivalence Circuits

VDRV5

2

30

GL

PGND

1

IS

GL

GND

PGND

VDRV5

PCLIM

BOOT

VIN

EN

3

29

BOOT

PSW

4

5

VIN

EN

PSW

GND

VIN

GND

VDRV5

6

VDRV5

7

ADIM

GND

VDRV5

8

RT

9

COMP

RT

COMP

GND

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BD18364EFV-M

I/O Equivalence Circuits - continued

No

Name

No

Name

I/O Equivalence Circuits

VDRV5

FAULT_B

MONIAD

GND

11

MONIAD

12

FAULT_B

GND

VDRV5

CS

RX

13

14

CS

RX

15

TX

GND

PCLIM

PGATE

PSW

25

28

PGATE

PCLIM

CH8

(CH[n+1])

16

17

18

19

20

21

22

23

24

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

GND

CH7

(CH[n])

・

PCLIM

・

SNSP

SNSN

26

27

SNSN

SNSP

CH0

GND

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BD18364EFV-M

Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

6. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

8. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

9. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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Operational Notes – continued

10. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 62. Example of Monolithic IC Structure

11. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

12. Thermal Shutdown Circuit (TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj

falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

13. Functional Safety

“ISO 26262 Process Compliant to Support ASIL-*”

A product that has been developed based on an ISO 26262 design process compliant to the ASIL level described in

the datasheet.

“Safety Mechanism is Implemented to Support Functional Safety (ASIL-*)”

A product that has implemented safety mechanism to meet ASIL level requirements described in the datasheet.

“Functional Safety Supportive Automotive Products”

A product that has been developed for automotive use and is capable of supporting safety analysis with regard to the

functional safety.

Note: “ASIL-*” is stands for the ratings of “ASIL-A”, “-B”, “-C” or “-D” specified by each product's datasheet.

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BD18364EFV-M

Ordering Information

B D 1

8

3

6

4

E F V

-

M E 2

Part Number

Package

Product Rank

EFV: HTSSOP-B30

M: For Automotive

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagram

HTSSOP-B30 (TOP VIEW)

Part Number Marking

LOT Number

BD18364EFV

Pin 1 Mark

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Physical Dimension and Packing Information

Package Name

HTSSOP-B30

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BD18364EFV-M

Revision History

Date

Revision

001

Changes

23.May.2022

New Release

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD18364EFV-M (新产品)
厂家：	ROHM
描述：	BD18364EFV-M是一款内置8通道旁路开关的升降压型LED驱动器。采用本IC可实现时序转向灯和动画灯点亮电路。旁路开关可利用微控制器通信单独控制ON和OFF。可通过电流限制电路来防止旁路开关控制时产生的过电流。通信开关驱动控制器微控制器驱动器
文件：	总65页 (文件大小：3249K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD18364EFV-M (新产品) [ROHM]

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