BD63800MUF-C_技术文档

Datasheet

40 V Max

Stepping Motor Driver for Automotive

BD63800MUF-C

General Description

Key Specifications

BD63800MUF-C is a bipolar low-consumption driver that

is driven by PWM current. Rated power supply voltage of

the device is 40 V, and rated output current is 1.35 A.

BD63800MUF-C has two input interface as driving mode:

CLK-IN and SPI-IN, and six excitation modes: Full step,

1/2, 1/4, 1/8, 1/16 and 1/32 step. Mix Decay Mode: the

seamless adjustment function of slow/fast decay ratio,

and Auto Decay Mode: Automatic switching function of

slow/fast decay, can realize the optimized control status

for all kinds of motor. In addition, BD63800MUF-C

operates with single power supply which can simplify the

set design.

◼ Supply Voltage Range:

◼ Output Current Rating (peak):

◼ Output Current Rating (DC):

◼ Output On Resistance (up and down):

◼ Operating Temperature Range: -40 °C to +125 °C

6.0 V to 28.0 V

1.35 A

1.21 A

0.75 Ω

Package

VQFN32FBV050

W (Typ) x D (Typ) x H (Max)

5.0 mm x 5.0 mm x 1.0 mm

Features

◼ AEC-Q100 Qualified ^{(Note 1)}

◼ Low ON Resistance DMOS Output

◼ CLK-IN Drive Mode

◼ PWM Constant Current Control (Separately Excited)

◼ Built-in Spike Noise Cancel Function

(No external noise filter is required)

◼ Supported Modes: Full step, 1/2, 1/4, 1/8, 1/16 and

1/32 step

◼ Excitation Mode Switching Timing Free

◼ Current Decay Mode Switch Function

Mix Decay: Linear Adjustment of

Slow Decay / Fast Decay Ratio

Auto Decay: Automatic Switch of

Slow Decay / Fast Decay

◼ Selectable Rotation Direction: Clockwise/Counter

Clockwise

Typical Application Circuits

PSB

12 V

C1

VCC

SCK

SDI

CSB

SDO

+

OUT1A

OUT1B

C2

M

GND

CLK

CWB

◼ Power Save Function

◼ Built-in Pull-down Resistors for Logic Input

◼ Power-on Reset Function

MCU

RHB

MODE0

MODE1

VCC

◼ Malfunction prevention function w/o power supply

(Ghost Supply Prevention Function)

◼ Thermal Shutdown Function (TSD)

◼ Thermal Warning Function (TW)

◼ Over Current Protection Function (OCP)

◼ Over Voltage Lock-out Function (OVLO)

◼ Under Voltage Lock-out Function (UVLO)

◼ Under Voltage Motor Hold Function

◼ Open Detection Function

5 V

OUT2A

OUT2B

R2

R1

DIAG1

DIAG2

GND

R3

R4

RREF

CR

◼ Stall Detection Function

◼ Adjacent Pin Short Protection

(Note 1) Grade 1

C5

R6

R5

5 V

Applications

◼ Head-up Display

◼ LED Headlight

etc.

MTH

GND

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.

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Contents

General Description........................................................................................................................................................................1

Features..........................................................................................................................................................................................1

Applications ....................................................................................................................................................................................1

Key Specifications ..........................................................................................................................................................................1

Package..........................................................................................................................................................................................1

Typical Application Circuits .............................................................................................................................................................1

Contents .........................................................................................................................................................................................2

Pin Configuration ............................................................................................................................................................................4

Pin Description................................................................................................................................................................................4

Block Diagram ................................................................................................................................................................................5

Function Description.......................................................................................................................................................................6

Detailed Description for Pin Function ..........................................................................................................................................6

CLK (Clock Input Pin for Micro Step).......................................................................................................................................6

MODE0, MODE1 (Motor Excitation Mode Selection Pin) ........................................................................................................6

CWB (Motor Rotation Direction Selection Pin) ........................................................................................................................7

RHB (Drive/Hold Mode Selection Pin).....................................................................................................................................7

PSB (Power Save Pin).............................................................................................................................................................7

VCC (Power Supply Pin) .........................................................................................................................................................8

GND (Ground Pin)...................................................................................................................................................................8

OUT1A, OUT1B, OUT2A, OUT2B (H-Bridge Output Pin)........................................................................................................8

RREF (Output Current Level Setting Pin)................................................................................................................................8

CR (Chopping Frequency Setting Pin).....................................................................................................................................9

MTH (Current Damping Method Setting Pin)...........................................................................................................................9

NC Pins ...................................................................................................................................................................................9

IC Backside Metal....................................................................................................................................................................9

PWM Constant Current control .................................................................................................................................................10

Current Decay Mode..............................................................................................................................................................11

Slow Decay Mode..................................................................................................................................................................11

Fast Decay Mode ..................................................................................................................................................................11

Mix Decay Mode....................................................................................................................................................................12

Auto Decay Mode..................................................................................................................................................................12

Translator Circuit Operation ......................................................................................................................................................13

Reset Operation ....................................................................................................................................................................13

Initializing sequence when power supply is turned on........................................................................................................13

Initialization sequence during motor operation...................................................................................................................13

Control Input Timing...............................................................................................................................................................14

Switching of CWB ..............................................................................................................................................................14

Switching of Motor Excitation Mode ...................................................................................................................................15

Cautions on Simultaneous Switching of CWB and Excitation Mode (MODE0, MODE1)....................................................15

Step Sequence......................................................................................................................................................................16

Step Sequence in Full Step Mode......................................................................................................................................16

Step Sequence in 1/2, 1/4, 1/8, 1/16 and 1/32 Step Modes...............................................................................................17

Drive Mode and Hold Mode.......................................................................................................................................................21

SPI Interface .............................................................................................................................................................................22

Examples of SPI Input / Output Sequence ............................................................................................................................23

SPI Bit Count Error Detection................................................................................................................................................24

Multi IC connection example..................................................................................................................................................24

Protection/Detection Functions .................................................................................................................................................25

Malfunction Prevention Function w/o Power Supply (Ghost Supply Prevention Function) ....................................................25

Thermal Shutdown Function (TSD) .......................................................................................................................................25

Thermal Warning Function (TW)............................................................................................................................................25

Over Current Protection Function (OCP)...............................................................................................................................25

Over Voltage Lock-out Function (OVLO) ...............................................................................................................................25

Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function .................................................................................26

Open Detection Function.......................................................................................................................................................26

Stall Detection Function.........................................................................................................................................................27

DIAG Output Selection Function............................................................................................................................................29

Control Register ........................................................................................................................................................................30

Control Register Map.............................................................................................................................................................30

Definition of each Control Register Bit...................................................................................................................................31

CR1 (0x01).........................................................................................................................................................................31

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CR2 (0x02).........................................................................................................................................................................31

CR3 (0x03).........................................................................................................................................................................31

CR5 (0x05).........................................................................................................................................................................31

CR6 (0x06).........................................................................................................................................................................31

CR7 (0x07).........................................................................................................................................................................32

CR1A (0x11).......................................................................................................................................................................32

CR2A (0x12) ......................................................................................................................................................................32

CR5A (0x15) ......................................................................................................................................................................33

CR6A (0x16) ......................................................................................................................................................................33

Status Register..........................................................................................................................................................................34

Status Register Map..............................................................................................................................................................34

Definition of each Status Register Bit ....................................................................................................................................35

SR1 (0x08).........................................................................................................................................................................35

SR2 (0x09).........................................................................................................................................................................35

SR3 (0x0A) ........................................................................................................................................................................36

SR5 (0x0C) ........................................................................................................................................................................36

SR6 (0x0D) ........................................................................................................................................................................36

SR7A (0x1E) ......................................................................................................................................................................37

SR8A (0x1F) ......................................................................................................................................................................37

Power-on Sequence .....................................................................................................................................................................38

Power Dissipation.........................................................................................................................................................................39

Thermal Calculation ..................................................................................................................................................................39

Absolute Maximum Rating............................................................................................................................................................40

Recommended Operating Condition.............................................................................................................................................40

Thermal Resistance......................................................................................................................................................................40

Electrical Characteristics...............................................................................................................................................................41

I/O Equivalence Circuit .................................................................................................................................................................43

Operational Notes.........................................................................................................................................................................44

1.

2.

3.

4.

5.

6.

7.

8.

Reverse Connection of Power Supply............................................................................................................................44

Power Supply Lines........................................................................................................................................................44

Ground Voltage...............................................................................................................................................................44

Ground Wiring Pattern....................................................................................................................................................44

Recommended Operating Conditions.............................................................................................................................44

Inrush Current.................................................................................................................................................................44

Testing on Application Boards ........................................................................................................................................44

Inter-pin Short and Mounting Errors ...............................................................................................................................44

Unused Input Pins ..........................................................................................................................................................44

Regarding the Input Pin of the IC ...................................................................................................................................45

Ceramic Capacitor..........................................................................................................................................................45

Thermal Shutdown Circuit (TSD)....................................................................................................................................45

Over Current Protection Circuit (OCP) ...........................................................................................................................45

9.

10.

11.

12.

13.

Ordering Information.....................................................................................................................................................................46

Marking Diagram ..........................................................................................................................................................................46

Physical Dimension and Packing Information...............................................................................................................................47

Revision History............................................................................................................................................................................48

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Pin Configuration

EXP-PAD

NC 25

16 NC

OUT1A 26

VCC 27

NC 28

15 OUT2A

14 VCC

13 NC

CR 29

12 GND

11 DIAG2

10 DIAG1

9 RHB

MTH 30

RREF 31

PSB 32

EXP-PAD

(TOP VIEW)

Pin Description

Pin No.

Pin Name

P/G/I/O

Function

1

CLK

CWB

Input

Micro step clock input pin

2

Motor rotation direction selection pin

Serial interface chip select pin

Serial interface clock pin

3

CSB

4

SCK

5

SDI

Serial interface data input pin

6

SDO

Output Serial interface data output pin

7

MODE0

MODE1

RHB

Input

Motor excitation mode selection pin

Motor drive / hold mode selection pin

8

9

10

DIAG1

DIAG2

OUT2A

OUT2B

OUT1B

OUT1A

CR

Output Protection / detection output pin

Output H-bridge output pin

11

15

18

Output H-bridge output pin

23

Output H-bridge output pin

26

Output H-bridge output pin

29

Output Chopping frequency setting pin

30

MTH

Input

Current decay mode setting pin

Output current level setting pin

Power save pin

31

RREF

PSB

32

14, 27

12, 20, 21

VCC

Power Input power supply pin

GND

Ground Ground pin

No-Connection

13, 28

NC

-

(Keep this pin open to avoid damage when it shorts with the VCC pin)

16, 17, 19,

22, 24, 25

-

No-Connection

Connect central EXP-PAD to GND

The central EXP-PAD and the corner EXP-PADs are shorted inside the package

-

EXP-PAD

Ground

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Block Diagram

CSB

SCK

SDI

PSB

VCC

Regulator

(For Logic)

SPI

Regulator

(For Analog)

SDO

CLK

CWB

MODE0

MODE1

RHB

Power-on Reset

H-bridge

Translator

OUT1A

OUT1B

DIAG1

DIAG2

GND

VCC

OSC

(System Clock)

H-bridge

Current Control

OUT2A

OUT2B

+

-

RREF

CR

GND

OSC

(PWM Control)

TSD/TW

OCP

OVLO

Mix Decay

Control

UVLO

Open Detection

Stall Detection

MTH

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Function Description

Detailed Description for Pin Function

CLK (Clock Input Pin for Micro Step)

The electrical angle changes by one step for each rising edge of input clock pulse.

The effect is also the same when ‘1’ is written to CLKP in the Control Register.

Noise introduced to the CLK pin can cause missteps in motor. Design the PCB layout so that noise will not affect the CLK

input easily.

MODE0, MODE1 (Motor Excitation Mode Selection Pin)

These pins set the motor excitation mode. The motor excitation mode can also be set through SM[2:0] in the Control

Register.

The setting change of excitation mode is forcibly reflected regardless of the clock pulse input to the CLK pin. Refer to P15

Switching of Motor Excitation Mode.

In case SM[2:0] is not used (SM[2:0] = ‘000’):

MODE1

MODE0

Excitation Mode

Full step

L

H

L

1/2 step

H

1/8 step

H

1/16 step

In case the MODE1 and MODE0 pins are not used (MODE1 = L and MODE0 = L):

SM2

0

SM1

0

SM0

0

Excitation Mode

Full step

1/2 step

0

1

0

1

0

1/8 step

0

1

1/16 step

Full step

1/2 step

1

0

1

0

1

0

1/4 step

1

1/32 step

In case both SM[2:0] and the MODE1, MODE0 pins are used:

SM2

0

MODE1 xor SM1

MODE0 xor SM0

Excitation Mode

Full step

1/2 step

0

1

0

1

0

1

0

1

0

1

0

1

0

1/8 step

0

1/16 step

Full step

1/2 step

1

1/4 step

1

1/32 step

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Detailed description for Pin function – continued

CWB (Motor Rotation Direction Selection Pin)

This pin sets the direction of the motor rotation. Changes in the CWB pin settings are reflected at the rising edge of the

following clock pulse input to the CLK pin. (Refer to P14 Switching of CWB)

The effect of the CWB pin is inverted when CWBP is ‘1’ in the Control Register.

CWBP

0

CWB

L

Rotation Direction

Clockwise

The phase of CH1 current output is advanced by 90° from the phase of CH2 current output.

Counter Clockwise

0

1

H

L

The phase of CH1 current output is delayed by 90° from the phase of CH2 current output.

Counter Clockwise

The phase of CH1 current output is delayed by 90° from the phase of CH2 current output.

Clockwise

H

The phase of CH1 current output is advanced by 90° from the phase of CH2 current output.

RHB (Drive/Hold Mode Selection Pin)

This pin selects modes from a drive mode where the IC drives output / a hold mode where the IC holds an electrical angle. In

the hold mode, the input clock pulse to the CLK pin is ignored and the micro stepping behavior in the internal translator

circuit is stopped. The logic of the RHB pin is inverted when RHBP register is ‘1’. Refer to a table below for each setting.

If MCU changes the motor excitation mode setting (the level of the MODE0 pin and the MODE1 pin and the value of SM[2:0]

register) during the hold mode, the actual excitation mode switches after changing from the hold mode to the drive mode.

RHBP

RHB

L

Mode

0

1

Hold mode

Drive mode

Hold mode

H

L

H

PSB (Power Save Pin)

This pin puts the IC in standby state and sets the motor output to open state. In standby state, the translator circuit is RESET

and the electrical angle is initialized.

Note that a maximum of 40 µs is necessary as the recovery period from the standby state to normal state when PSB is set

from ‘L’ to ‘H’. Refer to P13 Reset Operation.

PSB

L

H

Motor Output State

Standby State (RESET)

ACTIVE

The initial electrical angle of each excitation mode after RESET is as follows. (Refer to P16 Step Sequence)

Excitation mode

Full step

Initial electrical angle

45°

1/2 step

1/4 step

1/8 step

1/16 step

1/32 step

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Detailed description for Pin function – continued

VCC (Power Supply Pin)

Since the motor driving current flows into the VCC pin, design the PCB layout with low impedance by making the trace for

the VCC pin thick and short. VCC voltage has large fluctuations due to back electromotive force of the motor, PWM switching

noise etc. In order to stabilize VCC voltage level, place the bypass capacitors (ranged from 100 μF to 470 μF) as close as

possible to the VCC pin.

Larger capacitors are necessary especially when the application needs larger current or when the motor has large back

electromotive force. In addition, we recommend placing multilayer ceramic capacitors (ranged from 0.01 μF to 0.1 μF) in

parallel to the bypass capacitor. The purpose is to decrease the impedance of the power supply in a wide frequency

bandwidth.

Higher VCC voltage level than the rating is prohibited even for a moment.

Make sure to short all VCC pins on the PCB layout though they are shorted inside IC. When these are not shorted,

malfunction or destruction may occur because of current flow concentration.

Each power supply pin has a built-in clamper for preventing electrostatic damage. When a steep pulse signal or voltage,

such as a surge exceeding the absolute maximum rating is applied to power supply pins, the clampers are actuated and

destroyed. Therefore, do not exceed the absolute maximum rating. It is also recommended to attach a Zener diode that

matches the absolute maximum rating.

Between the VCC pins and the GND pins, diodes are inserted for preventing electrostatic damage. Note that the IC will be

destroyed if reversed voltage is applied between them.

GND (Ground Pin)

In order to reduce the noise caused by switching current and to stabilize the internal reference voltage of IC, design the PCB

layout to make the wiring impedance from these pins as low as possible to achieve the lowest electrical potential in any

operating conditions. Design the PCB layout so that it does not have common impedance with other GND patterns.

OUT1A, OUT1B, OUT2A, OUT2B (H-Bridge Output Pin)

Since the motor driving current flows into these pins, design the PCB layout with low impedance by making the trace for the

output pin thick and short. It is recommended to add Schottky diodes in case that the output voltage swings largely between

positive and negative side in an application with large current, and in case that the back electromotive voltage level is large.

Each output pin has a built-in clamper for preventing electrostatic damage. When a steep pulse signal or voltage, such as a

surge exceeding the absolute maximum rating is applied to the power supply pins, the clampers are actuated and destroyed.

Therefore, do not exceed the absolute maximum rating.

RREF (Output Current Level Setting Pin)

This pin is used to set output current level. The maximum output current value can be set by RREF voltage and

current-sensing resistor (RREF resistor).

푉

ꢀ

푅푅퐸퐹

퐼푂푈푇 =

× 14,900 [A]

푅푅퐸퐹

Where:

퐼_ꢁꢂꢃis the Maximum Output Current

ꢄ_ꢀꢀꢅꢆis the RREF Voltage [V]. 0.457 V (Typ).

ꢇ_ꢀꢀꢅꢆis the RREF Resistor [Ω]. 6.2 kΩ to 43 kΩ.

If the RREF pin is open, the output current is set to 700 mA. The minimum current that can be controlled by the RREF

resistor, will depend on L/R value of the motor coil and the minimum ON time of PWM Drive.

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Detailed description for Pin function – continued

CR (Chopping Frequency Setting Pin)

This pin is to set the output chopping frequency. Connect an external capacitance (470 pF to 1500 pF) and resistor (10 kΩ to

200 kΩ) to GND.

Refer to 3) CR Timer in P10 PWM Constant Current control for setting method of the chopping frequency.

In PCB, ensure that GND line from the external components has no common impedance with other GND patterns. Also

ensure that it is far from wires with steep pulses like square waves, etc. to prevent noise.

Both of capacitance and resistance must be attached when PWM constant current control is used. The control doesn’t work

correctly if the external voltage is applied to the CR pin.

MTH (Current Damping Method Setting Pin)

This pin is for setting the current decay method. It can be selected by changing the input voltage level.

Input voltage in the MTH pin

0.0 V to 0.3 V

Current Decay Method

Slow Decay

0.4 V to 1.0 V

Mix Decay

1.5 V to 2.0 V

Fast Decay

2.5 V or more, or open

Auto Decay

In case of using slow decay mode, connect MTH to GND. If MTH voltage is generated by a voltage divider composed of

resistors, select the resistance value in taking the outflow current (Max 2 μA) and the internal pull-up resistor (1 MΩ) into

consideration. Refer to P11 Current Decay Mode for each current decay method.

BD63800MUF-C

Internal Reg.

1 MΩ

MTH

2 µA

NC Pins

These are no connection pins. They are not connected electrically to the internal circuit of IC.

IC Backside Metal

VQFN32FBV050 package has a metal for heat dissipation on the back of the IC. Since the heat is supposed to be dissipated

through this metal, the metal must be connected to GND plane on substrate with soldering and GND pattern as large as

possible must be used for the sufficient heat dissipation area.

In addition, the backside metal is shorted to the back of the IC chip. So the backside metal is at GND potential. If it is shorted

to a potential other than GND potential, malfunction and destruction will occur. Don’t route signals other than GND potential

at the back-side of the IC

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Function Description – continued

PWM Constant Current control

1) Current Control Operation

The output current increases when the output transistor is turned on. When the current reaches the level set by RREF

resistor and DAC in IC, the current limit comparator operates, then the IC enters current decay mode. After a wait period

set by CR timer, the output transistor turns on again. This sequence repeats continuously.

2) Noise Canceling Function

To avoid misdetection of current-sense comparator caused by spike noise generated when the output turns ON, the IC

has a minimum ON time t_ONMIN(Blank time). The current detection is invalid for the minimum ON time after the output

transistor is turned on.

3) CR Timer

The CR pin is repeatedly charged and discharged between the VCRH and VCRL levels through the external capacitor and

resistor.

The detection of the current-sense comparator is disabled while charging from VCRL level to VCRH level.

This charging period is the minimum ON Time: t_ONMIN

.

After CR level reaches VCRH, CR starts discharging. During this discharge period, IC enters current decay mode when

the output current reaches the target current level.

When CR is discharged to VCRL level, IC recovers to output ON mode from current decay mode. At the same time, IC

starts charging again.

CR charging time: the minimum ON Time t_ONMINand CR discharge time t_DISCHARGEare determined by the following formula

(Typ) with external capacitor (C) and resistor (R). The sum of two parameters is the chopping cycle time t_CHOP

.

ꢀ×ꢀ^′

푡_{ꢁ푁푀ꢈ푁}

≈ 퐶 ×

× 푙푛 (_푉^푉ꢉ_ꢉꢀ^ꢀ−₋^ꢊ_ꢌ^._.^ꢋ_ꢊ

)

[s]

′

0.30

0.25

0.20

0.15

0.10

0.05

0.00

ꢀ+ꢀ

ꢌ+훼

푡_{퐷ꢈ푆ꢉ퐻퐴ꢀ퐺ꢅ}≈ 퐶 × ꢇ × 푙푛 (

)

[s]

ꢊ.ꢋ

푡_ꢉ퐻ꢁ푃

≈ 푡_{ꢁ푁푀ꢈ푁}ꢍ 푡_{퐷ꢈ푆ꢉ퐻퐴ꢀ퐺ꢅ}

Where:

ꢇ is the external resistor in the CR pin

퐶 is the external capacitor in the CR pin

ꢄ is the internal regulator output voltage. 5 V (Typ)

ꢇ^′is the internal impedance in the CR pin. 5 kΩ (Typ)

0

500

1000

C [pF]

1500

2000

ꢎ is referred to the chart to the right

ꢀ

ꢄ퐶ꢇ =

× ꢄ

ꢀ+ꢀ^ꢏ

Output Current

Target Current

0 mA

time

CR Voltage

VCRH

1.0 V (Typ)

VCRL

0.4 V (Typ)

Discharge Period

t_DISCHARGE

GND

time

Minimum ON Period Chopping Period

t_ONMIN

t_CHOP

Figure 1. Timing Chart of CR Voltage and Output Current

Use 10 kΩ or more for the resistor in the CR pin since CR level doesn’t reach VCRH level with lower resistor values. (10 kΩ

to 200 kΩ is recommended).

For the capacitor in the CR pin, the minimum ON time: t_ONMINwill become long by the capacitance value of over several

thousand pF. So note that output current may exceed the target current level depending on L and R values of the motor coils

(470 pF to 1,500 pF is recommended as the capacitance value).

Note that a very long chopping cycle time: t_CHOPcauses larger ripple in output current, smaller average output current and

lower rotation efficiency. Select the optimum value of the resistor and the capacitor for the CR pin to minimize motor sound

and distortion of output current waveform.

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PWM Constant Current control - continued

Current Decay Mode

BD63800MUF-C PWM realizes a PWM Constant Current Control with two kinds of decay state (Fast Decay/Slow Decay).

The following diagrams show the states of output transistors and paths of the motor regenerative current during current

decay period in each decay mode.

Fast Decay

Slow Decay

ON→OFF

OFF→ON

ON→OFF

OFF

ON

M

OFF→ON

Output ON

Current Decay

Figure 2. Paths of Regenerated Current during Current Decay

BD63800MUF-C implements 4 decay mode of combination of these decay states in order to realize optimized operation for

motor characteristics, excitation mode and pulse rate.

The features of each decay mode are as follows:

Slow Decay Mode

During current decay period, regenerative current decreases slowly because of smaller voltage between both ends of a

motor coil. It makes ripple on output current smaller and torque of motor higher.

However, (1) in the lower operating current condition, the output current increases because of lower controllability of current.

And (2) in using 1/2 step to 1/32 step with high-pulse-rate driving, the current waveform cannot follow the change of the

current target due to the influence of motor back electromotive voltage. As the result, the distortion and motor vibration are

increased.

Thus, this decay mode is suitable for Full step mode or low-pulse-rate driven 1/2 step to 1/32 step modes.

Fast Decay Mode

The regeneration current is decreased quickly, so distortion of the output current waveform is reduced even in the

high-pulse-rate driving condition

However, the average current is reduced by large ripple of output current. It causes (1) Motor torque reduction (This issue

can be solved by larger current limit setting though the rated output current must be satisfied) and (2) Heat Generation

caused by motor power loss.

If these points can be allowed, fast decay is stable for high-pulse rate 1/2 step to 1/32 step modes.

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BD63800MUF-C

PWM Constant Current control - continued

Mix Decay Mode

The mix decay mode can improve issues caused in both of slow and fast decay mode.

It can improve current controllability without increasing the current ripple by switching slow and fast decay states during

current decay period. In addition, the time ratio of slow decay and fast decay can be adjusted by the voltage applied to the

MTH pin. So it can provide the optimal control state for any kind of motors.

In decay state, period from t1 to t2 of the discharge section of the CR pin in the chopping cycle t_CHOPis the slow decay, and

the remaining interval from t2 to t3 is the fast decay. If the current doesn’t reach the target value during the period from t1 to

t2, the slow decay is skipped and only fast decay is applied.

t1

t2

t3

CR Voltage

1.0 V

MTH level

0.4 V

GND

time

Chopping Period

t_CHOP

Output Current

Target Current

0 A

time

Slow Decay

Fast Decay

Figure 3. CR Pin Voltage and Output Current during Mix Decay

Auto Decay Mode

In the auto decay mode automatically select fast decay and slow decay during decay state according to the difference

between the target current and the output current. It causes small current ripple and quick following for the change of target

current. For example, when target current drops and the output current is excess the target current, Fast decay is selected

as current decay mode.

Current waveform in Auto decay is shown below.

CLK

Target Current

Output

Current

Slow Decay

Fast

Decay

Target Current

Slow Decay

Fast

Decay

Figure 4. Current Decay by Auto Decay in Reducing Target Current

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10.Feb.2021 Rev.001

BD63800MUF-C

Function Description – continued

Translator Circuit Operation

This IC has a built-in translator circuit and can drive stepping motors by CLK-IN mode and SPI command. The operation of

the translator circuit in CLK-IN drive mode is described below.

Reset Operation

The translator circuit is initialized by power ON reset function and the PSB pin.

Initializing sequence when power supply is turned on

(1) Power-on in PSB = L (Recommended)

When power supply is turned on, the internal power-on reset function initializes IC. During PSB = L, IC is in standby state

and the motor output keeps open state. After PSB = Low to High, IC enters normal state and it can accept SPI command. In

this state, by setting ‘1’ to MOTEN in the control register CR1 by SPI, IC enters active state and the motor output becomes

active and the excitation starts in the initial electrical angle.

Note that there is 40 µs (Max) delay from the standby state to the normal state when PSB = L → H.

Standby State

Normal State

Active State

Delay

PSB

MOTEN = ‘1’

CSB

SCK

SDI

45°

135°

CLK

OUT1A

OUT1B

Motor Output: Open

Motor Output: Active

MODE0/MODE1/CWB = all low level, RHB = high level

(2) Power-on in PSB = H

When power supply is turned on, the Power-on reset function in IC operates and the IC is initialized. Then, by setting ‘1’ to

MOTEN in the control register CR1 by SPI, IC enters active state and the motor output becomes active and the excitation

starts in the initial electrical angle. However, there is a possibility that IC is not initialized normally if VCC rises up rapidly

because of no Power-on reset operation. In that case, set PSB level to ground level once after VCC rises up. (Refer to P38

Power-on Sequence and P14 Control Input Timing)

Initialization sequence during motor operation

Input a reset signal to the PSB pin to initialize translator circuit during motor operation. IC is reset only by the PSB pin

regardless of the other input signals. After reset, IC internal circuit enters the normal state and makes the motor output open.

Note that there is 40 µs (Max) delay from the standby state to the normal state when PSB = L → H.

Standby State

Normal State

Active State

Standby State

Normal State

Active State

Delay

PSB

MOTEN = ‘1’

CSB

SCK

SDI

45° 135°

225°

CLK

OUT1A

OUT1B

OUT2A

OUT2B

IOUT1

IOUT2

Motor Output: Open

Motor Output: Active

Motor Output: Open

MODE0/MODE1/CWB = all low level, RHB = high level

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BD63800MUF-C

Translator Circuit Operation - continued

Control Input Timing

The translator circuit operates at the rising edge of the CLK signal. The input timing shown below must be satisfied.

Note that there is a risk that the translator circuit will not operate as expected if input timing is violated.

There is 40 µs (Max) delay from the standby state to the normal state when PSB = L → H (Interval B). Note that SPI

command input during the delay period is not acceptable.

A

PSB

B

MOTEN = ‘1’

CSB

SCK

SDI

MOTEN(Internal Signal)

H

C

CLK

D

E

F

G

RHB, MODE0, MODE1, CWB

Symbol

Item

Required Time

20 μs (Min)

40 μs (Max)

4 μs (Min)

2 μs (Min)

1 μs (Min)

A

B

C

D

E

F

Low pulse width of PSB

Period from PSB rising edge to SPI command input start time

Cycle time of CLK

High pulse width of CLK

Low pulse width of CLK

Set-up time of RHB, MODE0, MODE1, CWB for CLK

Hold time of RHB, MODE0, MODE1, CWB for CLK

Setup time of MOTEN for CLK

G

H

Switching of CWB

The switch in CWB is reflected at the next rising edge of CLK after CWB is changed.

However, depending on the motor status at CWB switching, there are possibilities of step-out or misstep in motor when the

motor cannot follow the input even if the control input for driver IC is valid. Therefore, the transition sequence must be

evaluated with application condition well.

Clockwise

Counter Clockwise

45°

135° 225°

135° 45°

PSB

MOTEN = ‘1’

CSB

SCK

SDI

CWB

CLK

OUT1A

OUT1B

OUT2A

OUT2B

IOUT1

IOUT2

MODE0/MODE1 = all low level, RHB = high level

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BD63800MUF-C

Translator Circuit Operation - continued

Switching of Motor Excitation Mode

The excitation mode is switched at the timing of changing MODE0, MODE1 level regardless of CLK signal.

This product has a function which can prevent motor out-of-step caused by discrepancies of torque vector between transition

excitations. However, depending on the motor status at MODE0 and MODE1 switching, there are possibilities of step-out or

misstep in motor when the motor cannot follow the input even if the control input for driver IC is valid. Therefore, evaluate the

switching sequence of excitation mode fully.

Cautions on Simultaneous Switching of CWB and Excitation Mode (MODE0, MODE1)

Interval A is defined as the period from reset (PSB = L → H) to the 1^stCLK pulse input and Interval B is defined as the period

after the 1^stCLK pulse input as shown in the figure below.

Interval A

Interval B

PSB

MOTEN = ‘1’

CSB

SCK

SDI

MOTEN(Internal Signal)

CLK

Interval A

There is no constraint in switching CWB and the excitation mode.

During one CLK cycle or MOTEN = L, simultaneous switching of CWB and excitation mode should be

Interval B avoided. If this is violated, it is possible to have misstep of motor (extra one more step) and out-of-step in

motor.

Therefore, when switching CWB and excitation mode simultaneously, reset first the IC by setting PSB = L → H. Then set

CWB and excitation mode during interval A.

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BD63800MUF-C

Translator Circuit Operation – continued

Step Sequence

In motor stepping, Micro-step Position (MSP), IOUT current ratio and electric angle of each step are decided depending on

the excitation mode. The initial excited position is 45° in all excitation modes.

Step Sequence in Full Step Mode

Timing chart, MSP, IOUT current ratio and the electric angle for Full step mode are shown in the figure below.

({SM2, MODE1 xor SM1, MODE0 xor SM0} = ‘100’ or ‘000’, CWB = High)

MSP

PSB

CSB

SCK

SDI

’000 0000’ ‘110 0000’ ‘100 0000’ ‘010 0000’ ‘000 0000’ ‘110 0000’

CLK

OUT1A

OUT1B

OUT2A

OUT2B

IOUT1

IOUT2

MSP = ‘110 0000’

MSP = ‘000 0000’

OUT1A

100 %

45°

OUT2B

OUT2A

OUT1B

MSP = ‘100 0000’

MSP = ‘010 0000’

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BD63800MUF-C

Step Sequence - continued

Step Sequence in 1/2, 1/4, 1/8, 1/16 and 1/32 Step Modes

MSP, IOUT current ratio and the electric angle for 1/2, 1/4, 1/8, 1/16 and 1/32 step of each excitation mode are shown in the

figure below. (CWB = L)

Step Mode

{SM2, MODE1 xor SM1, MODE0 xor SM0}

% of Imax

Step angle

[°]

MSP[6:0]

111

1/32

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

0

011

1/16

56

010

1/8

28

110

1/4

14

101 / 001

Coil 1

Coil 2

0.0

1/2

7

111 0000

111 0001

111 0010

111 0011

111 0100

111 0101

111 0110

111 0111

111 1000

111 1001

111 1010

111 1011

111 1100

111 1101

111 1110

111 1111

000 0000

000 0001

000 0010

000 0011

000 0100

000 0101

000 0110

000 0111

000 1000

000 1001

000 1010

000 1011

000 1100

000 1101

000 1110

000 1111

100.0

99.9

99.5

98.9

98.1

97.0

95.7

94.2

92.4

90.4

88.2

85.8

83.1

80.3

77.3

74.1

70.7

67.2

63.4

59.6

55.6

51.4

47.1

42.8

38.3

33.7

29.0

24.3

19.5

14.7

9.8

0.0

4.9

9.8

2.8

5.6

57

58

59

60

61

62

63

0

14.7

19.5

24.3

29.0

33.7

38.3

42.8

47.1

51.4

55.6

59.6

63.4

67.2

70.7

74.1

77.3

80.3

83.1

85.8

88.2

90.4

92.4

94.2

95.7

97.0

98.1

98.9

99.5

99.9

8.5

29

30

31

0

11.2

14.1

16.9

19.7

22.5

25.3

28.1

30.9

33.8

36.6

39.4

42.2

45.0

47.8

50.6

53.4

56.2

59.1

61.9

64.7

67.5

70.3

73.1

75.9

78.8

81.5

84.4

87.2

15

0

1

2

1

3

4

2

1

5

6

3

7

8

4

2

1

9

10

5

11

12

6

3

13

14

7

15

4.9

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BD63800MUF-C

Step Sequence in 1/2, 1/4, 1/8, 1/16 and 1/32 Step Modes – continued

Step Mode

{SM2, MODE1 xor SM1, MODE0 xor SM0}

MSP[6:0]

% of Imax

Coil 1 Coil 2

Step angle

[°]

111

1/32

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

011

1/16

8

010

1/8

4

110

1/4

2

101 / 001

1/2

1

001 0000

001 0001

001 0010

001 0011

001 0100

001 0101

001 0110

001 0111

001 1000

001 1001

001 1010

001 1011

001 1100

001 1101

001 1110

001 1111

010 0000

010 0001

010 0010

010 0011

010 0100

010 0101

010 0110

010 0111

010 1000

010 1001

010 1010

010 1011

010 1100

010 1101

010 1110

010 1111

0.0

-4.9

100.0

99.9

99.5

98.9

98.1

97.0

95.7

94.2

92.4

90.4

88.2

85.8

83.1

80.3

77.3

74.1

70.7

67.2

63.4

59.6

55.6

51.4

47.1

42.8

38.3

33.7

29.0

24.3

19.5

14.7

9.8

90.0

92.8

9

-9.8

95.6

-14.7

-19.5

-24.3

-29.0

-33.7

-38.3

-42.8

-47.1

-51.4

-55.6

-59.6

-63.4

-67.2

-70.7

-74.1

-77.3

-80.3

-83.1

-85.8

-88.2

-90.4

-92.4

-94.2

-95.7

-97.0

-98.1

-98.9

-99.5

-99.9

98.5

10

11

12

13

14

15

16

17

18

19

20

21

22

23

5

6

101.2

104.1

106.9

109.7

112.5

115.3

118.1

120.9

123.8

126.6

129.4

132.2

135.0

137.8

140.6

143.4

146.2

149.1

151.9

154.7

157.5

160.3

163.1

165.9

168.8

171.5

174.4

177.2

3

4

5

7

8

2

9

10

11

4.9

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BD63800MUF-C

Step Sequence in 1/2, 1/4, 1/8, 1/16 and 1/32 step Modes – continued

Step Mode

{SM2, MODE1 xor SM1, MODE0 xor SM0}

MSP[6:0]

% of Imax

Coil 1 Coil 2

0.0

Step angle

[°]

111

1/32

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

011

1/16

24

010

1/8

12

110

1/4

6

101 / 001

1/2

3

011 0000

011 0001

011 0010

011 0011

011 0100

011 0101

011 0110

011 0111

011 1000

011 1001

011 1010

011 1011

011 1100

011 1101

011 1110

011 1111

100 0000

100 0001

100 0010

100 0011

100 0100

100 0101

100 0110

100 0111

100 1000

100 1001

100 1010

100 1011

100 1100

100 1101

100 1110

100 1111

-100.0

-99.9

-99.5

-98.9

-98.1

-97.0

-95.7

-94.2

-92.4

-90.4

-88.2

-85.8

-83.1

-80.3

-77.3

-74.1

-70.7

-67.2

-63.4

-59.6

-55.6

-51.4

-47.1

-42.8

-38.3

-33.7

-29.0

-24.3

-19.5

-14.7

-9.8

180.0

182.8

185.6

188.5

191.2

194.1

196.9

199.7

202.5

205.3

208.1

210.9

213.8

216.6

219.4

222.2

225.0

227.8

230.6

233.4

236.2

239.1

241.9

244.7

247.5

250.3

253.1

255.9

258.8

261.5

264.4

267.2

-4.9

-9.8

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

-14.7

-19.5

-24.3

-29.0

-33.7

-38.3

-42.8

-47.1

-51.4

-55.6

-59.6

-63.4

-67.2

-70.7

-74.1

-77.3

-80.3

-83.1

-85.8

-88.2

-90.4

-92.4

-94.2

-95.7

-97.0

-98.1

-98.9

-99.5

-99.9

13

14

15

16

17

18

19

7

8

9

4

-4.9

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BD63800MUF-C

Step Sequence in 1/2, 1/4, 1/8, 1/16 and 1/32 step Modes – continued

Step Mode

{SM2, MODE1 xor SM1, MODE0 xor SM0}

MSP[6:0]

% of Imax

Coil 1 Coil 2

Step angle

[°]

111

1/32

80

011

1/16

40

010

1/8

20

110

1/4

10

101 / 001

1/2

5

101 0000

101 0001

101 0010

101 0011

101 0100

101 0101

101 0110

101 0111

101 1000

101 1001

101 1010

101 1011

101 1100

101 1101

101 1110

101 1111

110 0000

110 0001

110 0010

110 0011

110 0100

110 0101

110 0110

110 0111

110 1000

110 1001

110 1010

110 1011

110 1100

110 1101

110 1110

110 1111

0.0

4.9

-100.0

-99.9

-99.5

-98.9

-98.1

-97.0

-95.7

-94.2

-92.4

-90.4

-88.2

-85.8

-83.1

-80.3

-77.3

-74.1

-70.7

-67.2

-63.4

-59.6

-55.6

-51.4

-47.1

-42.8

-38.3

-33.7

-29.0

-24.3

-19.5

-14.7

-9.8

270.0

272.8

275.6

278.5

281.2

284.1

286.9

289.7

292.5

295.3

298.1

300.9

303.8

306.6

309.4

312.2

315.0

317.8

320.6

323.4

326.2

329.1

331.9

334.7

337.5

340.3

343.1

345.9

348.8

351.5

354.4

357.2

81

82

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

9.8

83

14.7

19.5

24.3

29.0

33.7

38.3

42.8

47.1

51.4

55.6

59.6

63.4

67.2

70.7

74.1

77.3

80.3

83.1

85.8

88.2

90.4

92.4

94.2

95.7

97.0

98.1

98.9

99.5

99.9

84

21

22

23

24

25

26

27

85

86

87

88

11

12

13

89

90

91

92

93

94

95

96

6

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

-4.9

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BD63800MUF-C

Function Description – continued

Drive Mode and Hold Mode

The IC has a drive mode and a hold mode and the peak current for each mode can be set by SPI.

The drive mode = Not (hold mode) and this mode is determined by exclusive OR of the RHB pin and RHBP register.

The peak current in drive mode is determined by IRUN[3:0] register, and the peak current in hold mode is determined by

IHOLD[3:0] register. The percentage of peak current for each register value is shown below

IRUN[3:0]

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Peak Motor Current IRUN [%]

IHOLD[3:0]

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Peak Motor Current IHOLD [%]

(Note 1)

9.1

10.1

11.6

13.0

15.1

17.4

20.3

24.0

30.4

36.1

42.9

50.0

59.5

70.8

83.9

100.0

0.0

9.1

10.1

11.6

13.0

15.1

17.4

20.3

24.0

30.4

36.1

42.9

50.0

59.5

70.8

83.9

(Note 1) Open detection is disabled under this condition.

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BD63800MUF-C

Function Description – continued

SPI Interface

This IC supports Serial Peripheral Interface (SPI) to set parameter into IC and to read out status data from IC.

SPI frame structure is as follows,

SDI ADDR[7:4]

SDI ADDR[3:0]

SDI DATA[7:0]

CSB

SCK

SDI

MSB

6

5

4

3

2

1

LSB

MSB

6

5

4

3

2

1

LSB

SDO

SDO BYTE1 (For previous frame)

SDO BYTE2 (For previous frame)

The SPI transfer data length is 16 bits.

When CSB is ‘L’, the SPI is active and IC latches SDI data at the rising of SCK.

During CSB is ‘L’, the frame data is stored at every multiples of 16 SCK pulses.

The frame data is not latched internally if the number of SCK pulses is less than 16 after CSB becomes ‘L’ or after latching

frame data.

The structure of SPI address, data input and data output is described below,

SDI

SDO

Comment on Use

ADDR[7:4]

ADDR[3:0]

DATA[7:0]

BYTE1

BYTE2

Control Register CR1 Data Input

Data Output of CR1 and CR2

Control Register CR1 Data Input

Data Output of CR1 and SR1

Control Register CR1 Data Input

Data Output of CR1

ACR1

ASR1

NOP

ACR2

ASR1

NOP

SDICR1

XXh

SDOCR1

SDOSR1

00h

SDOCR2

SDOSR1

00h

ACR1

ASR2

NOP

SDOCR1

SDOSR2

00h

Data Output of SR1 and CR1

Data Output of SR1 and SR2

Data Output of SR1

XXh

ACR1

ASR2

NOP

XXh

SDOCR1

SDOSR2

00h

Data Output of CR1

NOP

XXh

00h

Data Output of SR2

NOP

XXh

00h

Dummy/Placeholder

ACR1, ACR2

ASR1, ASR2

SDICR1

: Control Register Address. Refer to P30 Control Register.

: Status Register Address. Refer to P34 Status Register.

: Control Register Data Input

SDOCRx, SDOSRx

NOP

XXh

: Data Output (x = 1, 2)

: Register Address outside the range

: Any Value

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SPI Interface - continued

Examples of SPI Input / Output Sequence

In writing data to Control Register, the addresses are specified by the first 4 bits, and the data in the last 8bits is stored.

Output data is output in 16 bit of the next frame from SDO. The data corresponding to the address indicated in the first 4 bits

is output in the first 8 bits of the next frame. The data corresponding to the address indicated in the next 4 bits is output in the

last 8 bits of the next frame.

Register is updated at the rising edge of 16th SCK pulse

CSB

SCK

ACR1

ACR2

ACR1 DATA

This data is stored in the register indicated by ACR1.

Output data at the specified address

SDI

ACR1 DATA

ACR2 DATA

SDO

In reading data from Status Register, the address is indicated in the first 4 bits and the next 4 bits.

It is not necessary to input values to the last 8 bits.

Output data is output in 16 bit of the next frame from SDO. The data corresponding to the address indicated in the first 4 bits

is output in the first 8 bits of the next frame. And the data corresponding to the address indicated in the next 4 bits is output in

the last 8 bits of the next frame.

Register is updated at the rising edge fo 16 th SCK pulse

CSB

SCK

ASR1

ASR2

xxh

SDI

This 8bit data is ignored.

Output data at the specified address

ASR1 DATA

ASR2 DATA

SDO

This IC supports a burst transfer. MCU can write data to registers continuously by inputting data in multiple of 16 to SCK and

SDI with CSB = ‘L’.

Registers are updated at the rising edge of every 16th SCK pulse

CSB

SCK

ACR1 ACR2 ACR1 DATA ACR1 ACR2 ACR1 DATA ACR1 ACR2 ACR1 DATA

ACR1 DATA ACR2 DATA ACR1 DATA ACR2 DATA

SDI

ACR1 DATA

SDO

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SPI Interface - continued

SPI Bit Count Error Detection

This IC supports SPI error check function. Then IC counts the SCK pulses during CSB = L and checks the count at the rising

edge of CSB. If the count is not a multiple of 16, SPI bit count error is detected.

(If there are no SCK pulses during CSB = L, any SPI bit count errors are not detected because of no effect for register

access.)

In case of single packet transfer

Loss of SCK

CSB

SCK

Addr1

Addr2

DATA

SDI

DIAG1

Error detection by fewer SCK pulses than 16.

In case of burst transfer

Mixed noise in SCK

CSB

SCK

SDI

Addr1

Addr2

DATA

Addr1

Addr2

DATA

Addr1

Addr2

DATA

Received as DATA

Received as packet

DIAG1

Error detection by SCK pulses is not equal to multiple of 16.

Multi IC connection example

MCU

BD63800MUF-C

CSB1

SCK

SDI

CSB

IC1

SCK

SDI

CSB1

SDO

CSB2

CSB3

SCK

SDI

BD63800MUF-C

CSB2

CSB3

CSB

IC2

SCK

SDI

A1 A2

A3 A4

A5 A6

SDO

BD63800MUF-C

Access to IC1

Access to IC2

Access to IC3

CSB

IC3

SCK

SDI

SDO

Figure 5. Example of Multi IC Connection

The Figure 5 shows the connection diagram and the access timing chart where three ICs are connected in parallel.

The pins SCK, SDI, SDO can be shorted to each other. The MCU can select the specific IC to write to Control Register and to

read from Status Register by controlling each CSB pin.

The SDO pin is CMOS type. But it switches to HiZ state during CSB = H. Therefore, the MCU can read data from specific IC even

if all SDOs are shorted.

If the MCU send command two or more ICs at the same time, each IC may output different levels. Note that large current flows in

the SDO pin in that case.

Also, the MCU input from SDO becomes HiZ when CSB pins of all ICs are set to ‘H’. Ensure that there is enough time of CSB = H

so that each IC’s output does not overlap. (Refer to t_DCSBSDO1, t_DCSBSDO2in SPI timing table in P41 Electrical Characteristics)

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Function Description – continued

Protection/Detection Functions

Malfunction Prevention Function w/o Power Supply (Ghost Supply Prevention Function)

This function prevents IC malfunction when there is no power supplied to the IC and a control signal^{(Note 1)}is input to the IC.

The voltage supplied to the power supply of this IC or other IC in the system is shorted through the electrostatic destruction

prevention diode from these input pins to the VCC. Therefore, there is no malfunction of the circuit even when voltage is

supplied to these input pins while there is no power supply.

(Note 1) control signal: Logic signals, MTH, RREF

Thermal Shutdown Function (TSD)

This IC has a built-in Thermal Shutdown circuit for protection against overheating. If the chip temperature of the IC is above

+175 °C (Typ), the motor output will become open. It will automatically return to normal operation when the temperature goes

below +150 °C (Typ). However, even when TSD is in operation, if heat is continuously applied externally, it will result in

thermal runaway and can lead to destruction of the IC.

Thermal Warning Function (TW)

This IC has a built-in temperature warning circuit to detect overheating. When the chip temperature of the IC is above the

level set by SPI, a temperature warning is output to the SDO and DIAG1/DIAG2 pins. The warning is cleared when

temperature goes down under the level set by SPI. Unlike Thermal Shutdown Function (TSD), IC keeps the motor control

operation even in Thermal Warning Function.

TWThr[3:0]

TW Threshold Level ON/OFF [˚C] (Typ)

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

65.7

71.4

77.1

82.8

88.4

/

33.8

39.8

45.9

51.9

58.0

64.0

70.1

76.1

82.2

94.1

99.8

105.4

111.1

116.8

122.4

128.1

133.8

139.5

145.1

150.8

88.2

94.2

100.3

106.3

112.4

118.4

124.5

Over Current Protection Function (OCP)

This IC has a built-in over current protection circuit as a countermeasure against destruction when the motor outputs are

shorted to each other, to VCC or to GND. This circuit latches the motor output to open state when the current is above the

specified level (reference value: 3 A in 25 °C, Typ) for 4 μs (Typ). The IC can only recover by power-on again or reset by the

PSB pin.

The overcurrent protection circuit is designed to prevent the breakdown of IC caused by overcurrent in abnormal conditions

such as shorted motor outputs. This protection is not intended to guarantee the protection of application circuit. Therefore,

do not design the protection of the system using this circuit function. After detecting over current, then power-on again or

recovery by reset while IC is still in abnormal state, the OCP operates repeatedly (‘latch → recover → latch’). Note that the IC

may generate heat and may lead to deterioration of the IC.

If the L value of the wiring is large, such as when the wiring during a shorted circuit to each other, to VCC or to GND is long,

there is a possibility of destruction of the IC after the over current has flowed and the output pin voltage suddenly jumps to a

value that is over the absolute maximum ratings.

If the current is below the OCP detection current level and above the output current rating level, the IC can heat up, exceed

Tjmax = 150 °C and then deteriorate, so current which exceeds the output rating should not be applied.

Over Voltage Lock-out Function (OVLO)

This IC has a built-in over voltage lock-out circuit to protect the IC output and the motor during power supply over voltage.

When the applied voltage to the VCC pin goes up to 32 V (Typ) or more, the motor output is set to OPEN. To prevent false

operation by noise, etc., the switching voltage has a 1 V (Typ) hysteresis and there is a 4 μs (Typ) mask time for the

detection time

Although the overvoltage lock out circuit is built-in, there is a possibility of destruction if the absolute maximum value for

power supply voltage is exceeded. Avoid to exceed the absolute maximum rating. Note that this circuit does not operate

during power save state.

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Protection/Detection Functions – continued

Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function

This IC has a built-in under voltage lock-out circuit to prevent malfunction of IC output caused by low level power supply to IC.

When the VCC pin is lower than the level set by SPI, IC set the motor output to open.

Under voltage motor hold mode can also be selected. In this mode, when IC detects low level of power supply, IC keeps

motor hold although the detected results are output to DIAG1/DIAG2 and Status Register.

These modes can be selected by setting UVM3 to UVM0 in the control register.

UVM3

UVM2

UVM1

UVM0

Mode

Protection

Hold

Operation

0

1

0

1

0

1

Motor output: Open during low voltage in VCC

Motor output: Hold during low voltage in VCC

(Note 1)

Others

Prohibited

-

(Note 1) In this mode, IC keeps the operation. But there is a possibility that the following status occurs. If each of protection/hold is set to UVM3 to UVM0, SDO

output normally.

•

SDO output unexpected logical value.

Protection/Detection function are turned off.

This switching voltage has hysteresis to prevent false operation by noise etc. Note that this circuit does not operate during

power save mode.

UVThr[3:0]

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

UV Threshold Level ON/OFF [V] (Typ)

3.92

4.29

4.67

5.04

5.41

5.78

6.15

6.52

6.89

7.26

7.64

8.01

8.38

8.75

9.12

9.49

/

4.53

4.96

5.39

5.82

6.24

6.67

7.10

7.53

7.96

8.39

8.82

9.24

9.67

10.10

10.53

10.96

Open Detection Function

This IC has a built-in open detection function.

It outputs open detection result to the SDO and DIAG1/DIAG2 pins when any of H-bridge output pins (OUT1A, OUT1B,

OUT2A, and OUT2B) become open.

The open detection is asserted when the open status keeps over 5.12 ms (Typ). The open detection is not asserted in the

following conditions because an internal timer counting the open period will be stopped. If the open state continues after

recovering from the following conditions, the timer starts to count-up again and the open detection will be asserted.

(1) In detection of TSD, OCP, UVLO^{(Note 1)}, OVLO

(2) In Hold mode with IHOLD = ‘0000’

(3) When Electric angle is 0°/180° (Stopping detection Only in OUT2 side), 90°/270° (Stopping detection Only in OUT1 side)

(Note 1) The open detection is available when under voltage motor hold mode is selected.

In case of fast motor rotation without chopping operation, the open status is detected even if the outputs are not open.

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Protection/Detection Functions – continued

Stall Detection Function

This IC has a built-in stall detection circuit.

Stall is detected by monitoring the back electromotive voltages at zero cross points.

If the motor gets stalled, the IC outputs the Status register value from the SDO pin by SPI and Stall detection result from the

DIAG1/DIAG2 pins.

Normal status

Stall status

OUT1 Output Current [A],

OUT1 Back Electromotive Voltage [V]

Sample Back Electromotive Voltage Waveform. (Actual

voltage level can be monitored only in OFF state of motor).

Output Current

Comparator

Level [V]

0

Time

Comparator

Level [V]

Above the comparator level

Below the comparator level

OUT2 Output Current [A],

OUT2 Back Electromotive Voltage [V]

Stall detection is turned on when CLK is within a

specified period. (The period is set by SpThr[7:0].)

Comparator

Level [V]

0

Time

Comparator

Level [V]

1st

2nd

3rd

4th

Stall Detection

Status

Not detected

Detected

The stall detection is asserted after four consecutive drop below the

comparator level in total of OUT1/OUT2 side. （In case of StCnt[1:0] = ‘10’)

DIAG2

Comparator Voltage Level: Set StThr[7:0] and BeGain2/BeGain referring to the table below

Unit [V] (all values are typical)

BeGain2/BeGain

StThr[7:0]

푛

‘0’/‘0’

‘0’/‘1’

‘1’/‘0’

‘1’/‘1’

0000 0000

0000 0001

0000 0010

0000 0011

0000 0100

:

0

1

Stall detection: Disabled

0.20

0.39

0.59

0.78

:

0.15

0.29

0.44

0.59

:

0.06

0.12

0.18

0.24

:

0.03

0.06

0.09

0.12

:

2

3

4

:

1111 1110

1111 1111

254

255

49.80

50.00

37.35

37.50

14.94

15.00

7.47

7.50

10

5

2

1

Calculation Formula

× 푛

51

× 푛

34

× 푛

34

× 푛

34

Comparator Hysteresis: Hysteresis is the share for Comparator Voltage Level. Set StHys[3:0] referring to the table below.

StHys[3:0]

0000

0001

0010

:

푚

0

Hysteresis (Typ)

4 %

8 %

12 %

:

1

2

1110

1111

14

15

60 %

64 %

Calculation Formula

4 × ꢐ푚 ꢍ 1ꢑ

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Stall Detection Function – continued

CLK-IN period condition where stall detection is enabled: Set SpThr[7:0] referring to the table below. Stall detection is

enabled when CLK-IN period is less than or equal to the values in the table.

SpThr[7:0]

0000 0000

0000 0001

0000 0010

:

Threshold setting of CLK-IN Period for Stall detection (Typ)

Stall detection: Disabled

20 µs

40 µs

:

1111 1110

1111 1111

5,080 µs

5,100 µs

Total count of asserting Stall detection: Set StCnt[1:0] referring to the table below. Stall detection is asserted when the back

electromotive voltage falls below the comparator level in consecutive certain times indicated in the table below.

StCnt[1:0]

Total times of stall status for asserting stall detection

1 time stall status

00

01

10

11

2 times consecutive stall status

4 times consecutive stall status

8 times consecutive stall status

Stall detection is available in 1/2, 1/4, 1/8, 1/16 and 1/32 step modes.

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Protection/Detection Functions – continued

DIAG Output Selection Function

This IC has DIAG output function.

The following detection results are output from the DIAG1/DIAG2 pins.

(1) Over Current Detection

(2) Open Detection

(3) Thermal Warning (TW)

(4) Thermal Shutdown (TSD)

(5) Stall Detection

(6) Under Voltage Detection

(7) Over Voltage Detection

(8) SPI Bit Count Error Detection

MCU can freely select detection/protection to output to the DIAG1 and DIAG2 pins by setting Control Register CR5A/CR6A.

In the initial state after the IC resets, DIAG1 outputs logical OR of all detection results mentioned above and DIAG2 outputs

only stall detection result. Refer to P33 CR5A (0x15) CR6A (0x16).

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Function Description – continued

Control Register

Control Register Map

Values in the bottom row are the default value after reset

5-bit

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Address

CWBP

RHBP

CLKP

MOTEN

StThr7

StThr6

StThr5

StThr4

01h(CR1)

0

IHOLD3

IHOLD2

IHOLD1

IHOLD0

IRUN3

IRUN2

IRUN1

IRUN0

02h(CR2)

03h(CR3)

05h(CR5)

06h(CR6)

07h(CR7)

11h(CR1A)

12h(CR2A)

15h(CR5A)

16h(CR6A)

0

-

EMC1

EMC0

UVM3

SM2

SM1

SM0

0

1

0

SpThr7

SpThr6

SpThr5

SpThr4

SpThr3

SpThr2

SpThr1

SpThr0

0

UVThr3

UVThr2

UVThr1

UVThr0

-

0

UVM2

0

AD4

BeGain

UVM1

-

0

UVM0

BeGain2

StCnt1

0

StCnt0

TwThr3

TwThr2

TwThr1

TwThr0

0

StHys2

0

1

0

StHys3

StHys1

0

StHys0

StThr3

StThr2

StThr1

StThr0

0

SelUV1

1

0

SelOV1

1

SelSPI1

SelSHORT1 SelOPEN1

SelTW1

SelTSD1

SelSTALL1

1

SelSPI2

0

1

SelTW2

0

1

SelTSD2

0

1

SelSHORT2 SelOPEN2

SelSTALL2

1

SelUV2

0

SelOV2

0

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Control Register - continued

Definition of each Control Register Bit

CR1 (0x01)

Symbol

Bit

Description

Motor rotation direction selection.

When CWBP = 1, the CWB pin logic is inverted.

CWBP

7

Refer to P7 CWB (Motor Rotation Direction Selection Pin)

Drive/Hold mode selection.

When RHBP = 1, the RHB pin logic is inverted.

In RHB xor RHBP = 0, Hold mode is selected

Refer to P7 RHB (Drive/Hold Mode Selection Pin)

CLKIN input. It’s recognized as CLKIN input to set ‘1’ to this bit. Internally the value is

cleared to ‘0’ automatically after receiving next rising edge of SCK. (Note that the

external CLK input is ignored during this period)

RHBP

CLKP

6

5

Refer to P6 CLK (Clock Input Pin for Micro Step)

Enable of H-bridge. Motor driving operation starts after ‘1’ is set to this bit. H-bridge is

open after ‘0’ is set to this bit.

Refer to P13 Translator Circuit Operation

MOTEN

4

Threshold setting for Stall detection. Stall detection is disabled in StThr[7:0]=’0000

0000’. When other values are set, Stall detection is enabled.

Refer to P27 Stall Detection Function

StThr[7:4]

[3:0]

CR2 (0x02)

Symbol

Bit

Description

Current ratio setting for the hold mode.

Refer to P21 Drive Mode and Hold Mode

IHOLD[3:0]

[7:4]

Current ratio setting for the drive mode.

Refer to P21 Drive Mode and Hold Mode

IRUN[3:0]

[3:0]

CR3 (0x03)

Symbol

Bit

Description

Switching slew rate setting for motor driver.

EMC[1:0]

[5:4]

'00': 12 V/µs, '01': 24 V/µs, '10': 96 V/µs, '11': 192 V/µs

Excitation mode selector.

Refer to P6 MODE0, MODE1 (Motor Excitation Mode Selection Pin)

SM[2:0]

UVM3

[2:0]

3

Selection bit for Protection /Hold mode in Under Voltage state.

Refer to P26 Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function

CR5 (0x05)

Symbol

Bit

Description

Threshold setting of stepping speed for Stall detection. 1 step = 20 µs (Typ). Stall

detection is enabled when the CLKIN period is smaller than this register. Stall

detection is disabled in SpThr[7:0]=’0000 0000’.

SpThr[7:0]

[7:0]

Refer to P27 Stall Detection Function

CR6 (0x06)

Symbol

Bit

Description

Threshold setting for UVLO

Refer to P26 Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function

UVThr[3:0]

[7:4]

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Definition of each Control Register Bit – continued

CR7 (0x07)

Symbol

Bit

Description

Address setting bit.

AD4 = ‘0’: Access to following registers is available.

CR1,CR2, CR3, CR5, CR6, SR1, SR2, SR3, SR5 and SR6

AD4 = ‘1’: Access to following registers is available.

CR1A, CR2A, CR5A, CR6A, SR7A and SR8A

AD4

7

Note that writing access to CR7 is available both in AD4 = ‘0’/‘1’ but reading access

to CR7 is available only in AD4 = ‘0’.

Gain setting for back electromotive voltage for Stall detection.

Refer to P27 Stall Detection Function

BeGain

6

Selection bit for Protection /Hold mode in Under Voltage state.

Refer to P26 Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function

UVM2, UVM1

[5:4]

CR1A (0x11)

Symbol

Bit

7

Description

Selection bit for Protection /Hold mode in Under Voltage state.

Refer to P26 Under Voltage Lock-out (UVLO) / Under Voltage Motor Hold Function

UVM0

Gain setting for back electromotive voltage for Stall detection.

Refer to P27 Stall Detection Function

BeGain2

StCnt[1:0]

TwThr[3:0]

6

Counter setting for Stall detection.

Refer to P27 Stall Detection Function

[5:4]

[3:0]

Threshold setting for Thermal warning

Refer to P25 Thermal Warning Function (TW)

CR2A (0x12)

Symbol

Bit

Description

Hysteresis setting for Stall detection.

Refer to P27 Stall Detection Function

StHys[3:0]

[7:4]

Threshold setting for Stall detection.

Refer to P27 Stall Detection Function

StThr[3:0]

[3:0]

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Definition of each Control Register Bit – continued

CR5A (0x15)

Symbol

Bit

Description

DIAG1 output selector for SPI bit count error detection result

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

7

SelSPI1

DIAG1 output selector for Over current protection

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

SelSHORT1

SelOPEN1

SelTW1

6

5

4

3

2

1

0

DIAG1 output selector for Open detection result

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

DIAG1 output selector for Thermal warning (TW)

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

DIAG1 output selector for Thermal shutdown (TSD)

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

SelTSD1

SelSTALL1

SelUV1

DIAG1 output selector for Stall detection result

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

DIAG1 output selector for Under voltage detection result

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

DIAG1 output selector for Over voltage detection result

‘1’: the detection result output to DIAG1. Refer to P29 DIAG Output Selection

Function.

SelOV1

CR6A (0x16)

Symbol

Bit

Description

DIAG2 output selector for SPI bit count error detection result

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

SelSPI2

7

DIAG2 output selector for Over current protection

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

SelSHORT2

SelOPEN2

SelTW2

6

5

4

3

2

1

0

DIAG2 output selector for Open detection result

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

DIAG2 output selector for Thermal warning (TW)

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

DIAG2 output selector for Thermal shutdown (TSD)

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

SelTSD2

SelSTALL2

SelUV2

DIAG2 output selector for Stall detection result

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

DIAG2 output selector for Under voltage detection result

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

DIAG2 output selector for Over voltage detection result

‘1’: the detection result output to DIAG2. Refer to P29 DIAG Output Selection

Function.

SelOV2

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Function Description – continued

Status Register

Status Register Map

Values in the bottom row are the default value after reset

5-bit

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

PAR

0

SPI

SHORT

OPEN

TSD

TW

STALL

Reserved

08h(SR1)

Errors1

0

OV

0

UV

0

PAR

0

ORErr

Reserved

09h(SR2)

Errors2

0

PAR

0

MSP6

MSP5

0

MSP4

0

MSP3

MSP2

MSP1

MSP0

0Ah(SR3)

Position

0

Sp7

0

Sp6

Sp5

0

Sp4

0

Sp3

Sp2

Sp1

Sp0

0Ch(SR5)

Speed

0

PAR

0

Sl6

Sl5

0

Sl4

0

Sl3

Sl2

Sl1

Sl0

0Dh(SR6)

StepLoss

0

OPEN1

0

PAR

0

MODE0pin MODE1pin

SHRT1AB

SHRT1BB

SHRT1AT

SHRT1BT

1Eh(SR7A)

In&Short1

0

RHBpin

0

CWBpin

0

SHRT2AB

0

SHRT2BB

0

SHRT2AT

0

SHRT2BT

0

PAR

0

OPEN2

0

1Fh(SR8A)

In&Short2

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Status Register - continued

Definition of each Status Register Bit

SR1 (0x08)

Symbol

Bit

Description

Parity bit for Status Register SR1. PAR value is calculated so that total of ‘1’ in SR1 is

even.

PAR

7

SPI input bit count check result. ‘1’ is set when total bit number during CSB = ‘L’ is not

multiple of 16. This bit is cleared by setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer

to P24 SPI Bit Count Error Detection.

OCP detection status. ‘1’ is set when over current status is detected. This bit is cleared

by PSB = L or VCC power down. SR7A[3:0] and SR8A[3:0] show the positions where

over current actually flows. Refer to P25 Over Current Protection Function (OCP).

Open detection status. ‘1’ is set when the open status is detected. This bit is cleared by

setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1. SR7A[6] and SR8A[6] show which of

OUT1/OUT2 is open. Refer to P26 Open Detection Function.

SPI

SHORT

OPEN

TSD

6

5

4

3

2

1

Thermal shutdown status. ‘1’ is set when TSD is detected. This bit is cleared by setting

CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer to P25 Thermal Shutdown Function (TSD).

Thermal warning status. ‘1’ is set when temperature of IC chip is over the threshold set

by SPI. This bit is cleared by setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer to P25

Thermal Warning Function (TW).

TW

Stall detection status. ‘1’ is set when stall is detected. This bit is cleared by setting

CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer to P27 Stall Detection Function.

STALL

SR2 (0x09)

Symbol

Bit

7

Description

Parity bit for Status Register SR2. PAR value is calculated so that total of ‘1’ in SR2 is

PAR

even.

ORErr

OV

6

5

OR output of bit 6 to bit0 in SR1

Over voltage lock-out status. ‘1’ is set when ‘over voltage’ is detected. This bit is

cleared by setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer to P25 Over Voltage

Lock-out Function (OVLO)

Under voltage lock-out status. ‘1’ is set when ‘under voltage’ is detected. This bit is

cleared by setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1. Refer to P26 Under Voltage

Lock-out (UVLO) / Under Voltage Motor Hold Function.

UV

4

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Definition of each Status Register Bit – continued

SR3 (0x0A)

Symbol

Bit

Description

Parity bit for Status Register SR3 PAR value is calculated so that total of ‘1’ in SR3 is

even.

PAR

7

Micro step position. MSP is updated by CLK-IN input based on the excitation mode

and CW setting. But MSP is not updated when CLK-IN is input during TSD, OCP,

OVLO, UVLO and Open detection because the motor is turned off. And MSP is also

not updated in the hold mode (including under voltage motor hold mode.) where

CLK-IN is ignored.

MSP[6:0]

[6:0]

Refer to P16 Step Sequence

SR5 (0x0C)

Symbol

Bit

Description

CLK-IN stepping period. Sp shows the period between the rising edge of last two

CLK-IN. 1 step is 20 us (Typ) and the maximum period is 5.1 ms (Typ) at Sp[7:0] =

‘1111 1111’. IC keeps the maximum value if the period is longer than it.

Sp[7:0]

[7:0]

SR6 (0x0D)

Symbol

Bit

7

Description

Parity bit for Status Register SR6. PAR value is calculated so that total of ‘1’ in SR6 is

PAR

even.

Step Loss Counter. IC counts CLK-IN input while the motor is in open state by

TSD/OCP/UVLO/OVLO. The maximum number is 127 pulses (Sl[6:0] = ‘111 1111’). IC

keeps the maximum value if more CLK-IN pulses are input.

In the hold mode where CLK-IN is no available, Sl is not updated even in the protected

state.

Sl[6:0]

[6:0]

This bit is cleared by setting CLKP = ‘0’ and MOTEN = ‘1’ in CR1.

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Definition of each Status Register Bit – continued

SR7A (0x1E)

Symbol

Bit

Description

Parity bit for Status Register SR7A. PAR value is calculated so that total of ‘1’ in SR7A

is even.

PAR

7

Output of Open detection result for OUT1. ‘1’ is set when the open status is detected.

This bit goes back ‘0’ when the open state is cleared.

OPEN1

6

5

4

3

2

1

0

MODE0pin

MODE1pin

SHRT1AB

SHRT1BB

SHRT1AT

SHRT1BT

Output of the MODE0 pin logic level

Output of the MODE1 pin logic level

Short status of OUT1A - GND. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT1B - GND. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT1A - VCC. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT1B - VCC. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

SR8A (0x1F)

Symbol

Bit

7

Description

Parity bit for Status Register SR8A. PAR value is calculated so that total of ‘1’ in SR8A

PAR

is even.

Output of Open detection result for OUT2. ‘1’ is set when the open status is detected.

This bit goes back ‘0’ when the open state is cleared.

OPEN2

6

5

4

3

2

1

0

RHBpin

Output of the RHB pin logic level

Output of the CWB pin logic level

CWBpin

SHRT2AB

SHRT2BB

SHRT2AT

SHRT2BT

Short status of OUT2A - GND. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT2B - GND. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT2A - VCC. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

Short status of OUT2B - VCC. ‘1’ is set when the short status is detected.

This bit is cleared by PSB = L or VCC power down.

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Power-on Sequence

To initialize this IC completely in power-on, follow the sequences shown below.

t1 > 1 µs, t2 > 0 µs, t4 > 0 µs (all Typ). Refer to P14 Control Input Timing for t3 and t5.

If t1 > 1 µs is not satisfied, there is a possibility that IC is not initialized completely because of no power-on reset operation by

steep rise of VCC. In that case, PSB should be set to GND level once after the rise of VCC.

Case of power-on with PSB = L

Case of power-on with PSB = H

VCC

6.0 V

To initialize this IC completely,

set PSB to GND level once

after rise of VCC if t1 > 1 µs

cannot be satisfied.

0.8 V

GND

t1

t2

t1

t4

PSB

GND

PSB

GND

V_INH

V_INL

t3

t5

t3

V_INH

V_INL

V_INH

SCK/SDI/CSB

GND

SCK/SDI/CSB

GND

V_INL

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Power Dissipation

In consideration of the IC’s power consumption (W), thermal resistance (θ_JA), and ambient temperature (Ta), confirm that the

IC’s chip temperature Tj is not over 150 °C. When Tj = 150 °C is exceeded, the functions as a semiconductor do not operate

and problems such as parasitism and leaks occur. Constant use under these circumstances leads to deterioration and

eventually destruction of the IC. Tjmax = 150 °C must be strictly obeyed under all circumstances.

Thermal Calculation

The power consumption of this IC can be estimated roughly. The calculation formula in case of Full step mode in slow decay

mode is shown below:

Self-power consumption in V_CC

:

ꢄ_ꢉꢉ× 퐼_ꢉꢉ

[W]

(1)

(2)

(3)

Output DMOS power consumption during output ON:

ꢇ_ꢁ푁퐻ꢍ ꢇ_ꢁ푁퐿× 퐼_ꢁꢂꢃ^ꢒ× 2 × 표푛_푑푢푡푦

ꢐ

ꢑ

Output DMOS power consumption during decay:

2 × ꢇ_ꢁ푁퐿× 퐼_ꢁꢂꢃ^ꢒ× 2 × ꢐ1 ꢓ 표푛_푑푢푡푦ꢑ [W]

IC total power consumption:

ꢐ ꢑ ꢐ ꢑ ꢐ ꢑ

푊_{ꢃꢁꢃ퐴퐿}= 1 ꢍ 2 ꢍ 3

[W]

Junction temperature:

푇푗 = 푇푎 ꢍ 휃_퐽퐴× 푊_{ꢃꢁꢃ퐴퐿}

[°C]

Where

ꢄ

ꢉꢉ

is the power supply voltage [V].

퐼_ꢉꢉ

is the circuit current [A] without motor load.

is the motor output current [A].

is the Upper Pch DMOS ON Resistance [Ω]. 0.45 Ω in BD63800MUF-C (Typ).

퐼_ꢁꢂꢃ

ꢇ_ꢁ푁퐻

ꢇ_ꢁ푁퐿

is the Lower Nch DMOS ON Resistance [Ω]. 0.30 Ω in BD63800MUF-C (Typ).

푡_ꢁ푁

표푛_푑푢푡푦

푡_ꢉ퐻ꢁ푃

=

푡_ꢉ퐻ꢁ푃

is the chopping cycle time [s], which depends on the CR pin. Refer P10 PWM Constant Current control for

details.

푡_ꢁ푁

is the CR charging period during 푡_ꢉ퐻ꢁ푃[s], which depends on the L and R values of the motor coil and the

current setting. Confirm by actual measurement, or make an approximate calculation.

is the ambient temperature [°C].

푇푎

휃_퐽퐴

is the thermal resistance from junction to ambient [°C/W].

Note that the thermal resistance value θ_JA[°C/W] differs greatly depending on circuit board conditions. ROHM provides a

service to measure the thermal resistance θ_JAwith a PCB which customers actually designed. Contact us about this service.

The calculated values above are only theoretical. For actual thermal design, perform sufficient thermal evaluation for the

application board used, and make the thermal design with enough margin so as not to exceed Tjmax = 150 °C.

Consider attaching an external Schottky diode between the motor output pin and the GND pin / the VCC pin to abate heat

from the IC if the IC is used under particularly severe heat conditions. (This counter measure is not necessary for normal

use)

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Absolute Maximum Rating

(Ta = 25 °C)

Item

Symbol

V_CC

Rated Value

-0.2 to +40.0

-0.2 to +7.0

1.21^{(Note 1)}

1.35^{(Note 1)}

-55 to +150

+150

Unit

Supply Voltage

V

Input Voltage for Control Pin

Output Voltage for Control Pin

Output Current (Steady-state)

Output Current (Peak)^{(Note 2)}

Storage Temperature Range

Maximum Junction Temperature

V_IN

V

V_OUT

I_OUT

A/Phase

°C

I_OUTPEAK

Tstg

Tjmax

°C

(Note 1) Do not exceed Tjmax = 150 °C.

(Note 2) Pulse width tw ≤ 1 ms, duty 20 %

Caution 1:Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2:Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing

board size and copper area so as not to exceed the maximum junction temperature rating.

Recommended Operating Condition

Item

Operating Temperature

Supply Voltage

Symbol

Topr

Min

-40

6.0

Typ

+25

12.0

Max

+125

28.0

Unit

°C

V

V_CC

Thermal Resistance ^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^(Note4)

VQFN32FBV050

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

89.20

10.00

30.80

7.00

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A (Still-Air).

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

(Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

Board Size

Single

FR-4

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

70 μm

Footprints and Traces

Layer Number of

Measurement Board

Thermal Via^{(Note 5)}

Material

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

FR-4

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

70 μm

Copper Pattern

Thickness

35 μm

Copper Pattern

Thickness

70 μm

Footprints and Traces

74.2 mm x 74.2 mm

(Note 5) This thermal via connects with the copper pattern of all layers.

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Electrical Characteristics

(Unless otherwise specified V_CC= 8.0 V to 28.0 V, Ta = -40 °C to +125 °C)

Limit

Item

Symbol

Unit

Conditions

Min

Typ

Max

Whole

Standby Circuit Current

Circuit Current

I_CCST

I_CC

-

0.1

3.5

10.0

µA

PSB = L

-

mA

PSB = H, RREF = 6.2 kΩ

Control input (CLK, CWB, MODE0, MODE1, RHB, PSB, SCK, SDI, CSB)

H Level Input Voltage

L Level Input Voltage

V_INH

V_INL

I_INH

I_INL

2.0

-

V

0.8

100

-

H Level Input Current

35

-10

50

0

µA

V_IN= 5.0 V

V_IN= 0.0 V

L Level Input Current

Output(OUT1A, OUT1B, OUT2A, OUT2B)

I_OUT= ±0.5 A, Total of

upper and lower side

Output On Resistance

R_ON

-

0.75

1.50

Ω

Output Leakage Current

Output Rising Slew Rate

Output Falling Slew Rate

Current Control Unit

Maximum Output Current

PWM Frequency

I_LEAK

t_R

-

0.1

2.0

10.0

µA

µs

-

V_CC= 24 V

EMC[1:0] = ‘00’

t_F

I_OMAX

f_PWM

0.99

1.10

25.0

74

1.21

A

kHz

µA

V

RREF = 6.2 kΩ

-

C = 1000 pF, R = 39 kΩ

RREF = 6.2 kΩ

RREF Outflow Current

RREF Output Voltage

MTH Input Current

I_RREF

V_RREF

I_MTH

-

0.457

-5

-

-10

0

-

µA

V

MTH = 0 V

MTH Input Voltage Range

Minimum ON Time (Blank Time)

DIAG Output (DIAG1, DIAG2)

Output L Voltage

V_MTH

t_ONMIN

-

3.5

1.5

0.3

0.8

µs

C = 1000 pF, R = 39 kΩ

V_OLD

I_OD

-

0.15

0

0.50

10

V

I_LOAD= -1 mA

Output Leakage Current

SDO Output

µA

V_DG= 5 V

Output H Voltage

V_OHS

V_OLS

I_OS

4.50

4.85

0.15

0

-

V

I_LOAD= +1 mA

I_LOAD= -1 mA

V_SDO= 5 V

Output L Voltage

-

0.50

10

Output Leakage Current

Protection circuit

µA

-

Thermal Shutdown ON Temperature

T_TSDON

175.0

150.0

150.8

124.5

5.04

°C

V

Thermal Shutdown OFF Temperature T_TSDOFF

Thermal Warning ON Ambient Temp

Thermal Warning OFF Ambient Temp

Low Voltage Protection ON Voltage

Low Voltage Protection OFF Voltage

Over Voltage Protection ON Voltage

T_TAON

T_TAOFF

V_UVON

V_UVOFF

V_OVON

TWThr = ‘1111’

UVThr = ‘0011’

5.82

V

32.0

V

Over Voltage Protection OFF Voltage V_OVOFF

Output Load Open Detection Time t_LOPEN

31.0

V

5.12

ms

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Electrical Characteristics - continued

(Unless otherwise specified V_CC= 8.0 V to 28.0V, Ta = -40 °C to +125 °C)

Specification

Item

Symbol

Unit

Conditions

Min

Typ

Max

SPI Timing

SPI Clock Cycle

t_SCK

t_HSCK

t_RSCK

t_FSCK

1

200

-

µs

ns

µs

ns

µs

ns

SPI Clock High Time Range

SPI Clock Rise Time

-

1

SPI Clock Fall Time

-

1

SPI Clock Low Time Range

SDI Setup Time for SCK

SDI Hold Time for SCK

CSB High Time

t_LSCK

200

50

200

1

-

t_STSDI

t_HDSDI

t_HCSB

t_STLCSB

t_HDHCSB

-

CSB Low Setup Time for SCK

CSB High Hold Time for SCK

-

200

-

SDO Delay Time for CSB Rising Edge t_DCSBSDO1

250

R_L= 1.5 kΩ, C_L= 10 pF

SDO Delay Time for CSB Falling

Edge

SDO Delay Time for SCK

t_DCSBSDO2

t_DSCKSDO

-

250

100

ns

t_STLCSB

t_HDHCSB

t_HCSB

CSB

t_SCK

t_FSCK

t_RSCK

t_LSCK

2.0 V

0.8 V

SCK

t_HSCK

t_STSDI

t_HDSDI

SDI

t_DCSBSDO2

t_DSCKSDO

t_DCSBSDO1

4.5 V

0.5 V

HiZ

SDO

Figure 6. SPI Timing Chart

BD63800MUF-C

SDO

MCU

R_L

C_L

Figure 7. SDO Load Model

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I/O Equivalence Circuit

Internal Reg.

SCK, SDI,

CSB,

PSB,CLK,

CWB,

MTH

RHB,MODE0,

MODE1

Internal Reg.

CR

RREF

Internal Reg.

VCC

OUT1A,

OUT1B,

OUT2A,

OUT2B

DIAG1,

DIAG2

SDO

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

7.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

8.

9.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

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Operational Notes – continued

10. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 8. Example of Monolithic IC Structure

11. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

12. Thermal Shutdown Circuit (TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj

falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

13. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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10.Feb.2021 Rev.001

BD63800MUF-C

Ordering Information

B D 6 3 8 0 0 M U F

-

C E 2

Package

Product Rank

MUF: VQFN32FBV050

C: for Automotive

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagram

VQFN32FBV050 (TOP VIEW)

Part Number Marking

6 3 8 0 0

LOT Number

Pin 1 Mark

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TSZ02201-0P2P0C702070-1-2

10.Feb.2021 Rev.001

46/48

BD63800MUF-C

Revision History

Date

Revision

001

Changes

10.Feb.2021

The first edition

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10.Feb.2021 Rev.001

Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD63800MUF-C
厂家：	ROHM
描述：	BD63800MUF-C是一款电源额定电压40V、额定输出电流1.35A的低功耗双极PWM恒流驱动的驱动器。输入接口采用CLK-IN驱动方式和SPI-IN驱动方式。励磁模式支持Full step、1/2 step、1/4 step、1/8 step、1/16 step、1/32 step模式。电流衰减方式备有可自由设置Fast decay / Slow decay 比例的Mix decay模式和可自动选择Fast decay / Slow decay的Autodecay模式，可使各种电机实现理想的控制状态。另外，电源也可以用1个系统进行驱动，使配套应用的设计更容易。电机驱动驱动器
文件：	总51页 (文件大小：1265K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD63800MUF-C [ROHM]

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