BD7691FJ [ROHM]
作为AC/DC用功率因数校正转换器(Power Factor Correction: PFC),本产品为所有需要改善功率因数的产品提供优良系统。PFC部采用临界模式(BCM),可通过Zero Current Detection降低开关损耗和噪声。采用基于电阻的零电流检测方式,无需ZCD用辅助绕组。;![BD7691FJ](http://pdffile.icpdf.com/pdf2/p00358/img/icpdf/BD7691FJ_2196288_icpdf.jpg)
型号: | BD7691FJ |
厂家: | ![]() |
描述: | 作为AC/DC用功率因数校正转换器(Power Factor Correction: PFC),本产品为所有需要改善功率因数的产品提供优良系统。PFC部采用临界模式(BCM),可通过Zero Current Detection降低开关损耗和噪声。采用基于电阻的零电流检测方式,无需ZCD用辅助绕组。 开关 CD 功率因数校正 转换器 |
文件: | 总25页 (文件大小:2200K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Datasheet
DC/DC Driver
Power Factor Correction Controller IC
BD7691FJ
General Description
Key Specifications
BD7691FJ is Power Factor Correction for AC/DC supplies
the system which is suitable for all the products needing
power factor improvement. The PFC adopts boundary
conduction mode (BCM), and switching loss reduction and
noise reduction are possible by Zero Current Detection(ZCD).
ZCD detects by resistance, the auxiliary winding is
unnecessary.
Input Voltage Range:
Operating Current:
Max Frequency:
Operating Temperature Range: -40°C to +105°C
10V to 26V
360uA(Typ)
220kHz(RT:220kΩ)
Package(s)
W(Typ) x D(Typ) x H(Max)
4.90mm x 6.00mm x 1.65mm
SOP-J8
Features
Boundary Conduction Mode
Low Power consumption
VCCUVLO
Resister detection for ZCD
Switching loss reduction, noise reduction by ZCD
Improving the efficiency by the max frequency
control
Dynamic and Static OVP by the VS pin
High accuracy over current detection(±4%)
Error amplifier input short protection
Stable MOSFET gate drive by the Clamper
Protection function by the OVP pin
SOP-J8
Applications
AC adopter, TV, Lighting equipment, Refrigerator, etc.
Typical Application Circuit(s)
400V
Diode
Bridge
VS
OVP
VCC
6
5
8
7
VCC
OUT
GND
IS
BD7691FJ
VS
EO
RT
OVP
1
2
3
4
VS
OVP
Figure 1. Application Circuit
〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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Contents
General Description......................................................................................................................................................................1
Contents ........................................................................................................................................................................................2
Pin Configuration(s) .....................................................................................................................................................................3
Pin Description(s).........................................................................................................................................................................3
Block Diagram(s) ..........................................................................................................................................................................3
Description of Block(s).................................................................................................................................................................4
Operation mode of the protective circuit....................................................................................................................................9
Absolute Maximum Ratings (Tj = 25°C) ....................................................................................................................................10
Thermal Resistance(Note 1) ...........................................................................................................................................................10
Recommended Operating Conditions(Ta=25°C) .................................................................................................................10
Electrical Characteristics (Unless otherwise specified VCC=15V Ta=25°C)..........................................................................11
I/O Equivalence Circuits.............................................................................................................................................................14
Application Example ..................................................................................................................................................................14
Attention in the board design....................................................................................................................................................16
About parts placement...............................................................................................................................................................16
Operational Notes.......................................................................................................................................................................18
Ordering Information..................................................................................................................................................................20
Marking Diagrams.......................................................................................................................................................................20
Physical Dimension, Tape and Reel Information .....................................................................................................................21
Revision History .........................................................................................................................................................................22
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Pin Configuration(s)
6
5
8
7
VCC
OUT
GND
IS
BD7691FJ
VS
EO
RT
OVP
1
2
3
4
Figure 2. Pin Configuration(Top View)
Pin Description(s)
Table 1. Pin Description
ESD Diode
VCC GND
Pin Name
I/O
Pin No.
Function
VS
EO
RT
OVP
IS
GND
OUT
VCC
I
I/O
I/O
I
I
-
1
2
3
4
5
6
7
8
Feedback input
Error amp output
Max frequency setting
Over voltage protection
Zero current and over current detection
GND
-
○
-
-
-
-
○
-
○
○
○
○
-
O
I
MOSFET gate control
VCC
○
○
-
Block Diagram(s)
VOUT
FUSE
AC
85-
265Vac
Diode
Bridge
Filter
VS
OVP
VCC
GND
OVP
+
-
OVP
OVP
Internal
Supply
2.7V
+
-
UVLO
BGR
4.0V Reg
13.0V/9.0V
BGRBUF
TSD
TSD
VGUP Comp
SHORT Comp
SP
+
-
+
-
0.3V
GCLAMP
(12V)
2.25V
VS
SOVP Comp
SOVP
VS
+
-
DOVP Comp
ErrAmp
S
POUT
2.725V
-
+
+
-
OUT
UVLO
2.625V
Q
2.5V
PRE
Driver
EO
PWM Comp
-
+
SP
NOUT
OR
AND
R
1.9V
-
+
100kΩ
UVLO
RT_H
SOVP
TSD
OVP
RT_H
RT
RT_H
Comp
OSC
EN
RT_L
Comp
+
-
RRT
-
+
1.15V
ISOCP
Comp
-0.6V
IS
+
-
Delay
-10mV
Figure 3 Block Diagram
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Description of Block(s)
(1) VCC protection
This IC incorporates VCC UVLO (Under Voltage Lock Out) of the VCC pin. Switching stops at the time of VCC voltage drop.
(2) Power Factor Correction
The power factor improvement circuit is a voltage control method of Boundary Conduction Mode.
The outline operation circuit diagram is shown in Figure 4. The switching operation is shown in Figure 5.
Switching Operation
1. MOSFET is turned on, and IL increases
2. The IC compares VEO with Vramp, and MOSFET is off when the Vramp voltage higher than VEO
3. MOSFET is off, and IL decreases
4. The IC detects a zero point of the IL in IS pin and turns on MOSFET
Diode
Bridge
IL
ACIN
PFC OUT
COIL
FRD
OUT
MOSFET
PFC OUT
Feedback Resistance
VS
EO
IS
GND
RIS
GND
Zero current and
OCP detection
Figure 4. Operation circuit outline
OUT
(Gate)
MOSFET
(Vds)
IL
VEO
Vramp
(Internal)
V IS
3
2
4
1
Figure 5. Switching operation timing chart
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(3) About ErrAMP
(3-1) gmAMP
The VS pin monitors a divided voltage of the output voltage. The ripple voltage of AC frequency (50Hz/60Hz) overlaps with VS
pin. gmAMP removes this ripple voltage. gmAMP compares VAMP (2.5V typ.) with the divided voltage of the output voltage,
gmAMP controls the EO voltage by this gap. When EO pin voltage rises, ON width of the OUT pin becomes wide. When the EO
voltage less than about 0.7V, the IC stops switching. Therefore it can stop switching operation when EO pin connects to the
GND.
External parts value of EO pin should be set that the ripple voltage of AC frequency does not conduct to EO pin. And, please
confirm it by real board.
PFC Output
VS
-
+
2.50V
EO
Figure 6. gmAMP block diagram
(3-2) VS short protection
VS pin has a short protection function.
A state of PFC output voltage < VSHORT (0.3V typ.) continues more than TVS_SH (150us typ.), it stops switching.
It shows operation in Figure 7.
PFC
output
Vout
VS
VSHORT
TVS_SH
OUT
Switching stop
Figure 7. Operation of VS short protection
(3-3) VS low voltage gain increase function
When output voltage decreases by output load sudden changes, an output voltage drop period becomes long because a voltage
control loop is slow. VS pin voltage becomes lower than VGUP (2.25V typ.) (equivalent to -10% of output voltage), the error
amplifier increases a gain. By this operation, ON width of OUT increases and prevents a long-term drop of the output voltage.
When VS pin voltage rises from VGUP(2.25V typ.), this operation stops.
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(3-4) VS overvoltage gain increase function (Dynamic OVP)
When output voltage rises by startup or a rapid change of the output load, output voltage rises for a long term because a voltage
control loop is slow. VS pin voltage becomes higher than VOVP (2.625V typ.) (equivalent to +5% of output voltage), the error
amplifier increases a gain. By this operation, it reduces ON width of OUT and prevents a long-term rise of the output voltage.
When VS pin voltage decreases under VOVP(2.625V typ.), this operation stops.
(3-5) VS overvoltage protection function (Static OVP)
VS pin rises across VOVP, static OVP acts, and VS pin voltage rises from VOVP1(2.7V typ.), it stops switching immediately.
VS pin voltage under than VOVP2(2.6V typ.), it starts switching. It shows operation in Figure 8.
PFC
Output
VOVP1
VOVP2
VS
OUT
Switching
stop
Figure 8. VS overvoltage protection operation
(4) OVP pin over voltage protection
The OVP pin is an overvoltage protection function in case of VS feedback circuit rises over static OVP (cf. Figure 9).
When OVP pin voltage rises over VOVP3 (2.7V typ.), it stops switching operation after TOVP3(60us typ.) (cf. Figure 9). If OVP pin
becomes less than VOVP4 (2.6V typ.), it becomes restart operation.
PFC-OUT
VOVP3
OVP
OUT
OVP
OUT
+
-
2.7V/2.6V
Driver
Logic
TOVP3
Figure 9. OVP pin over voltage protection
Figure 10. Timing chart
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(5) IS pin Zero current detection and overcurrent detection function
The zero current detection circuit is a function to detect a zero cross of the inductor current (IL) (cf. Figure 11). When the voltage
of the IS pin becomes higher than the zero current detection voltage, the OUT output becomes High after progress at zero
current detection delay time(TZCDD. ). Please set the RIS value (cf. Figure.4) so that IS pin voltage becomes less than VIS_OCP
(-0.6V typ.). In addition, it recommends that it adds CR filter for switching noise reduction. It shows operation in Figure 12.
IS
OUT
+
-
Driver
Logic
Delay
-10mV
-
Over Current Protection
+
-0.6V
Figure 11. IS pin current detection circuit
IS
-10mV
OUT
TZCDD
Figure 12. IS zero current detection delay time
(6) RT pin
This pin sets a slope wave pattern formed in the IC inside by external resistance. It shows RT resistor value and relations of the
maximum frequency in Figure 13. The maximum ON width on the application is calculated in the following formula. It shows
relations of RT resistor value and maximum ON width in Figure 14.
2 L P
O
TON _ MAX [s]
VACMin2
VAC: Input voltage, L: Inductance, Po: Max output power,
:Efficiency
Necessary TON_MAX on application can be check as upper formula. Please set ON width in RT pin more than TONMAX.
In addition, it shows relations of RT resistor value and PFC zero current detection Delay in Figure 15.
The high-speed frequency in the light load is limited in RT pin. The external resistance range of the RT pin is 51kΩ - 390kΩ.
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VCC=15V
VCC=15V
Figure 13. Relations of RT resistor value and the Max
frequency (reference value)
Figure 14. Relations of RT resistor value and the max ON
width (reference value)
VCC=15V
Figure 15. Relations of RT resistor value and PFC zero current detection delay
(reference value)
*The graph mentioned above is reference value. After the confirmation of the actual board, please set the fixed number.
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Operation mode of the protective circuit
It shows the operation mode of each protection function in Table 2.
Table 2. Operation mode of each protective circuit
Protection mode
Parameter
Contents
Cancellation
method
Cancellation
operation
Detection method
Detect operation
VCC pin low voltage
protection
VCC<9.0V(typ.)
(VCC drop)
OUT stop
EO discharge
VCC>13.0V(typ.)
(VCC rise)
VCCUVLO
Startup operation
Normal operation
Normal operation
IS<-0.60V(typ.)
(IS drop)
IS>-0.60V(typ.)
(IS rise)
IS OCP
IS pin short protection
VS pin short protection
OUT stop
OUT stop
VS<0.30V(typ.)
(VS drop)
VS>0.30V(typ.)
(VS rise)
VS short protection
VS pin low voltage gain
increase
VS<2.25V(typ.)
(VS drop)
GM amplifier GAIN
increase
VS>2.25V(typ.)
(VS rise)
VS gain increase
Normal operation
VS pin overvoltage
protection 1
VS>2.625V(typ.)
GM amplifier GAIN
increase
VS<2.625V(typ.)
VS Dynamic OVP
VS Static OVP
Normal operation
Normal operation
(VS rise)
(VS drop)
VS pin overvoltage
protection 2
VS>2.700V(typ.)
VS<2.600V(typ.)
OUT stop
(VS rise)
(VS drop)
OVP pin overvoltage
protection 3
OVP>2.700V(typ.)
OVP<2.700V(typ.)
OVP
OUT stop
Normal operation
(OVP rise)
(OVP drop)
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Absolute Maximum Ratings (Tj = 25°C)
Parameter
Symbol
Rating
Unit
V
Condition
Max Voltage 1
Max Voltage 2
Vmax1
Vmax2
Vmax3
-0.3 to +28.0
VCC
OUT
-0.3 to +15.0
-0.3 to +6.5
V
V
Max Voltage 3
Max Voltage 4
OVP, RT, VS, EO
IS
(Excluded after input voltage injection Vmax4
between 20ms)
IS Pin Max Current
(Less than 20ms after input voltage
injection)
-6.5 to +0.3
-20
V
IIS
mA
IS
OUT Pin Output Peak Current 1
OUT Pin Output Peak Current 2
Operation Temperature Range
Storage Temperature Range
IOUT1
IOUT2
Topr
-0.5
+1.0
-40 to +105
-55 to +150
A
A
Source current
Sink current
oC
oC
Tstr
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Thermal Resistance(Note 1)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
SOP-J8
Junction to Ambient
Junction to Top Characterization Parameter(Note 2)
θJA
ΨJT
149.3
18
76.9
11
°C/W
°C/W
(Note 1)Based on JESD51-2A(Still-Air)
(Note 2)The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3)Using a PCB board based on JESD51-3.
(Note 4)Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
Layer Number of
Measurement Board
Material
FR-4
Board Size
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
4 Layers
Top
Copper Pattern
Bottom
Copper Pattern
74.2mm x 74.2mm
Thickness
Copper Pattern
Thickness
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
70μm
Recommended Operating Conditions(Ta=25°C)
Parameter
Supply Voltage
Symbol
VCC
Rating
Unit
Condition
VCC voltage
10.0~26.0
V
Recommended range of the external component(Ta=25°C)
Parameter
Symbol
Range
More than 10.0
51 to 390
Unit
uF
kΩ
VCC pin connection capacity
RT pin connection resistance
CVCC
RRT
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Electrical Characteristics (Unless otherwise specified VCC=15V Ta=25°C)
Specifications
Parameter
[ Circuit Current ]
Circuit Current(ON)1
Symbol
Unit
Condition
Min
Typ
Max
ION1
ION2
ION3
-
-
-
360
540
65
600
900
130
uA
uA
uA
EO=0.0V, RT=220kΩ
EO=3.0V, RT=220kΩ
(Switching operation)
Circuit Current (ON)2
Start Up Current
VCC=12V
[ VCC pin protection ]
VCC UVLO Voltage1
VCC UVLO Voltage2
VCC UVLO Hysteresis
[ Gm Amplifier Block ]
VS pin Pull Up Current
Gm Amplifier
Reference Voltage 1
Gm Amplifier Line Regulation
Gm Amplifier
Trans Conductance
Gm Amplifier Source Current
Gm Amplifier Sink Current
[ EO Block ]
VUVLO1
VUVLO2
VUVLO3
12.0
8.0
-
13.0
9.0
4.0
14.0
10.0
-
V
V
V
VCC rise
VCC drop
VUVLO3 = VUVLO1 -VUVLO2
IVS
VAMP
VAMP_line
TVS
IEO_source
IEO_sink
-
0.5
2.500
-1
-
2.535
-
uA
V
2.465
-20
mV
uA/V
VCC10V to 26V
EO=2.5V
VGUP <VS<VOVP
VS=1.0V
50
75
100
30
30
50
50
70
70
uA
uA
VS=3.5V
OFF Threshold Voltage
EO Discharge Resistance
[ OSC Block ]
EO_OFF_TH
REO
0.57
2.3
0.67
4.3
0.77
6.3
V
kΩ
VCC=12V, EO=3V
MAX ON Width
TMAXDUTY
FMAXDUTY
VRT
23.4
160
26.0
220
28.6
280
us
kHz
V
RT=220kΩ EO=4V
RT=220kΩ EO=0.7V
MAX Frequency
RT Output Voltage
0.90
1.15
1.40
[ IS Block ]
Zero Current Detection Voltage
Zero Current Detection
Voltage Delay
VZCD
-15m
-
-10m
0.85
-5m
V
TZCDD
1.70
us
RT=220kΩ
IS Overcurrent
VIS_OCP
-0.62
-0.60
-0.58
V
Detection Voltage
[ VS Protection Block ]
VS Short Protection
Detection Voltage
VS Shortstop Protection
Detection Time
VSHORT
TVS_SH
0.200
50
0.300
150
0.400
300
V
us
VS Overvoltage Gain Increase
Voltage
1.025×
VAMP
1.065×
VAMP
1.020×
VAMP
0.030×
VAMP
1.050×
VAMP
1.080×
VAMP
1.040×
VAMP
0.040×
VAMP
1.075×
VAMP
1.095×
VAMP
1.060×
VAMP
0.050×
VAMP
VOVP
VOVP1
VOVP2
VHYS
V
V
V
V
V
VS Overvoltage Protection
Detection Voltage 1
VS rise
VS Overvoltage Protection
Detection Voltage 2
VS drop
VS Overvoltage Protection
Detection Voltage Hys
VS Low Voltage
Gain Increase Voltage
0.840×
VAMP
0.900×
VAMP
0.960×
VAMP
VGUP
[ OVP Block ]
OVP Detection Voltage 1
OVP Detection Voltage 2
OVP Detect Time
VOVP3
VOVP4
TOVP3
2.6
2.5
20
2.7
2.6
60
2.8
2.7
150
V
V
us
OVP rise
OVP drop
[ OUT Block ]
OUT H Voltage
OUT L Voltage
OUT Pull-down Resistance
VPOUTH
VPOUTL
RPDOUT
10.8
-
75
12.0
-
100
13.2
1.00
125
V
V
kΩ
IO=-20mA
IO=+20mA
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BD7691FJ
Typical Performance Curves
(Reference data)
Figure 16. VCC UVLO voltage1 (VCCUVLO1)
vs Ambient temperature (Ta)
Figure 17. Gm amplifier reference voltage1 (VAMP)
vs Ambient temperature (Ta)
Figure 18. Gm amplifier reference voltage1 (VAMP) vs VCC
Figure 19. IS overcurrent detection voltage (VIS_OCP)
vs Ambient temperature (Ta)
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BD7691FJ
Figure 20. Zero current detection voltage (Vzcd) vs
Figure 21. OUT pin H voltage (VOUTH) vs VCC
vs Ambient temperature (Ta)
Figure 22. EO pin off threshold (EO_OFF_TH)
vs Ambient temperature (Ta)
Figure 23. Gm amplifier trans conductance (TVS)
vs Ambient temperature (Ta)
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BD7691FJ
I/O Equivalence Circuits
1
VS
2
EO
3
RT
4
OVP
Internal Reg
Internal Reg
Internal Reg
5
IS
6
GND
7
OUT
8
VCC
Internal Reg
Figure 24. I/O Equivalence Circuits
Application Example
TH1
C3
F1
L1
D1
L
L1
250uH
VOUT +
C1
C2
D5
C4
N
DOUT
ROUT
M1
15Ω
GND
ROUTE
100Ω
RVSH1
C5
1uF
1.5MΩ
ROVPH1
RGS1
1.5MΩ
10kΩ
RVSH2
82kΩ
ROVPH2
VCC
82kΩ
CEO2 REO
U1
68kΩ
1uF
CO
220uF
VCC
OUT
VS
EO
CEO1
0.47uF
DZ1
RRT
BD7691FJ
150kΩ
RT
GND
IS
OVP
CVCC
47uF
CVS
RISF
1000pF
100Ω
CISF
ROVPL
RVSL
COVP
1000pF
10kΩ
10kΩ
1000pF
RIS
GND
0.2Ω
GND
Figure 25. Application Example
1.Output voltage setting
The output voltage is decided in resistor value of RVSH and RVSL.
RVSH
RVSL
1582k
10k
Vo _ PFC 1
VAMP 1
2.5V 398V
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9. May. 2017 Rev.002
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TSZ22111 • 15 • 001
BD7691FJ
2.Decision of minimum frequency fsw
The switching frequency of PFC
_ PFC Vin2 Vo _ PFC 2 Vin
fsw
2 Po _ PFC L
Vo _ PFC
The frequency is minimized in the minimum input voltage. Slow frequency is effective about loss and noise. However,
inductance is large value at low frequency. In addition, it enters the audible band when frequency lowers to 20kHz or less,
and sound banging occurs. It designs the minimum frequency as 50kHz this time.
3.Calculation of the inductance
_ PFC Vin2
2 Po _ PFC fsw
Vo _ PFC 2 Vin
Vo _ PFC
L
Ex)Vin=AC90V, Vo_PFC=400V, Po_PFC=200W, η_PFC=0.9, fsw=50kHz
L 248.5uH 250uH
4.Calculation of the inductor current
2 Vin
L
2 2 Po _ PFC
_ PFC Vin
Ipk
ton
6.98A
5.Calculation of the ON width
2 L P _ PFC
O
TON _ MAX [s]
VACMin2 _ PFC
ON width is short at the high AC voltage. Therefore, the ON width is decided with the minimum AC voltage.
It recommends RT setting such as the maximum ON width is just covered at the minimum AC voltage. ON width is small
when the high AC voltage. And the EO voltage range is small. EO voltage band width is the large then the ON width
setting by the RT resistance is short.
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BD7691FJ
Attention in the board design
About parts placement
Please locate the parts in the Fig.26 inside dot line near the IC. In addition, please do parts placement to avoid the interference
with switching lines and high current lines such as inductor, DRAIN.
TH1
C3
F1
L1
D1
L
L1
250uH
VOUT +
C1
C2
D5
C4
N
DOUT
ROUT
M1
15Ω
GND
ROUTE
100Ω
RVSH1
C5
1uF
1.5MΩ
ROVPH1
RGS1
1.5MΩ
10kΩ
RVSH2
82kΩ
ROVPH2
VCC
82kΩ
CEO2 REO
U1
68kΩ
1uF
CO
220uF
VCC
OUT
VS
EO
CEO1
0.47uF
DZ1
RRT
BD7691FJ
150kΩ
RT
GND
IS
OVP
CVCC
47uF
CVS
RISF
1000pF
100Ω
CISF
ROVPL
RVSL
COVP
1000pF
10kΩ
10kΩ
1000pF
RIS
GND
0.2Ω
GND
Figure 26. Parts placement
About GND wiring guidance
The red line of Fig.27 becomes the GND lines which large current flows. Each line independence wires it, and please wire it
briefly and thickly. A blue line is ICGND. Please make a common use ICGND and GND of IC outskirts parts.
TH1
F1
L1
D1
L
L1
250uH
VOUT +
C3
C1
C2
D5
C4
N
DOUT
ROUT
M1
15Ω
GND
ROUTE
100Ω
RVSH1
C5
1uF
1.5MΩ
ROVPH1
RGS1
1.5MΩ
10kΩ
RVSH2
82kΩ
ROVPH2
VCC
82kΩ
CEO2 REO
U1
68kΩ
1uF
CO
220uF
VCC
OUT
VS
EO
CEO1
0.47uF
DZ1
RRT
BD7691FJ
150kΩ
RT
GND
IS
OVP
CVCC
47uF
CVS
RISF
1000pF
100Ω
CISF
ROVPL
RVSL
COVP
1000pF
10kΩ
10kΩ
1000pF
RIS
GND
0.2Ω
GND
Figure 27. GND line layout
16/22
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TSZ02201-0F2F0A200290-1-2
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TSZ22111 • 15 • 001
BD7691FJ
About large current line
Large circuit current flows through the part of the red line of Fig.25. Please wire it briefly and thickly. Please do not place IC
and high impedance line near red line. Because red line is very noisy.
TH1
C3
F1
L1
D1
L
L1
250uH
VOUT +
C1
C2
D5
C4
N
DOUT
ROUT
M1
15Ω
GND
ROUTE
100Ω
RVSH1
C5
1uF
1.5MΩ
ROVPH1
RGS1
1.5MΩ
10kΩ
RVSH2
82kΩ
ROVPH2
VCC
82kΩ
CEO2 REO
U1
68kΩ
1uF
CO
220uF
VCC
OUT
VS
EO
CEO1
0.47uF
DZ1
RRT
BD7691FJ
150kΩ
RT
GND
IS
OVP
CVCC
47uF
CVS
RISF
1000pF
100Ω
CISF
ROVPL
RVSL
COVP
1000pF
10kΩ
10kΩ
1000pF
RIS
GND
0.2Ω
GND
Figure 28. High current line layout
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TSZ22111 • 15 • 001
BD7691FJ
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3. Ground Voltage
Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a
voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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TSZ22111 • 15 • 001
BD7691FJ
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure xx. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all
within the Area of Safe Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
17. Disturbance light
In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due
to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip
from being exposed to light.
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TSZ22111 • 15 • 001
BD7691FJ
Ordering Information
B D 7
6
9
1
F
J
-
E 2
Part Number
Package
FJ:SOP-J8
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagrams
SOP-J8(TOP VIEW)
Part Number Marking
LOT Number
D 7 6 9 1
1PIN MARK
Part Number Marking
Package
SOP-J8
Orderable Part Number
D7691
BD7691FJ-E2
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9. May. 2017 Rev.002
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20/22
TSZ22111 • 15 • 001
BD7691FJ
Physical Dimension, Tape and Reel Information
Package Name
SOP-J8
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9. May. 2017 Rev.002
21/22
BD7691FJ
Revision History
Date
Revision
001
Changes
23. Jan. 2017
9. May. 2017
Release
p.10 Add IS pin maximum ratings
p.11 Add electrical characteristics
002
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TSZ22111 • 15 • 001
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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BD7694FJ是一款功率因数校正(Power Factor Correction:PFC)转换器,可为各种需要改善功率因数的产品提供理想系统。PFC部分采用临界模式,通过检测过零电流,可以降低开关损耗和噪声。内置了可减少总谐波失真(THD)的电路,因此可以支持 IEC61000-3-2 Class-C。提供支持各种功率段和拓扑的评估板。a.productlink{color: #dc2039; text-decoration: underline !important;}a.productlink:hover {opacity: 0.6;}
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BD7695FJ is Power Factor Correction ICs for AC/DC supply, which are suitable for all products needing power factor improvement. The PFC adopts boundary conduction mode (BCM) and switching loss reduction and noise reduction are possible by Zero Current Detection (ZCD). This IC incorporates a circuit for reducing total harmonics distortion (THD) and can support IEC61000-3-2 Class-C.
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