BD8LB600FS-C [ROHM]
BD8LB600FS-C是车载/工业设备用SPI输入8ch低边开关。内置负载开路检测电路、过电流保护电路、有源钳位电路、过热保护电路。;
| 型号： | BD8LB600FS-C |
| 厂家： | 
ROHM |
| 描述： | BD8LB600FS-C是车载/工业设备用SPI输入8ch低边开关。内置负载开路检测电路、过电流保护电路、有源钳位电路、过热保护电路。 开关 过电流保护 |
| 文件： | 总27页 (文件大小：1294K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
IPD series for Automotive
8ch Low-side switch
BD8LB600FS-C
Features
Product Summary
■ Monolithic power IC that has a built-in control part
(CMOS) and a power MOS FET on 1chip
■ 8ch Low-side switch for driving resistive, inductive,
capacitive load
■ 16bit Serial peripheral interface(SPI) for diagnostics
and control
Digital part Operating voltage
3.0V to 5.5V
4.0V to 5.5V
600mΩ
Analog part Operating voltage
On-state resistance(25°C,Typ)
Over current limit(Typ)
1.80A
■ Built-in Open Load Detection circuit in output-off state
■ Built-in Self restart Over Current Protection circuit
(OCP)
Active clamp energy(25°C)
70mJ
■ Built-in Over Voltage Protection for Output circuit
■ Built-in Self restart Over Heating Protection circuit
(TSD）
Package
SSOP-A24
10.00mm x 7.80mm x 2.10mm
■ Low On resistance of RON=600mΩ(VIN=5V, Tj=25°C,
IDn=0.2A)
■ Surface mount SSOP-A24 Package
■ AEC-Q100 Qualified(1)
(1)Grade 1
Overview
BD8LB600FS-C is an Automotive 8ch Low-Side switch.
It has a built-in Over Current Protection circuit, Thermal
Shutdown circuit, Open Load Detection circuit, Under
Voltage Lock Out circuit, and has a Diagnostic
Output(SO) function during abnormal detection.
SSOP-A24
Application
8ch Low-side switch for driving resistive,
inductive, capacitive load
Basic Application Circuit (Recommendation)
Product configuration: Silicon monolithic integrated circuit ○The product is not designed for radiation sistance.
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Pin Descriptions
I/O(1)
-
Pin
1
Symbol
GND
Function
GND
2
GND
OUT1
-
GND
3
O
O
O
O
O
O
O
O
-
Channel 1 output
Channel 2 output
Channel 3 output
Channel 4 output
Channel 5 output
Channel 6 output
Channel 7 output
Channel 8 output
GND
4
OUT2
5
OUT3
6
OUT4
7
OUT5
8
OUT6
9
OUT7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OUT8
GND
GND
-
GND
VDD
-
Digital power supply
IN4(IN8)
IN3(IN7)
IN2(IN6)
IN1(IN5)
DIR
I
I
I
I
I
PD Control input for Channel 4 and 8 (DIR=L) / Control input for Channel 8 (DIR=H)
PD Control input for Channel 3 and 7 (DIR=L) / Control input for Channel 7 (DIR=H)
PD Control input for Channel 2 and 6 (DIR=L) / Control input for Channel 6 (DIR=H)
PD Control input for Channel 1 and 5 (DIR=L) / Control input for Channel 5 (DIR=H)
PD SPI mode, DIR mode change input terminal
SO
O
Serial data output terminal
SCLK(IN4)
RST_B(IN3)
SI(IN2)
CS_B(IN1)
VDDA
I
I
I
I
PD Serial clock (DIR=L) / Control input for Channel 4 (DIR=H)
PD Reset terminal (DIR=L) / Control input for Channel 3 (DIR=H)
PD Serial data input (DIR=L) / Control input for Channel 2 (DIR=H)
PU/PD(2) SPI enable input (DIR=L) / Control input for Channel 1 (DIR=H)
-
Analog power supply
(1) O：Output terminal, I：Input terminal
PD：Pull Down terminal, PU：Pull Up terminal
(2) Pull Up at DIR=Low setting, Pull Down at DIR=High
Pin Configurations
SSOP-A24
(TOP VIEW)
1.GND
2.GND
24.VDDA
23.CS_B(IN1)
22.SI(IN2)
21.RST_B(IN3)
20.SCLK(IN4)
19.SO
3.OUT1
4.OUT2
5.OUT3
6.OUT4
7.OUT5
8.OUT6
9.OUT7
18.DIR
17.IN1(IN5)
16.IN2(IN6)
15.IN3(IN7)
14.IN4(IN8)
13.VDD
10.OUT8
11.GND
12.GND
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Absolute Minimum Ratings
Item
Symbol
Limit values
Unit
DRAIN-SOURCE voltage
Power supply voltage (Logic)
Power supply voltage (Analog)
Diagnostic output voltage
Output current (DC)
VDS
VDD
VDDA
VSO
IOUT
IOP
45(Internally limited)
7 (1)
V
V
V
V
A
A
V
7
-0.3 to +7
1.0(Internally limited) (2)
Internally limited (3)
-0.3 to +7
Output current (Pulse)
Input voltage
VIN
Power consumption
Pd
1.0(SSOP-A24) (4)
W
Operating temperature range
Storage temperature range
Maximum junction temperature
Topr
Tstg
-40 to +150
-55 to +150
150
°C
°C
°C
mJ
mJ
Tjmax
70 (5)
50 (6)
(Tj(0) = 25°C)
Active clamp energy
(single pulse)
EAV
(Tj(0) = 150°C)
(1) However、VDD < VDDA + 0.3V
(2) However, exceed neither Pd nor ASO.
(3) Internally limited by the overcurrent limiting circuit.
(4) IC mounted on ROHM standard board (70×70*1.6[mm], glass epoxy 1 layer board).
Derate by 8.0mW/℃ above 25℃.
(5) Min Active clamp energy at Tj(0) = 25°C, using single non-repetitive pulse of 0.5A
(6) Min Active clamp energy at Tj(0) =150°C, using single non-repetitive pulse of 0.5A. Not 100% tested.
Operating Voltage Ratings
Item
Code
VDD
Limit values
3.0 to 5.5
4.0 to 5.5
Unit
V
Digital part Operating voltage
Analog part Operating voltage
VDDA
V
Heat Dissipation Characteristic
Pd［W］
2.0
1.5
1.0
0.5
Ta［°C］
0
25
50
75
100
125
150
(SSOP-A24) IC mounted on ROHM standard board (70×70*1.6[mm], glass epoxy 1 layer board).
Derate by 8.0mW/°C above 25°C.
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Electrical Characteristics（unless otherwise specified, VDDA=5V,VDD=5V,-40°C ≤Tj ≤+150°C ）
Limit values
Item
Symbol
Unit
Condition
Min
Typ
Max
[Power Supply Block]
VDDA Standby current
(All output on standby mode)
VDD Standby current
VDDA=VDD=5V,
CS_B=5V, RST_B=0V
VDDA=VDD=5V,
IDDAS
IDDS
-
-
0
0
20
20
μA
μA
(All output on standby mode)
CS_B=5V, RST_B=0V
VDDA Operating current)
VDD Operating current)
IDDA
IDD
-
-
2
5
1
mA
mA
VDDA=VDD=5V
VDDA=VDD=5V
0.5
VDDA power on reset
Threshold Voltage
VDD power on reset
Threshold Voltage
[Input PIN]
VPORA
VPOR
-
-
-
-
4.0
2.7
V
V
L level input voltage
H level input voltage
Input Hysteresis
VINL
VINH
VHYS
0
-
-
VDD×0.2
VDD
V
V
V
VDD×0.7
0.1
0.3
0.5
L level input current 1
(RST_B,DIR,IN1 to IN4,SCLK,SI)
RST_B=DIR=IN1 to IN4=SCLK
=SI=0V
IINL1
IINL2
IINH1
IINH2
-10
0
10
μA
μA
L level input current 2(CS_B)
-100
-50
-25
CS_B(DIR=L)=0V
H level input current 1
(RST_B,DIR,IN1 to IN4,SCLK,SI)
RST_B=DIR=IN1 to IN4=SCLK
=SI=5V
25
50
0
100
10
μA
μA
H level input current 2(CS_B)
[Power MOS Output]
-10
CS_B(DIR=L)=5V
VDD=VDDA=5V, IDS=0.2A,
Tj=25°C
VDD=VDDA=5V, IDS=0.2A,
Tj=150°C
-
-
0.6
1.1
0.8
1.4
Ω
Ω
Output ON resistance
Output sink current
RDS(ON)
-
-
10
15
20
40
μA
μA
VDS=30V, Tj=25°C
IL(OFF)
IOL
tON
VDS=30V, Tj=150°C
Output leak current
(Open load detected)
25
-
50
20
20
1
100
50
50
3
μA
μs
VDS=40V
VDD=VDDA=5V,CS_B=0V/5V,
RL=60Ω,VB=12V
VDD=VDDA=5V,CS_B=0V/5V,
RL=60Ω,VB=12V
VDD=VDDA=5V,CS_B=0V/5V,
RL=60Ω,VB=12V
VDD=VDDA=5V,CS_B=0V/5V,
RL=60Ω,VB=12V
Switching time
tOFF
-
μs
Slew rate on
dV/dtON
-dV/dtOFF
0.3
0.3
V/μs
V/μs
Slew rate off
1
3
VDD=VDDA=5V,INn=0V/5V,
RL=60Ω,VB=12V
PWM Output range
fPWM
VCL
-
-
50
-
1.2
55
-
kHz
V
Output clamp voltage
45
31
IDS=1mA(at Output turn off)
Minimum Output Voltage
VDS(S)
V
INn(1)=5V,RL=0Ω
(Load short-circuited）
(1) n means ch number
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Electrical Characteristics（unless otherwise specified, VDDA=5V,VDD=5V,-40°C ≤Tj ≤+150°C ）
Limit values
Item
Symbol
Unit
Condition
Min
Typ
Max
[Serial Output]
L level output voltage
H level output voltage
VSOL
VSOH
-
0.3
0.6
-
V
V
ISO=1mA
ISO=-1mA
VDD-0.6 VDD-0.3
Serial out output leak current
[Protect circuit]
ISO(OFF)
-5
0
5
μA
Over current detection current
IOCP(ON)
IOCP(OFF)
tOCP
1.00
0.70(1)
50
1.80
1.26(1)
250
3.00
2.10(1)
600
A
A
Over current release current
Over current detection time
Open Load release voltage
μs
V
VOLD(ON)
0.70
1.50
2.70
INn(2)=0V
INn(2)=0V
INn(2)=0V
Open load detection threshold
voltage
VOLD(OFF)
tOLD
1.00
50
1.75
300
3.00
600
V
Open load detection time
μs
(1) Not 100% tested
(2) n means ch number
Definition
Figure 1. Definition
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BD8LB600FS-C
Measurement Circuit
Figure 2. Output ON Resistance Measuring
Figure 3. Switching Time Measuring Circuit
Circuit Diagram
Diagram
Figure 4. Output Clamp Voltage Measuring
Circuit Diagram
Figure 5. Open Detection Measuring Circuit
Diagram
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DIR(Direct)mode Diagnostic Output Truth Table
OUTPUT
VIN
Tj
mode
VSO
L
Output state
VDS
ID
ID ≤ 1.8A(Typ)
Normal
ON
Tj < 175°C(Typ)
Tj ≥ 175°C(Typ)
-
Over current
detection
H
ID > 1.8A(Typ)
H
OFF
OFF
OFF
Thermal shut
down
-
-
-
H
H
Normal
L
(3.0Vor more)
L
-
L
Open load
detection
(1.5V(Typ) or
less)
-
H
OFF
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Characteristic Data (Reference Data) (VDD=5V, VDDA=5V, IN=5V, Tj=25°C unless otherwise is specified）
1200
1100
1000
900
800
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
-50 -25
0
25 50 75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Ｔｊ [°C]
VDD ,VDDA[V]
Figure 6. Output ON Resistance Characteristic
[Temperature Characteristic]
Figure 7. Output ON Resistance Characteristic
[Source Voltage Characteristic]
10
10
8
6
4
2
0
8
6
4
2
0
0.0
1.0
2.0
3.0
VDD [V]
Figure 8. Standby Current Characteristic (VDD)
4.0
5.0
6.0
7.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
VDDA[V]
Figure 9. Standby Current Characteristic (VDDA)
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20.0
10.0
0.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
VCS_B [V]
VIN [V]
Figure 11. Input current Characteristic (CS_B)
Figure 10. Input current Characteristic
(IN1 to 4, DIR, SCLK, SI, RST_B)
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
VINH
VINL
-50 -25
0
25 50 75 100 125 150
Tj [°C]
-50 -25
0
25 50 75 100 125 150
Tj [°C]
Figure 12. Input current Characteristic
Figure 13. Input Voltage Threshold Characteristic
[Temperature Characteristic]
[Temperature Characteristic]
(IN1 to 4, DIR, SCLK, SI, RST_B=5V, CS_B=0V)
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45.0
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
45.0
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
0.0
0.0
-50 -25
0
25 50 75 100 125 150
Tj [°C]
-50 -25
0
25 50 75 100 125 150
Tj [°C]
Figure 14. Switching Time (tON
[Temperature Characteristic]
)
Figure 15. Switching Time (tOFF
[Temperature Characteristic]
)
2.0
1.5
1.0
0.5
0.0
2.0
1.5
1.0
0.5
0.0
-50 -25
0
25 50 75 100 125 150
Tj [°C]
-50 -25
0
25 50 75 100 125 150
Tj [°C]
Figure 16. Slew Rate (at ON)
[Temperature Characteristic]
Figure 17. Slew Rate (at OFF)
[Temperature Characteristic]
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50.0
40.0
30.0
20.0
10.0
0.0
10.0
8.0
6.0
4.0
2.0
0.0
-50 -25
0
25 50 75 100 125 150
Tj [°C]
-50 -25
0
25 50 75 100 125 150
Tj [°C]
Figure 19. Output Leak Current (Open detect)
[Temperature Characteristic](VDS=40V)
Figure 18. Output Leak Current
[Temperature Characteristic](VDS=30V)
Switching Time Measurement
Timing Chart with Inductive Load
Figure 21. Timing Chart with inductive Load
Figure 20. Switching Time
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I/O Equivalent Circuits
Pin
Symbol
I/O Equivalent Circuits
1,2,
11,12
GND
OUT1 to OUT8
VDD
x 9
x 2
3 to 10
13
IN4(IN8),
IN3(IN7),
IN2(IN6),
IN1(IN5),
DIR,
SCLK(IN4),
RST_B(IN3),
SI(IN2)
IN4(IN8),
IN3(IN7),
IN2(IN6),
IN1(IN5),
DIR,
SCLK(IN4),
RST_B(IN3),
SI(IN2)
50Ω
14 to 17
18
20 to 22
100kΩ
50Ω
19
SO
100kΩ
1kΩ
50Ω
23
CS_B
100kΩ
24
VDDA
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SPI mode(DIR=L)
When CS_B=H,
OR signal (ERR) of SI and abnormal signal (TER, TSD, OCP, OLD) is output to SO terminal.
When CS_B=L,
Internal state (TSD, OCP, OLD) is latched at falling edge of CS_B, and output to SO at rising edge of SCLK.
SI is taken in register at falling edge of SCLK.
Output corresponding to each resister input is controlled at rising edge of CS_B.
Definitions of SI and SO signals are shown below.
SI signals
Initial:0x0000
States of output and protective circuits
Bits
INn
00
Output
OFF
OCP
TSD
OLD
disable
disable
disable
15:14,
13:12,
11:10,
9:8,
7:6,
5:4,
01
ON/OFF (1)
ON
enable/disable enable/disable disable/enable
10
11
enable
disable
enable
disable
disable
enable
3:2,
1:0
OFF
(1) When INn=01, output is controlled by IN terminal.
Output controlled by each input is shown below.
Input
Controlled output
OUT1
IN1(IN5)
IN2(IN6)
IN3(IN7)
IN4(IN8)
IN1(IN5)
IN2(IN6)
IN3(IN7)
IN4(IN8)
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
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SO signals
When CS_B=H,
OR signal (ERR) of abnormal signal (SI, TER, TSD, OCP, OLD) is output to SO terminal.
When CS_B=L,
Explanation of each Bit is shown below.
Bits
Data
STAE
0
1
0
1
0
1
Correspondence just after reset and normal operation
Correspondence error of last time
Normal operation
(1)
16
15,13,11
9,7,5
Load open
3,1
14,12
10,8,6
4,2,0
Normal operation
OCP or TSD
(1) TER bit outputs logical sums of TER signal and input signal of this device with SI signal in the interval from fall of CS_B to
rise of SCLK as shown below.
Block diagram and timing chart are shown below.
CS_B
SCLK
S
TER
MSB
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
SO
In order to select whether TER signal is output or SPI data output (OLn, Dn) signal is output, “S” signal is generated within IC
and output is switched.
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Daisy Chain
Plurality of devices can be connected as shown in the diagram below.
CS_B signal and SCLK signal connects common signal.
SI/SO line can connect SO of Device 1 to SI of Device 2 as shown in the diagram below.
Timing chart when 8 devices are connected is shown below.
Figure 22. Timing chart when 8 devices are connected
SPI RST_B releasing sequence
Figure 23. RST_B Releasing Sequence
Item
Signal
Minimum Standard Minimum
Unit
RST_B lead time(1) ( 2)
CS_B enable time(1)
tRST_B (lead)
tCS_B (en)
1
10
-
-
-
-
ms
μs
(1) Not 100% tested
(2) RST_B L time and H time must be over 10μs
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SPI timing chart
Figure 24. SPI Timing Chart
Item
Signal
Minimum Standard Minimum
Unit
SCLK frequency
fSCLK
TSCLK(P)
TSCLK(H)
TSCLK(L)
TSCLK(su)
TSCLK(hd)
TCS_B(lead)
TCS_B(lag)
TCS_B(td)
TSI(su)
0
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
5
－
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK cycle length
SCLK high time
200
50
－
SCLK lo time
50
－
SCLK setup time
50
－
SCLK hold time
50
－
CS_B lead time
250
250
250
20
－
CS_B lag time
－
Transfer delay time
Data setup time
－
－
Data hold time
TSI(h)
20
－
－
SPI Output enable time(1)
SPI Output disable time(1)
SPI Output Data delay time(1)
ERR Output Through delay time(1)
TSO(en)
200
250
100
200
TSO(dis)
TSO(dd)
－
－
TSO(td)
－
(1) Not 100% tested. When SO terminal capacity=10pF.
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DIR (direct) mode
Transition to direct mode is brought about by switching DIR terminal to High.
Output controlled for each input is shown below.
Further, SPI input and RST_B input are not accepted during direct mode.
Input
CS_B(IN1)
SI(IN2)
Controlled Output
OUT1
OUT2
RST_B(IN3)
SCLK(IN4)
IN1(IN5)
IN2(IN6)
IN3(IN7)
IN4(IN8)
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
DIR (direct) mode timing chart (1)
Figure 25. DIR Mode Timing Chart (1)
Item
Signal
Minimum Standard Minimum
Unit
DIR lead time(1)
INn enable time(1)
tDIR(lead)
tINn (en)
1
10
-
-
-
-
ms
μs
(1) Not 100% tested.
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DIR (direct) mode timing chart (2)
(1) OCP is internal signal of device
Figure 26. DIR Mode Timing Chart (2)
Direct mode operation current (IDDA + IDD) state transition
All CH off
1CH on
Figure 27. Operation Current State Transition Diagram
All CH off
All CH on (2)
(2) Sum of P.4 VDDA operation current (when all outputs are on) and VDD operation current (when all outputs are on).
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Power source ON/OFF sequence
(3)
VDD
(3)
VDD
VDDA
VDDA
(1)tON > 0s
(1)
(2)tOFF > 0s
(2)
tOFF
tON
(3)VDD < VDDA+0.3V
Figure 28. Power Source ON/OFF Sequence
Detection functions
Overcurrent protection
When current of no less than 1.8 A (Typ) is flown in output transistor of from OUT1 to OUT8 in 250 μs (Typ), error flag is
output.
Figure 29. Overcurrent Protection Timing Chart
Overheat protection
Junction temperature of from OUT1 to OUT8 reaches 175°C (Typ) or above, output is turned off.
It is automatically turned on at 150°C (Typ) or below
Figure 30. Overheat Protection Timing Chart
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Open detection
In case of enable at Open detection function(1), when output current of from OUT1 to OUT8 falls below 1.5 V (Typ), open
detection is detected and error flag is output.
(1) As for the DIR mode, OLDENn=H(open detection function becomes effective) in OUTENn =L.
As for the SPI mode, Please refer to “SI Signals” ( Page 13/24).
“n” shows the channel number.
Figure 31. Open Detection Protection Timing Chart
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Physical Dimension, Tape and Reel Information
Package Name
SSOP-A24
<Tape and Reel information>
Tape
Embossed carrier tape
2000pcs
Quantity
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
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Operational Notes
1) Absolute Minimum Ratings
Operating the IC over the absolute Minimum ratings may damage the IC. In addition, it is impossible to predict all
destructive situations such as short-circuit modes or open circuit modes. Therefore, it is important to consider circuit
protection measures, like adding a fuse, in case the IC is expected to be operated in a special mode exceeding the
absolute Minimum ratings.
2) Reverse connection of power supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
3) Power supply lines
Design the PCB layout pattern to provide low impedance ground and supply lines. Separate the ground and
supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from
affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of
temperature and aging on the capacitance value when using electrolytic capacitors.
4)
5)
Source (GND) Voltage
The voltage of the Source (GND) pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure
that no pins are at a voltage below the ground pin at any time, even during transient condition.
Thermal consideration
Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in
actual operating conditions. Consider Pc that does not exceed Pd in actual operating conditions (Pc≥Pd).
Package Power dissipation : Pd (W)=(Tjmax－Ta)/θja
Power dissipation
: Pc (W)=(Vcc－Vo)×Io+Vcc×Ib
Tjmax : Minimum junction temperature=150°C, Ta : Peripheral temperature[°C] ,
θja : Thermal resistance of package-ambience[°C /W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current
6)
7)
8)
Short between pins and mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
Thermal shutdown circuit (TSD)
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn off the IC when the internal
temperature of the IC reaches 175°C (25°C hysteresis). It is not designed to protect the IC from damage or guarantee
its operation. Do not continue to operate the IC after this function is activated. Do not use the IC in conditions where
this function will always be activated.
9)
Over voltage protection (active clamp)
There is a built-in over voltage protection circuit (active clamp) to absorb the induced current when inductive load is off
(Power MOS = off). During active clamp and when IN=0V, TSD will not function so keep IC temperature below 150°C.
10)
Over current protection circuit (OCP)
The IC incorporates an over-current protection circuit that operates in accordance with the rated output capacity. This
circuit protects the IC from damage when the load becomes shorted. It is also designed to limit the output current
(without latching) in the event of more than 1.5A (Typ) flow, such as from a large capacitor or other component
connected to the output pin. This protection circuit is effective in preventing damage to the IC in cases of sudden and
unexpected current surges. The IC should not be used in applications where the over current protection circuit will be
activated continuously.
11) Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
12) Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
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When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
C
E
Pin A
B
C
E
N
P+
P+
P+
N
N
P+
Parasitic
P
N
P
N
N
P substrate
P substrate
Parasitic
GND
GND
GND
GND
Parasitic element
Parasitic element
Other adjacent elements
Example of monolithic IC structure
13)
GND wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the GND traces of external components do not cause variations on
the GND voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance.
14) Back electromotive force (BEMF)
There is a possibility that the BEMF is changed by using the operating condition, environment and the individual
characteristics of motor. Please make sure there is no problem when operating the IC even though the BEMF is
changed.
15)
Rush Current
When power is supplied to the IC, inrush current may flow instantaneously. It is possible that the charge current from
the parasitic capacitance of the internal logic may be unstable. Therefore, give a special consideration with the power
coupling capacitance, power wiring, width of GND wiring, and routing of connections.
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Revision History
Date
Revision
002
Changes
New Release
06.Sep.2013
03.Apr.2015
08.Jun.2017
P1 Add “AEC-Q100 qualified” to Features
P3 active clamp energy condition added
P4 Limit(Typ) of VDDA Operating current changed
P4 Limit values of L level input current 2(CS_B) changed
P5 Condition of “Open Load release voltage”, “Open load detection threshold voltage” and
“Open load detection time” added
P6 Modify Figure 5.
P7 Modify DIR(Direct)mode Diagnostic Output Truth Table
P9 Characteristic Data of L level input current 2(CS_B) changed
P11 Timing Chart with Inductive Load changed
P12 I/O Equivalent Circuits changed
P13 initial value of INn added
P15 add note to SPI RST_B sequence
P16 SPI timing chart and add note changed
P17 DIR (direct) mode timing chart (1) and note changed
P18 Figure 26. and note changed
003
P18 Figure 27. changed
P19 timing chart of Overcurrent protection and Overheat protection changed
explanation of error flag release changed
P20 Open detection changed
P22 “7) Operation Under Strong Electromagnetic Field” added
P23 “15) FIN” deleted
Whole page all unit changed to SI unit
P4 Max value of PWM Output range was changed from 5kHz to 1.2kHz.
P4 “DIR=5V” was removed at Condition of PWM Output range.
004
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
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Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
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