BD9409F [ROHM]
BD9409F是白色LED用高效率驱动器,适用于大屏幕液晶驱动器。BD9409F内置了可向光源(LED串联连接的阵列)提供适当电压的DCDC转换器。BD9409F中内置了应对异常状态的几种保护功能。过电压保护(OVP: over voltage protection), 过电流检测(OCP: over current limit protection of DCDC), LED 过电流保护(LEDOCP: LED over current protection), 过升压保护(FBMAX: over boost protection)等。因此,可在更宽的输出电压条件及负载条件下使用。;型号: | BD9409F |
厂家: | ROHM |
描述: | BD9409F是白色LED用高效率驱动器,适用于大屏幕液晶驱动器。BD9409F内置了可向光源(LED串联连接的阵列)提供适当电压的DCDC转换器。BD9409F中内置了应对异常状态的几种保护功能。过电压保护(OVP: over voltage protection), 过电流检测(OCP: over current limit protection of DCDC), LED 过电流保护(LEDOCP: LED over current protection), 过升压保护(FBMAX: over boost protection)等。因此,可在更宽的输出电压条件及负载条件下使用。 驱动 CD 过电流保护 驱动器 转换器 |
文件: | 总36页 (文件大小:2295K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Datasheet
LED Drivers for LCD Backlights
1ch Boost up type
White LED Driver for large LCD
BD9409F
1.1 General Description
Key Specifications
Operating power supply voltage range:
11.5V to 35.0V
Oscillator frequency of DCDC: 150kHz (RT=100kΩ)
BD9409F is a high efficiency driver for white LEDs and is
designed for large LCDs. BD9409F has a boost DCDC
converter that employs an array of LEDs as the light
source.
Operating Current:
2.8 mA(Typ.)
BD9409F has some protect functions against fault
conditions, such as over-voltage protection (OVP), over
current limit protection of DCDC (OCP), LED OCP
protection, and Over boost protection (FBMAX).
Therefore it is available for the fail-safe design over a
wide range output voltage.
Operating temperature range:
-40°C to +105°C
1.2 Package(s)
W(Typ) x D(Typ) x H(Max)
10.00mm x 6.20mm x 1.71mm
Pin pitch 1.27mm
SOP16
Features
DCDC converter with current mode
LED protection circuit (Over boost protection(FB_H),
LED OCP protection)
Over-voltage protection (OVP) for the output voltage
Vout
Adjustable soft start
Adjustable oscillation frequency of DCDC
UVLO detection for the input voltage of the power
stage
PWM Dimming and MS Dimming.
Applications
Figure 1. SOP16
TV, Computer Display, LCD Backlighting
Typical Application Circuit
Vout
VCC
VIN
VCC
UVLO
OVP
REG90
STB
RT
GATE
CS
SS
DIMOUT
FAIL
PWM
MS
ISENSE
FB
Rs
GND
Figure 2. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit ○This product has not designed protection against radioactive rays
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1.3 Pin Configuration
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
STB
OVP
UVLO
SS
REG90
CS
GATE
DIMOUT
GND
ISENSE
FB
PWM
FAIL
MS
RT
Figure 3. Pin Configuration
1.4 Pin Descriptions
No.
1
Pin name
Function
VCC
STB
Power supply pin
IC ON/OFF pin
2
3
OVP
UVLO
SS
Over voltage protection detection pin
Under voltage lock out detection pin
Soft start setting pin
4
5
6
PWM
FAIL
MS
External PWM dimming signal input pin
Error detection output pin(Active High)
Mode Select Dimming input pin.
DC/DC switching frequency setting pin
Error amplifier output pin
7
8
9
RT
10
11
12
13
14
FB
ISENSE
GND
DIMOUT
GATE
LED current detection input pin
-
Dimming signal output for NMOS
DC/DC switching output pin
DC/DC output current detect pin,
OCP input pin
15
16
CS
REG90
9.0V output voltage pin
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1.5 Block Diagram
VCC
VIN
VCC
UVLO
MS_STB
COMP
OVP
REG90
STB
VCC
UVLO
VREG
UVLO
TSD
OVP
REG90
UVLO
1MΩ
REG90
PWM
COM
P
GATE
CS
+
-
RT
SS
OSC
CONTROL
LOGIC
-
LEB
Current
sense
SS
REG90
SS-FB
clamper
VCC
DIMOUT
Fail
detect
3kΩ
FAIL
LEDOCP
-
Auto-
Restart
Control
ISENSE
FB
+
PWM
ERROR
amp
Rs
1MΩ
MS_STB
COMP
OverBoost
MS
CS DET Level
Selecter
GND
Package:SOP16
Figure 4. Block Diagram
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1.6 Absolute Maximum Ratings (Ta=25°C)
Rating
Unit
V
Parameter
Power Supply Voltage
SS, RT, ISENSE, FB, CS
Pin Voltage
REG90, DIMOUT, GATE
Pin Voltage
Symbol
VCC
-0.3 to +36
SS, RT, ISENSE, FB, CS
REG90, DIMOUT, GATE
-0.3 to +7
V
V
-0.3 to +13
OVP, UVLO, PWM, MS, STB
Pin Voltage
OVP, UVLO, PWM, MS,
STB
-0.3 to +20
V
V
FAIL Pin Voltage
FAIL
-0.3 ~ VCC+0.3
Power Dissipation
Pd
Topr
Tjmax
Tstg
0.74 (*1)
-40 to +105
150
W
°C
°C
°C
Operating Temperature Range
Junction Temperature
Storage Temperature Range
-55 to +150
(*1) Derate by 5.92mW/°C when operating above Ta=25°C.. (Mounted on 1-layer 114.3mm x 76.2mm x 1.57mm board)
1.7 Recommended Operating Ranges
Parameter
Power Supply Voltage
Symbol
VCC
Range
Unit
V
11.5 to 35.0
50 to 1000
90 to 2000
DC/DC Oscillation Frequency
PWM Input Frequency
fsw
kHz
Hz
FPWM
1.8 Electrical Characteristics 1/2 (Unless otherwise specified VCC=24V Ta=25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
【Total Current Consumption】
Circuit Current
Icc
IST
-
-
-
2.8
60
60
5.6
120
120
mA VSTB=3.0V, PWM=3.0V
μA VSTB=0V
Circuit Current (standby)
Circuit Current (MS standby)
【UVLO Block】
IST_MS
μA VSTB=3.0V, MS=0V
Operation Voltage(VCC)
Hysteresis Voltage(VCC)
UVLO Release Voltage
UVLO Hysteresis Voltage
UVLO Pin Leak Current
【DC/DC Block】
VUVLO_VCC
VUHYS_VCC
VUVLO
9.5
130
2.88
250
-2
10.5
270
3.00
300
0
11.5
540
3.12
350
2
V
VCC=SWEEP UP
mV VCC=SWEEP DOWN
VUVLO=SWEEP UP
V
VUHYS
mV VUVLO=SWEEP DOWN
UVLO_LK
μA VUVLO=4.0V
ISENSE Threshold Voltage 1
ISENSE Threshold Voltage 2
ISENSE Threshold Voltage 3
MS Threshold Voltage 0
MS Threshold Voltage 1
MS Threshold Voltage 2
MS Threshold Voltage 3
Oscillation Frequency
VLED1
VLED2
VLED3
VMS0
VMS1
VMS2
VMS3
FCT
0.327
0.441
0.483
-0.25
0.70
0.341
0.455
0.500
0.00
1.00
2.00
3.00
150
0.355
0.470
0.518
0.25
V
V
V
V
V
V
V
MS=1V(75% dimming)
MS=2V(100% dimming)
MS=3V(110% dimming)
VSTB=3.0V, PWM=3.0V
VSTB=3.0V, PWM=3.0V
VSTB=3.0V, PWM=3.0V
VSTB=3.0V, PWM=3.0V
1.25
1.70
2.25
2.70
10.0
142.5
157.5
kHz RT=100kΩ
VRT
×90%
RT Short Protection Range
RT_DET
-0.3
-
V
RT=SWEEP DOWN
RT Terminal Voltage
VRT
1.6
90
2.0
95
2.4
99
V
RT=100kΩ
RT=100kΩ
GATE Pin MAX DUTY Output
MAX_DUTY
%
GATE Pin ON Resistance
(as source)
GATE Pin ON Resistance
(as sink)
RONSO
RONSI
2.5
2.0
5.0
4.0
10.0
8.0
Ω
Ω
SS Pin Source Current
ISSSO
RSS_L
-3.75
-
-3.00
3.0
-2.25
5.0
μA VSS=2.0V
kΩ
SS Pin ON Resistance at OFF
Soft Start Ended Voltage
VSS_END
3.52
3.70
3.88
V
SS=SWEEP UP
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1.8 Electrical Characteristics 2/2 (Unless otherwise specified VCC=24V Ta=25°C)
Parameter
【DC/DC Block】
Symbol
Min
Typ
Max
Unit
Conditions
VISENSE=0.0V, VMS=3.0V,
VFB=1.0V
VISENSE=2.0V, VMS=3.0V,
VFB=1.0V
FB Source Current
FB Sink Current
IFBSO
IFBSI
-115
85
-100
100
-85
μA
μA
115
【DC/DC Protection Block】
OCP Detect Voltage
VCS1
VCS2
360
0.85
2.88
150
-1.8
400
1.00
3.00
200
0
440
1.15
3.12
250
1.8
mV
V
CS=SWEEP UP
OCP Latch OFF Detect Voltage
OVP Detect Voltage
CS=SWEEP UP
VOVP
V
VOVP SWEEP UP
VOVP SWEEP DOWN
VOVP=4.0V, VSTB=3.0V
OVP Detect Hysteresis
OVP Pin Leak Current
VOVP_HYS
OVP_LK
mV
μA
【LED Protection Block】
LED OCP Detect Voltage
Over Boost Detection Voltage
【Dimming Block】
VLEDOCP
VFBH
2.88
3.84
3.00
4.00
3.12
4.16
V
V
VISENSE=SWEEP UP
VFB=SWEEP UP
MS Pin Leak Current
ILMS
-1.8
-2
0
0
1.8
2
μA
μA
VMS=2.0V
ISENSE Pin Leak Current
IL_ISENSE
VISENSE=4.0V
DIMOUT Source ON
Resistance
DIMOUT Sink ON Resistance
MS Pin HIGH Voltage
(Active mode)
RONSO
RONSI
VMS_H
5.0
4.0
10.0
8.0
-
20.0
16.0
20
Ω
Ω
V
0.70
MS=Sweep up
MS Pin LOW Voltage
(Stand-by mode)
VMS_L
-0.25
-
0.25
V
MS=Sweep down
【REG90 Block】
REG90 Output Voltage 1
REG90 Output Voltage 2
REG90_1
REG90_2
8.91
9.00
9.00
9.09
V
V
IO=0mA
8.865
9.135
IO=-15mA
REG90 Available Source
Current
| IREG90 |
REG90_TH
REG90_DIS
15
-
-
mA
V
VREG90=SWEEP DOWN,
VSTB=0V
STB=MS=ON->OFF,
REG90=8.0V, PWM=H
REG90_UVLO Detect Voltage
REG90 Discharge Resistance
5.22
13.2
6.00
22.0
6.78
30.8
kΩ
【STB Block】
STB Pin HIGH Voltage
STB Pin LOW Voltage
STB Pull Down Resistance
【PWM Block】
STBH
STBL
RSTB
2.0
-0.3
600
-
-
18
0.8
V
V
1000
1400
kΩ
VSTB=3.0V
PWM Pin HIGH Voltage
PWM Pin LOW Voltage
PWM Pin Pull Down Resistance
【Filter Block】
PWM_H
PWM_L
RPWM
1.5
-0.3
600
-
-
18
0.8
V
V
1000
1400
kΩ
VPWM=3.0V
Abnormal Detection Timer
AUTO Timer
tCP
-
-
20
-
-
ms
ms
FCT=200kHz
FCT=200kHz
tAUTO
655
【FAIL Block 】
Pull Up Resistance of
FAILB Pin Latch Off
RFAIL
-
3.0
6.0
kΩ
CS=1.15V
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1.9 Typical Performance Curves (Reference data)
100
90
80
70
60
50
40
30
20
10
0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
STB=MS=3.0V
PWM=3.0V
Ta=25°C
STB=3V, MS=0V
PWM=0V
Ta=25°C
0.5
0.0
10
15
20
25
VCC[V]
30
35
10
15
20
25
VCC[V]
30
35
Figure 5. Operating circuit current
Figure 6. Standby circuit current MS
0.8
100
80
60
40
20
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
― Sweep Up
… Sweep Down
VCC=24V
Ta=25°C
VCC=24V
Ta=25°C
0
1
2
3
4
5
0
1
2
3
4
MS[V]
FB[V]
Figure 7. Duty cycle vs FB character
Figure 8. ISENSE feedback voltage vs MS character
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2.1 Pin Descriptions
○Pin 1: VCC
This is the power supply pin of the IC. Input range is from 11.5V to 35V.
The operation starts at more than 10.5V(typ.) and shuts down at less than 10.2V(typ.).
○Pin 2: STB
This is the ON/OFF setting terminal of the IC. Input reset-signal to this terminal to reset IC from latch-off.
At startup, internal bias starts at high level, and then PWM DCDC boost starts after PWM rise edge inputs.
Note: IC status (IC ON/OFF) transits depending on the voltage inputted to STB and MS terminal. Avoid the use of
intermediate level (from 0.8V to 2.0V).
○Pin 3: OVP
The OVP terminal is the input for over-voltage protection. If OVP is more than 3.0V(typ), the over-voltage protection
(OVP) will work. At the moment of these detections, it sets GATE=L, DIMOUT=L and starts to count up the abnormal
interval. If OVP detection continued to count four GATE clocks, IC reaches latch off. (Please refer to “3.5.5 Timing Chart”)
The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.
Even if OVP function is not used, pin bias is still required because the open connection of this pin is not a fixed potential.
The setting example is separately described in the section ”3.2.6 OVP Setting”.
○Pin 4: UVLO
Under Voltage Lock Out pin is the input voltage of the power stage. , IC starts the boost operation if UVLO is more than
3.0V(typ) and stops if lower than 2.7V(typ).
The UVLO pin is high impedance, because the internal resistance is not connected to a certain bias.
Even if UVLO function is not used, pin bias is still required because the open connection of this pin is not a fixed
potential.
The setting example is separately described in the section ”3.2.5 UVLO Setting”
○Pin 5: SS
This is the pin which sets the soft start interval of DC/DC converter. It performs the constant current charge of 3.0 μA(typ.)
to external capacitance Css. The switching duty of GATE output will be limited during 0V to 3.7V(typ.) of the SS voltage.
So the soft start interval Tss can be expressed as follows
TSS 1.23106 CSS[sec]ꢀ Css: the external capacitance of the SS pin.
The logic of SS pin asserts low is defined as the latch-off state or PWM is not input high level after STB reset release.
When SS capacitance is under 1nF, take note if the in-rush current during startup is too large, or if over boost detection
(FBMAX) mask timing is too short.
Please refer to soft start behavior in the section “3.5.4 Timing Chart ”.
○Pin 6: PWM
This is the PWM dimming signal input terminal. The high / low level of PWM pins are the following.
State
PWM input voltage
PWM=1.5V to 18.0V
PWM=‐0.3V to 0.8V
PWM=H
PWM=L
○Pin 7: FAIL
This is FAIL signal output (OPEN DRAIN) pin. At normal operation, PMOS will be OPEN state, during abnormality
detection PMOS will be in ON (3kohm typ.) state. And Pull Up to VCC.
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○Pin 8: MS
This is the input pin for analog dimming signal. In this condition, the input current is caused. Please refer to <ISENSE>
terminal explanation.
Relationship between MS Voltage and ISENSE Voltage.
VMS =3V(2.70~10.0V): VISENSE = 0.500V (110% dimming)
VMS =2V(1.70~2.25V): VISENSE = 0.455V (100% dimming)
VMS =1V(0.70~1.25V): VISENSE = 0.341V (75% dimming)
VMS =0V(-0.25~0.25V): MS Stand-by Mode
ISENSE
Detect level[V]
0.500V
0.455V
0.341V
0
10V
0
0.25V
0.70V
1.25V 1.70V
2.25V 2.70V
MS[V]
Figure 9. MS Dimming
○Pin 9: RT
This is the DC/DC switching frequency setting pin. DCDC frequency is decided by connected resistor.
○The relationship between the frequency and RT resistance value (ideal)
15000
RRT
[k]ꢀ
fSW[kHz]
The oscillation setting ranges from 50kHz to 1000kHz.
The setting example is separately described in the section ”3.2.4 DCDC Oscillation Frequency Setting”.
○Pin 10: FB
This is the output terminal of error amplifier.
FB pin rises with the same slope as the SS pin during the soft-start period.
After soft -start completion (SS>3.7V(typ.)), it operates as follows.
When PWM=H, it detects ISENSE terminal voltage and outputs error signal compared to analog dimming signal (MS).
It detects over boost (FBMAX) over FB=4.0V(typ). After the SS completion, if FB>4.0V and PWM=H continues 4clk GATE,
the CP counter starts. After that, only the FB>4.0V is monitored, When CP counter reaches 4096clk (212clk), IC will be
latched off. (Please refer to section “3.5.6 Timing Chart”.)
The loop compensation setting is described in section "3.4 Loop Compensation".
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○Pin 11: ISENSE
This is the input terminal for the current detection. Error amplifier will be 3
Vout
Dimming modes by the voltage input from the MS voltage. The 3 modes are
compared with each DET voltage. And it detects abnormal LED overcurrent at
ISENSE=3.0V(typ) over. If GATE terminal continues during four CLKs
(equivalent to 40us at fosc = 100kHz), it becomes latch-off.
(Please refer to section “3.5.7 Timing Chart”.)
BD9409
ISENSE
Detect level[V]
DIMOUT
Error AMP
ISENSE
-
0.500V
0.455V
+
Rs
0.341V
CS DET
Level
Selecter
MS
FB
0
10V
0
0.25V
0.70V
1.25V 1.70V
2.25V 2.70V
MS[V]
Figure 10. Relationship of the feedback voltage and MS
Figure 11. ISENSE terminal circuit example
○Pin 12: GND
This is the GND pin of the IC.
Vout
○Pin 13: DIMOUT
This is the output pin for external dimming NMOS. The table below shows the rough
output logic of each operation state, and the output H level is REG90. Please refer to
“3.5 Timing Chart” for detailed explanations, because DIMOUT logic has an exceptional
behavior. Please insert the resistor RDIM between the dimming MOS gate to improve the
over shoot of LED current, as PWM turns from low to high.
REG90
RDIM
DIMOUT
Status
Normal
DIMOUT output
Same logic to PWM
GND Level
ISENSE
Abnormal
BD9409
Figure 12. DIMOUT terminal circuit
example
○Pin 14: GATE
This is the output terminal for driving the gate of the boost MOSFET. The high level
is REG90. Frequency can be set by the resistor connected to RT. Refer to <RT> pin description for the frequency setting.
○Pin 15: CS
The CS pin has two functions.
VIN
1. DC / DC current mode Feedback terminal
BD9409
The inductor current is converted to the CS pin voltage by the sense resistor RCS.
This voltage compared to the voltage set by error amplifier controls the output
pulse.
2. Inductor current limit (OCP) terminal
Id
GATE
CS
The CS terminal also has an over current protection (OCP). If the voltage is more
than 0.4V(typ.), the switching operation will be stopped compulsorily. And the next
boost pulse will be restarted to normal frequency.
In addition, the CS voltage is more than 1.0V(typ.) during four GATE clocks, IC will
be latch off. As above OCP operation, if the current continues to flow nevertheless
GATE=L because of the destruction of the boost MOS, IC will stops the operation
completely.
Cs
Rcs
GND
Figure 13. CS terminal circuit example
Both of the above functions are enabled after 300ns (typ) when GATE pin
asserts high, because the Leading Edge Blanking function (LEB) is included into this IC to prevent the effect of noise.
Please refer to section “3.3.1 OCP Setting / Calculation Method for the Current Rating of DCDC Parts”, for detailed
explanation.
If the capacitance Cs in the right figure is increased to a micro order, please be careful that the limited value of NMOS
drain current Id is more than the simple calculation. Because the current Id flows not only through Rcs but also through
Cs, as the CS pin voltage moves according to Id.
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BD9409F
○Pin 16: REG90
This is the 9.0V(typ.) output pin. Available current is 15mA
(min).
10
8
The characteristic of VCC line regulation at REG90 is shown as
figure. VCC must be used in more than 11.5V for stable 9V
output.
Please place the ceramic capacitor connected to REG90 pin
(1.0μF to 10μF) closest to REG90-GND pin.
6
4
2
0
0
5
10
15
VCC[V]
20
25
30
35
Figure 14. REG90 line regulation
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2.6 List of The Protection Function Detection Condition (Typ Condition)
Detect condition
Detection condition
Protect
function
Detection
pin
Release
condition
Timer
operation
Protection type
PWM
SS
Auto-restart after detection
(Judge periodically
whether normal or not)
Auto-restart after detection
(Judge periodically
FBMAX
FB
FB > 4.0V
H(4clk) SS>3.7V
FB < 4.0V
212clk
4clk
LED OCP
ISENSE
ISENSE > 3.0V
-
-
ISENSE < 3.0V
whether normal or not)
RT GND
SHORT
Release
RT=GND
RT
RT
RT<VRT×90%
RT>5V
-
-
-
-
NO
NO
Restart by release
Restart by release
RT HIGH
SHORT
Release
RT=HIGH
UVLO
UVLO
REG90
VCC
UVLO<2.7V
REG90<6.0V
VCC<10.2V
-
-
-
-
-
-
UVLO>3.0V
REG90>6.5V
VCC>10.5V
NO
NO
NO
Restart by release
Restart by release
Restart by release
REG90UVLO
VCC UVLO
Auto-restart after detection
(Judge periodically
whether normal or not)
OVP
OCP
OVP
CS
OVP>3.0V
CS>0.4V
CS>1.0V
-
-
-
-
-
-
OVP<2.8V
-
4clk
NO
Pulse by pulse
Auto-restart after detection
(Judge periodically
OCP LATCH
CS
CS<1.0V
4clk
whether normal or not)
To reset the latch type protection, please set STB logic to ‘L’ once. Otherwise the detection of VCCUVLO, REG90UVLO is
required.
The clock number of timer operation corresponds to the boost pulse clock.
Auto-restart clock = 217clk = 131072clk.
2.7 List of The Protection Function Operation
Operation of the protect function
Protect function
DC/DC gate
output
Stop after latch
Dimming transistor
(DIMOUT) logic
Low after latch
SS pin
FAIL pin
FBMAX
Discharge after latch
Discharge after latch
High after timer latch
High after timer latch
Immediately high,
Low after latch
LED OCP
Stop immediately
RT GND SHORT
RT HIGH SHORT
Stop immediately
Stop immediately
Immediately low
Immediately low
Not discharge
Not discharge
Low
Low
Low after REG90UVLO
detects
Low after REG90UVLO
detects
STB
Stop immediately
Stop immediately
Discharge immediately
Discharge immediately
Low
Low
MS_STB
UVLO
REG90UVLO
VCC UVLO
OVP
Stop immediately
Stop immediately
Stop immediately
Stop immediately
Stop immediately
Stop after latch
Immediately low
Immediately low
Immediately low
Immediately low
Normal operation
Low after latch
Discharge immediately
Discharge immediately
Discharge immediately
Discharge after latch
Not discharge
Low
Low
Low
High after timer latch
Low
OCP
OCP LATCH
Discharge after latch
High after timer latch
Please refer to section “3.5 Timing Chart” for details.
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BD9409F
3.1 Application Circuit Example
Introduce an example application using the BD9409F.
3.1.1 Basic Application Example
Vout
VCC
VIN
VCC
UVLO
OVP
REG90
STB
RT
GATE
CS
SS
FAIL
DIMOUT
PWM
MS
ISENSE
FB
Rs
GND
Figure 15. Basic application example
3.1.2 MS Dimming or PWM Dimming Examples
Vout
Vout
VCC
VIN
VCC
VIN
VCC
UVLO
OVP
VCC
UVLO
OVP
REG90
STB
RT
REG90
STB
RT
GATE
CS
GATE
CS
SS
SS
FAIL
DIMOUT
FAIL
DIMOUT
REG90
REG90
PWM
MS
ISENSE
FB
PWM
MS
ISENSE
FB
Rs
Rs
GND
GND
Figure 16. Example circuit for analog dimming
Figure 17. Example circuit for PWM dimming
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BD9409F
3.2 External Components Selection
3.2.1 Start Up Operation and Soft Start External Capacitance Setting
The below explanation is the start up sequence of this IC
1
5V
VOUT
STB
COMP
SS
SLOPE
SS
MS
GATE
CS
FB
Css
DRIVER
OSC
OSC
SS=FB
Circuit
PWM
LED_OK
DIMOUT
ISENSE
FB
GATE
VOUT
2
3
ILED
PWM
4
LED_OK
6
5
Figure 18. Startup waveform
Figure 19. Circuit behavior at startup
○Explanation of start up sequence
1. Reference voltage REG90 starts by STB=MS=H.
2. SS starts to charge at the time of first PWM=H. At this moment, the SS voltage of slow-start starts to equal FB
voltage,and the circuit becomes FB=SS regardless of PWM logic.
3. When FB=SS reaches the lower point of internal sawtooth waveform, GATE terminal outputs pulse and starts to boost
VOUT.
4. It boosts VOUT and VOUT reaches the voltage to be able to flow LED current.
5. If LED current flows over decided level, FB=SS circuit disconnects and startup behavior completes.
6. Then it works normal operation by feedback of ISENSE terminal. If LED current doesn't flow when SS becomes over
3.7V(typ.), SS=FF circuit completes forcibly and FBMAX protection starts.
○Method of setting SS external capacitance
According to the sequence described above, start time Tss that startup completes with FB=SS condition is the time that
FB voltage reaches the feedback point.
The capacitance of SS terminal is defined as Css and the feedback voltage of FB terminal is defined as VFB. The
equality on TFB is as follows.
Css[F]VFB[V]
Tss
[sec]
3[A]
If Css is set to a very small value, rush current flows into the inductor at startup.
On the contrary, if Css is enlarged too much, LED will light up gradually.
Since Css differs in the constant set up with the characteristic searched for and differs also by factors, such as a voltage
rise ratio, an output capacitance, DCDC frequency, and LED current, please confirm with the system.
【Setting example】
When Css=0.1uF,Iss=3μA,and startup completes at VFB=3.7V, SS setting time is as follows.
0.1106[F]3.7[V]
Tss
0.123[sec]
3106[A]
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3.2.2 VCC Series Resistance Setting
VIN
Here are the following effects of inserting series resistor Rvcc into VCC line.
(i) In order to drop the voltage VCC, it is possible to suppress the heat
generation of the IC.
RVCC
ΔV
(ii) It can limit the inflow current to VCC line.
VCC
However, if resistance RVCC is set bigger, VCC voltage becomes under
minimum operation voltage (VCC<11.5V). RVCC must be set to an appropriate
series resistance.
I_IN
ICC
IC’s inflow current line I_IN has the following inflow lines.
・IC’s circuit current…ICC
・Current of RREG connected to REG90…IREG
・Current to drive FET’s Gate…I_GATE
+
-
REG90
IREG
Internal
BLOCK
RREG
IDCDC
These decide the voltage ΔV at RVCC.
VCC terminal voltage at that time can be expressed as follows.
I_GATE
VCC[V] VIN[V](ICC[A] IDCDC[A] IREG[A]) RVCC[] 11.5[V]
GATE
DCDC
DRIVER
Here, judgement is the 11.5V minimum operation voltage.
Please consider a sufficient margin when setting the series resistor of VCC.
Figure 20. VCC series resistance
circuit example
【setting example】
Above equation is translated as follows.
VIN[V] 11.5[V]
RVCC[]
ICC[A] IDCDC[A] IREG[A]
When VIN=24V, ICC=2.0mA, RREG=10kΩ and IDCDC=2mA, RVCC’s value is calculated as follows.
24[V] 11.5[V]
0.002[A] 0.002[A] 9.0[V]/10000[]
RVCC[]
2.55[k]
(ICC is 2.8mA(typ.)) . Please set each values with tolerance and margin.
3.2.3 LED current setting
LED current can be adjusted by setting the resistance RS [Ω] which connects to ISENSE pin and MS[V].
Relationship between RS and ILED current
With VMS2 dimming (1.7V<MS<2.25V)=100% Dimming.
0.455[V ]
Vout
RS
[]
ILED [A]
BD9409
DIMOUT
【setting example】
If ILED current is 200mA and MS is 2.0V, we can calculate RS as below.
Error AMP
ISENSE
-
0.455[V ] 0.455[V ]
RS
3.03[]
ILED [A] 0.150[A]
+
Rs
CS DET
Level
Selecter
With VMS1 dimming (0.7V<MS<1.25V)=75% Dimming.
MS
FB
0.341[V ] 0.341[V ]
ILED
112.5[mA]
RS []
3.03[]
Figure 21. LED current setting example
With VMS3 dimming (2.7V<MS<3.25V)=110% Dimming.
0.500[V] 0.500[V ]
ILED
165[mA]
RS []
3.03[]
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3.2.4 DCDC Oscillation Frequency Setting
RRT which connects to RT pin sets the oscillation frequency fSW of DCDC.
○Relationship between frequency fSW and RT resistance (ideal)
15000
fSW[kHz]
RRT
[k]ꢀ
Frequency(fsw)
【setting example】
When DCDC frequency fsw is set to 200kHz, RRT is as follows.
GATE
CS
15000 15000
fSW[kHz] 200[kHz]
RRT
75[k]ꢀ
RT
Rcs
RRT
GND
Figure 22. RT terminal setting example
3.2.5 UVLO Setting
Under Voltage Lock Out pin is the input voltage of the power stage. IC starts boost operation if UVLO is more than
3.0V(typ.) and stops if lower than 2.7V(typ.).
The UVLO pin is high impedance, because the internal resistance is not connected to a certain bias.
So, the bias by the external components is required, because the open connection of this pin is not a fixed potential.
Detection voltage is set by dividing resistors R1 and R2. The resistor values can be calculated by the formula below.
○UVLO detection equation
As VIN decreases, R1 and R2 values are set in the following formula by the VINDET that UVLO detects.
(VINDET [V] 2.7[V])
2.7[V]
VIN
R1 R2[k]
[k]ꢀ
○UVLO release equation
R1 and R2 setting is decided by the equation above. The equation of UVLO
release voltage is as follows.
R1
R2
UVLO
(R1[k] R2[k])
+
-
ON OFF
/
VINCAN 3.0V
[V]ꢀ
2.7V/3.0V
R2[k]
CUVLO
【setting example】
If the normal input voltage, VIN is 24V, the detect voltage of UVLO is 18V, R2 is
30kΩ, R1 is calculated as follows.
Figure 23. UVLO setting example
(VINDET [V] 2.7[V])
2.7[V]
(18[V] 2.7[V])
30[k]ꢀ
R1 R2[k]
170.0[k]
2.7[V]
By using these R1 and R2, the release voltage of UVLO, VINCAN, can be calculated too as follows.
(R1[k] R2[k])
R2[k]
(170.0[k] 30[k])
30[k]
VINCAN 3.0V
3.0[V]ꢀ
[V] 20.0[V]
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3.2.6 OVP Setting
The OVP terminal is the input for over-voltage protection of output voltage.
The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.
Detection voltage of VOUT is set by dividing resistors R1 and R2. The resistor values can be calculated by the formula
below.
○OVP detection equation
If VOUT is boosted abnormally, VOVPDET, the detect
VOUT
voltage of OVP, R1, R2 can be expressed by the following formula.
R1
R2
(VOVPDET [V] 3.0[V])
3.0[V]
OVP
OVP
R1 R2[k]
[k]ꢀ
+
-
2.8V/3.0V
○OVP release equation
COVP
By using R1 and R2 in the above equation, the release voltage of
OVP, VOVPCAN can be expressed as follows.
(R1[k] R2[k])
VINCAN 2.8V
[V]ꢀ
R2[k]
Figure 24. OVP setting example
【setting example】
If the normal output voltage, VOUT is 40V, the detect voltage of OVP is 48V, R2 is 10kΩ, R1 is calculated as follows.
(VOVPDET [V] 3.0[V])
3.0[V]
(48[V] 3.0[V])
3[V]
R1 R2[k]
10[k]ꢀ
150[k]
By using these R1 and R2, the release voltage of OVP, VOVPCAN can be calculated as follows.
(R1[k] R2[k])
R2[k]
150[k]10[k]
10[k]
VINCAN 2.8V
2.8[V]ꢀ
[V] 44.8[V]
3.2.7 Timer Latch Time (CP Counter) Setting, Auto-Restart Timer Setting
About over boost protection (FBMAX), timer latch time (CP Counter) is set by counting the clock frequency which is set
at the RT pin. About the behavior from abnormal detection to latch-off, please refer to the section “3.5.6 Timing Chart”.
The condition FB>4.0V(typ.) and PWM=H continues more than four GATE clocks, counting starts from the timing. After
that, only the FB voltage is monitored and latch occurs after below time has passed.
RRT
1.5107
RRT [k]
1.5107
LATCHTIME 212
4096
[s]ꢀ
RRT
1.5107
RRT [k]
1.5107
AUTOTIME 217
131072
[s]ꢀ
Here, LATCHTIME = time until latch condition occurs, AUTOTIME = auto restart timer’s time
RRT = Resistor value connected to RT pin
【setting example】
Timer latch time when RT=75kohm
RRT [k]
1.5107
75[k]
LATCHTIME 4096
4096
20.48[ms]ꢀ
655.36[ms]ꢀ
1.5107
RRT [k]
1.5107
75[k]
AUTOTIME 131072
131072
1.5107
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3.3 DCDC Parts Selection
3.3.1. OCP Setting / Calculation Method for the Current Rating of DCDC Parts
OCP detection stops the switching when the CS pin voltage is more than 0.4V(typ.). The resistor value of CS pin, RCS
needs to be considered by the coil L current. And the current rating of DCDC external parts is required more than the
peak current of the coil.
Shown below are the calculation method of the coil peak current, the selection method of Rcs (the resistor value of CS
pin) and the current rating of the external DCDC parts at Continuous Current Mode.
(the calculation method of the coil peak current, Ipeak at Continuous Current Mode)
At first, since the ripple voltage at CS pin depends on the application condition of DCDC, the following variables are used.
Vout voltage=VOUT[V]
LED total current=IOUT[A]
L
VOUT
DCDC input voltage of the power stage =VIN[V]
Efficiency of DCDC =η[%]
VIN
IL
And then, the average input current IIN is calculated by the following
equation.
VOUT [V ] IOUT [A]
VIN [V ][%]
fsw
IIN
[A]ꢀ
GATE
And the ripple current of the inductor L (ΔIL[A]) can be calculated by using
DCDC the switching frequency, fsw, as follows.
CS
Rcs
(VOUT [V ]VIN [V]) VIN [V ]
L[H]VOUT [V] fSW [Hz]
GND
IL
[A]ꢀ
(V)
On the other hand, the peak current of the inductor Ipeak can be expressed
as follows.
IL[A]
IPEAK IIN [A]
[A]ꢀ
… (1)
2
Therefore, the bottom of the ripple current Imin is
(A)
(t)
IL[A]
Ipeak
or 0
ꢀ
Imin IIN [A]
2
ΔIL
IIN
If Imin>0, the operation mode is CCM (Continuous Current Mode),
otherwise the mode is DCM (Discontinuous Current Mode).
Imin
(the selection method of Rcs at Continuous Current Mode)
Ipeak flows into Rcs and that causes the voltage signal to CS pin. (Please
refer to the timing chart at the right)
(t)
(V)
Peak voltage VCSpeak is as follows.
0.4V
VCSPEAK RCS IPEAK [V]ꢀ
As this VCSpeak reaches 0.4V(typ.), the DCDC output stops the switching.
VCSpeak
Therefore, Rcs value is necessary to meet the condition below.
RCS IPEAK [V] 0.4[V]ꢀ
(t)
Figure 25. Coil current waveform
(the current rating of the external DCDC parts)
The peak current as the CS voltage reaches OCP level (0.4V (typ.)) is defined as Ipeak_det.
0.4[V ]
… (2)
IPEAK _ DET
[A]ꢀ
RCS []
The relationship among Ipeak (equation (1)), Ipeak_det (equation (2)) and the current rating of parts is required to meet
the following
IPEAK IPEAK _ DET
The current rating of parts
Please make the selection of the external parts such as FET, Inductor, diode meet the above condition.
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[setting example]
Output voltage = VOUT [V] = 40V
LED total current = IOUT [A] = 0.48V
DCDC input voltage of the power stage = VIN [V] = 24V
Efficiency of DCDC =η[%] = 90%
Averaged input current IIN is calculated as follows.
VOUT [V] IOUT [A] 40[V]0.48[A]
IIN [A]
ꢀ
0.89 [A]
VIN [V][%]
24[V]90[%]
If the switching frequency, fSW = 200kHz, and the inductor, L=100μH, the ripple current of the inductor L (ΔIL[A]) can be
calculated as follows.
(VOUT [V]VIN [V])VIN [V]
(40[V]24[V])24[V]
Δ IL
ꢀ
0.48 [A]
L[H]VOUT [V] fSW [Hz] 100106[H]40[V]200103[Hz]
Therefore the inductor peak current, Ipeak is
IL[A]
0.48[A]
Ipeak IIN [A]
ꢀ[A] 0.89[A]
1.13 [A]
…calculation result of the peak current
2
2
If Rcs is assumed to be 0.3Ω
VCSpeak Rcs Ipeak 0.3[]1.13[A] 0.339 [V]0.4V
…Rcs value confirmation
The above condition is met.
And Ipeak_det, the current OCP works, is
0.4[V]
Ipeak_ det
1.33 [A]
0.3[]
If the current rating of the used parts is 2A,
Ipeak Ipeak _det
1.13[A]1.33[A] 2.0[A]
The current rating
…current rating confirmation
of DCDC parts
This inequality meets the above relationship. The parts selection is proper.
And IMIN, the bottom of the IL ripple current, can be calculated as follows.
IL[A]
IMIN IIN [A]
[A] 1.13[A] 0.48[A] 0.65[A] 0ꢀ
2
This inequality implies that the operation is continuous current mode.
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3.3.2. Inductor Selection
The inductor value affects the input ripple current, as shown the previous section 3.3.1.
(VOUT [V]VIN [V]) VIN [V]
Δ IL
[A]
L[H]VOUT [V] fSW [Hz]
ΔIL
VOUT [V ] IOUT [A]
VIN [V ][%]
IIN
[A]ꢀ
VIN
IL[A]
Ipeak IIN [A]
[A]
IL
2
L
Where
VOUT
L: coil inductance [H]
VIN: input voltage [V]
VOUT: DCDC output voltage [V]
IOUT: output load current (the summation of LED current) [A]
IIN: input current [A] fSW: oscillation frequency [Hz]
RCS
COUT
Figure 26. Inductor current waveform and diagram
In continuous current mode, ⊿IL is set to 30% to 50% of the output load current in many cases.
In using smaller inductor, the boost is operated by the discontinuous current mode in which the coil current returns to
zero at every period.
*The current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, results in
decreasing in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not
exceed the rated current value of the inductor.
*To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be
selected
3.3.3. Output Capacitance Cout Selection
Output capacitor needs to be selected in consideration of equivalent series resistance
required to even the stable area of output voltage or ripple voltage. Be aware that set
LED current may not be flown due to decrease in LED terminal voltage if output ripple
VIN
IL
L
component is high.
VOUT
Output ripple voltage ⊿VOUT is determined by Equation (4):
RESR
COUT
Δ Vout Δ ILRESRꢀ[V]ꢀ・・・・・ ꢀꢀ(4)
RCS
When the coil current is charged to the output capacitor as MOS turns off, much output
ripple is caused. Much ripple voltage of the output capacitor may cause the LED current
ripple.
Figure 27. Output capacitor diagram
* Rating of capacitor needs to be selected to have adequate margin against output voltage.
*To use an electrolytic capacitor, adequate margin against allowable current is also necessary. Be aware that the LED
current is larger than the set value transitionally in case that LED is provided with PWM dimming especially.
3.3.4. MOSFET Selection
There is no problem if the absolute maximum rating is larger than the rated current of the inductor L, or is larger than
the sum of the tolerance voltage of COUT and the rectifying diode VF. The product with small gate capacitance (injected
charge) needs to be selected to achieve high-speed switching.
* One with over current protection setting or higher is recommended.
* The selection of one with small on resistance results in high efficiency.
3.3.5. Rectifying Diode Selection
A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than the
tolerance voltage of COUT, and low forward voltage VF especially needs to be selected.
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3.4. Loop Compensation
A current mode DCDC converter has each one pole (phase lag) fp due to CR filter composed of the output capacitor and
the output resistance (= LED current) and zero (phase lead) fZ by the output capacitor and the ESR of the capacitor.
Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) fZRHP which is unique with the boost
converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the
cross-over frequency fc, set as follows, is suggested.
fc = fZRHP /5 (fZRHP: RHP zero frequency)
Considering the response speed, the calculated constant below is not always optimized completely. It needs to be
adequately verified with an actual device.
VOUT
VIN
ILED
L
-
+
VOUT
FB
gm
RFB1
CFB1
RESR
COUT
CFB2
RCS
Figure 28. Output stage and error amplifier diagram
i.
Calculate the pole frequency fp and the RHP zero frequency fZRHP of DC/DC converter
VOUT (1 D)2
2 L ILED
ILED
fp
ꢀ[Hz]ꢀꢀ
fZRHP
ꢀ[Hz]ꢀꢀ
2 VOUT COUT
VOUT VIN
Where ILED = the summation of LED current,
(Continuous Current Mode)
ꢀꢀ
D
VOUT
ii.
Calculate the phase compensation of the error amp output (fc = fZRHP/5)
fRHZP RCS ILED
5 fp gm VOUT (1 D)
RFB1
CFB1
ꢀ[]ꢀꢀ
1
5
[F]
2 R
f
2 R
f
FB1
c
FB1 ZRHP
gm 4.0104[S]ꢀ
Above equation is described for lighting LED without the oscillation. The value may cause much error if the quick
response for the abrupt change of dimming signal is required.
To improve the transient response, RFB1 needs to be increased, and CFB1 needs to be decreased. It needs to be
adequately verified with an actual device in consideration of variation from parts to parts since phase margin is
decreased.
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3.5. Timing Chart
3.5.1 PWM Start up 1 (Input PWM Signal After Input STB Signal)
10.5V
VCC
STB
MS
PWM
6.5V
REG90
3.7V
SS
GATE
FAIL
0.4V
0.4V
OFF
STANDBY
SS
Normal
SS
STANDBY
STATE
(*4)
Figure 29. PWM Start up 1 (Input PWM Signal After Input STB Signal)
(*1)(*2)
(*3)
(*5)
(*6)
(*1)…REG90 starts up when STB and MS is changed from Low to High. In the state where the PWM signal is not inputted, SS
terminal is not charged and DCDC doesn’t start to boost, either.
(*2)…When REG90 is more than 6.5V(typ.), the reset signal is released.
(*3)…The charge of the pin SS starts at the positive edge of PWM=L to H, and the soft start starts. And while the SS is less than
0.4V, the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level.
(*4)…The soft start interval will end if the voltage of the pin SS, Vss reaches 3.7V(typ.). By this time, it boosts VOUT to the
voltage where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.
(*5)…As STB or MS=L, the boost operation is stopped instantaneously. (Discharge operation continues in the state of STB=L
and REGUVLO=L. Please refer to section 3.5.3)
(*6)…In this diagram, before the charge period is completed, MS is changed to High again. As MS=H again, the boost operation
restarts the next PWM=H. It is the same operation as the timing of (*2). (For capacitance setting of SS terminal, please
refer to the section 3.2.1.
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3.5.2 PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)
10.5V
VCC
STB
MS
PWM
6.5V
REG90
3.7V
0.4V
SS
0.4V
GATE
FAIL
STATE
OFF
SS
NORMAL
STANDBY
SS
(*1)(*2)
Figure 30. PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)
(*1)…REG90 starts up when STB=MS=H.
(*3)
(*4)
(*5)
(*2)…When REG90UVLO releases or PWM is inputted to the edge of PWM=L→H, SS charge starts and soft start period is
started. And while the SS is less than 0.4V, the pulse does not output. The pin SS continues charging in spite of the
assertion of PWM or OVP level.
(*3)…The soft start interval will end if the voltage of the pin SS, Vss reaches 3.7V(typ.). By this time, it boosts VOUT to the point
where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.
(*4)…As STB=L, the boost operation is stopped instantaneously (GATE=L, SS=L). (Discharge operation works in the state of
STB or MS=L and REG90UVLO=H. Please refer to the section 3.5.3)
(*5)…In this diagram, before the discharge period is completed, MS is changed to High again. As MS=H again, operation will be
the same as the timing of (*1).
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3.5.3 Turn Off
STB
PWM
REG90
6.0V
REG90UVLO
DIMOUT
GATE
Vout
SS
FAILB
ON
STATE
Dischange
OFF
(*2)
(*1)
Figure 32. Turn Off
(*1)…As STB or MS=H→L, boost operation stops and REG90 starts to discharge. The discharge curve is decided by REG90
discharge resistance and the capacitor of the REG90 terminal.
(*2)…While STB or MS=L, REG90UVLO=H, DIMOUT becomes same as PWM. When REG90=9.0V is less than 6.0V(typ.), IC
becomes OFF state. VOUT is discharged completely until this time. It should be set to avoid a sudden brightness.
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3.5.4 Soft Start Function
STB
MS
PWM
UVLO
2.7V
3.0V
10.2V
10.5V
6.0V
VCCUVLO
6.5V
3.0V
REG90UVLO
OVP
2.8V
4clk
FAIL
AUTO
COUNTER
131072 count
SS
(*1)
(*2) (*3)
(*4)
(*5)
(*6)
(*7)
Figure 33. Soft Start Function
(*1)…The SS pin charge does not start by just STB=MS=H. PWM=H is required to start the soft start. In the low SS voltage, the
GATE pin duty depends on the SS voltage. And while the SS is less than 0.4V, the pulse does not output.
(*2)…By the time STB or MS=L, the SS pin is discharged immediately.
(*3)…As the STB recovered to STB =MS=H, The SS charge starts immediately by the logic PWM=H in this chart.
(*4)…The SS pin is discharged immediately by the UVLO=L.
(*5)…The SS pin is discharged immediately by the VCCUVLO=L.
(*6)…The SS pin is discharged immediately by the REG90UVLO=L.
(*7)…The SS pin is not discharged by the abnormal detection of the latch off type such as OVP until the latch off.
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3.5.5 OVP Detection
STB
MS
PWM
REG90
3.0V
2.8V
2.8V
3.0V
2.8V
3.0V
OVP
Abnormal
COUNTER
Less than
Less than
Gate 4count
Gate 4count
Gate 4count
AUTO COUNTER
131072 count
SS
0.4V
GATE
DIMOUT
FAIL
Latch off and
AUTO COUNTER
STATE NORMAL
OVP
NORMAL
OVP
NORMAL
NORMAL
OVP
abnormal
abnormal
abnormal
(*1)
(*2)
(*3)
(*4) (*5)
(*6)
(*7)
Figure 34. OVP Detection
(*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts.
(*2)…If OVP is released within 4 clocks of abnormal counter of the GATE pin frequency, the boost operation restarts.
(*3)…As the OVP is detected again, the boost operation is stopped.
(*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC will be latched off. After latched off, auto
counter starts counting.
(*5)… Once IC is latched off, the boost operation doesn't restart even if OVP is released.
(*6)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. The auto restart interval can be calculated by the
external resistor of RT pin. (Please refer to the section 3.2.7.)
(*7)…The operation of the OVP detection is not related to the logic of PWM.
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3.5.6 FBMAX Detection
STB
MS
PWM
REG90
4.0V
4.0V
FB
GATE
・・・・・
・・・・
①
②
③
④
CP COUNTER
4096 count
AUTO COUNTER
131072 count
3.7V
SS
FAIL
Latch off and
AUTO COUNTER
SS
NORMAL
STANDBY
CP COUNTER
SS
STATE
(*3)
(*1) (*2)
(*4)
(*5)
(*6)
Figure 35. FBMAX Detection
(*2)…During the soft start, it is not judged to the abnormal state even if the FB=H(FB>4.0V(typ.)).
(*3)…When the PWM=H and FB=H, the abnormal counter doesn’t start immediately.
(*4)…The CP counter will start if the PWM=H and the FB=H detection continues up to 4 clocks of the GATE frequency. Once the
count starts, only FB level is monitored.
(*5)…When the FBMAX detection continues till the CP counter reaches 4096clk (212clk), IC will be latched off. The latch off
interval can be calculated by the external resistor of RT pin. (Please refer to the section 3.2.7.)
(*6)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. The auto restart interval can be calculated by the
external resistor of RT pin. (Please refer to the section 3.2.7.)
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3.5.7 LED OCP Detection
STB
MS
PWM
REG90
ISENSE
3.0V
3.0V
3.0V
3.0V
3.0V
3.0V
Abnormal
COUNTER
Less than
4count
4count
Less than
4count
AUTO COUNTER
131072 count
SS
0.4V
GATE
DIMOUT
FAIL
Latch off and
AUTO COUNTER
STATE NORMAL
LEDOCP
abnormal
NORMAL
LEDOCP
abnormal
NORMAL
LEDOCP
abnormal
NORMAL
(*1)
(*2)
(*3)
(*4) (*5)
(*6)
(*7)
Figure 36. LED OCP Detection
(*1)…If ISENSE>3.0V(typ.), LEDOCP is detected, and GATE becomes L. To detect LEDOCP continuously, The DIMOUT is
compulsorily high, regardless of the PWM dimming signal.
(*2)…When the LEDOCP releases within 4 counts of the GATE frequency, the boost operation restarts.
(*3) …As the LEDOCP is detected again, the boost operation is stopped.
(*4)…If the LEDOCP detection continues up to 4 counts of GATE frequency. IC will be latched off. After latched off, auto counter
starts counting.
(*5)…Once IC is latched off, the boost operation doesn't restart even if the LEDOCP releases.
(*6)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. The auto restart interval can be calculated by the
external resistor of RT pin. (Please refer to the section 3.2.7.)
(*7)…The operation of the LEDOCP detection is not related to the logic of the PWM.
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3.6 I/O Equivalent Circuits
OVP
UVLO
SS
UVLO
OVP
100k
5V
SS
50k
5V
3k
5V
RT
PWM
FAIL
PWM
VCC
100k
RT
FAIL
3k
5V
1M
MS
FB
DIMOUT / REG90
REG90
MS
20k
DIMOUT
GND
FB
5V
100k
GATE / REG90 / CS
STB
ISENSE
REG90
GATE
ISENSE
STB
20k
200k
5V
5V
100k
1M
GND
CS
Figure 37. I/O Equivalent Circuits
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BD9409F
Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6.
7.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
9.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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BD9409F
Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 38. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all
within the Area of Safe Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Ordering Information
B D 9
4
0
9
F
-
E 2
Part Number
Package
F:SOP16
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagrams
SOP16(TOP VIEW)
Part Number Marking
LOT Number
B D 9 4 0 9 F
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
SOP16
(Max 10.35 (include.BURR))
(UNIT : mm)
PKG : SOP16
Drawing No. : EX114-5001
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BD9409F
Revision History
Date
Revision
Rev.001
Changes
01 Nov 2016
New Release
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Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.003
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Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
相关型号:
BD941
Power Bipolar Transistor, 3A I(C), 120V V(BR)CEO, 1-Element, NPN, Silicon, TO-220AB, Plastic/Epoxy, 3 Pin
NJSEMI
BD9411F
BD9411F是白色LED用高效率驱动器,适用于大屏幕液晶驱动器。BD9411F内置了可向光源(LED串联连接的阵列)提供适当电压的DC/DC转换器。BD9411F中内置了应对异常状态的几种保护功能。过电压保护(OVP: over voltage protection), 过电流检测(OCP: over current limit protection of DCDC), LED 过电流保护(LEDOCP: LED over current protection), 过升压保护(FBMAX: over boost protection)等。因此,可在更宽的输出电压条件及负载条件下使用。
ROHM
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