BD9411F_技术文档

LED Drivers for LCD Backlights

1ch Boost up Type

White LED Driver for large LCD

BD9411F

General Description

Key Specifications

BD9411F is a high efficiency driver for white LEDs and is

designed for large LCDs. BD9411F has a boost DCDC

converter that employs an array of LEDs as the light

source.

 Operating power supply voltage range: 9.0V to 35.0V

 Oscillator frequency of DCDC: 150kHz (RT=100kΩ)

 Operating Current:

3.3 mA(Typ)

-40°C to +105°C

 Operating temperature range:

BD9411F has some protect functions against fault

conditions, such as over-voltage protection (OVP), over

current limit protection of DCDC (OCP), LED OCP

protection, and over-boost protection (FBMAX).

Therefore it is available for the fail-safe design over a

wide range output voltage.

Package(s)

W(Typ) x D(Typ) x H(Max)

11.20mm x 7.80mm x 2.01mm

Pin pitch 1.27mm

SOP18

Features

 DCDC converter with current mode

 LED protection circuit (Over boost protection, LED

OCP protection)

 Over-voltage protection (OVP) for the output voltage

V_OUT

 Adjustable soft start

 Adjustable oscillation frequency of DCDC

 Wide range of analog dimming 0.2V to 3.0V

 UVLO detection for the input voltage of the power

stage

 LED Dimming PWM Over Duty Protection(ODP)

Figure 1. SOP18

Applications

 TV, Computer Display, LCD Backlighting

Typical Application Circuit

V_OUT

V_CC

V_IN

VCC

UVLO

OVP

REG90

STB

GATE

CS

RT

SS

FAIL

DIMOUT

PWM

ADIM

ISENSE

FB

DUTYP

Rs

DUTYON

GND

Figure 2. Typical Application Circuit

○Product structure：Silicon monolithic integrated circuit ○This product has not designed protection against radioactive rays

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Pin Configuration(s)

18

17

16

15

14

13

12

11

10

1

2

3

4

5

6

7

8

9

VCC

REG90

CS

STB

OVP

GATE

DIMOUT

GND

UVLO

SS

DUTYON

PWM

FAIL

ISENSE

FB

DUTYP

RT

ADIM

Figure 3. Pin Configuration

Pin Description(s)

Terminal

Name

No.

Function

1

2

VCC

Power supply pin

IC ON/OFF pin

STB

OVP

3

Over voltage protection detection pin

Under voltage lock out detection pin

Soft start setting pin

4

UVLO

SS

5

6

DUTYON

PWM

FAIL

Over Duty Protection ON/OFF pin

External PWM dimming signal input pin

Error detection output pin

7

8

9

ADIM

RT

ADIM signal input pin

10

11

12

13

14

15

16

DC/DC switching frequency setting pin

Over Duty Protection setting pin

Error amplifier output pin

DUTYP

FB

ISENSE

GND

LED current detection input pin

-

DIMOUT

GATE

Dimming signal output for NMOS

DC/DC switching output pin

DC/DC output current detect pin,

OCP input pin

17

18

CS

REG90

9.0V output voltage pin

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Block Diagram(s)

V_CC

V_IN

VCC

UVLO

OVP

REG90

STB

VCC

VREG

UVLO

TSD

OVP

UVLO

REG 90

UVLO

1MΩ

REG90

PWM

COMP

GATE

CS

RT

OSC

+

-

CONTROL

LOGIC

LEB

Current

sense

SS

REG90

SS-FB

clamper

DIMOUT

FAIL

Fail

detect

LEDOCP

Auto -

Restart

Control

ISENSE

FB

-

+

1.015V

PWM

ERROR

amp

Rs

1MΩ

OverBoost

DUTYP

Over Duty

Protection

OSC

DUTYON

1MΩ

ADIM

1/3

GND

Package:SOP18

Figure 4. Block Diagram

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BD9411F

Absolute Maximum Ratings (Tj=25°C)

Rating

Unit

V

Parameter

Power Supply Voltage

SS, RT, ISENSE, FB, CS,

DUTYP Pin Voltage

REG90, DIMOUT, GATE

Pin Voltage

Symbol

VCC

-0.3 to +36

SS, RT, ISENSE, FB, CS,

DUTYP

-0.3 to +7

V

REG90, DIMOUT, GATE

-0.3 to +13

OVP, UVLO, PWM, ADIM, STB,

FAIL, DUTYON

Pin Voltage

OVP, UVLO, PWM,

ADIM, STB, FAIL,

DUTYON

-0.3 to +20

V

Operating Temperature Range

Junction Temperature

Topr

Tjmax

Tstg

-40 to +105

150

°C

Storage Temperature Range

-55 to +150

Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

SOP18

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

179.3

20.0

119.9

17.0

°C/W

Ψ_JT

(Note 1)Based on JESD51-2A(Still-Air)

(Note 2)The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3)Using a PCB board based on JESD51-3.

(Note 4)Using a PCB board based on JESD51-7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70μm

Layer Number of

Measurement Board

Material

FR-4

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

4 Layers

Top

Copper Pattern

Bottom

Copper Pattern

74.2mm x 74.2mm

Thickness

Copper Pattern

Thickness

Footprints and Traces

70μm

74.2mm x 74.2mm

35μm

70μm

Recommended Operating Ranges

Parameter

Symbol

VCC

Range

Unit

V

Power Supply Voltage

9.0 to 35.0

50 to 1000

0.2 to 3.0

90 to 2000

DC/DC Oscillation Frequency

Effective Range of ADIM Signal

PWM Input Frequency

fsw

kHz

V

VADIM

FPWM

Hz

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BD9411F

Electrical Characteristics (Unless otherwise specified V_CC=24V Tj=25°C)

Parameter

【Total Current Consumption】

Circuit Current

Symbol

Min

Typ

Max

Unit

Conditions

I_CC

I_ST

－

3.3

40

6.6

80

mA

V_STB=3.0V, PWM=3.0V

V_STB=0V

Circuit Current (standby)

【UVLO Block】

μA

Operation Voltage（V_CC

）

V_{UVLO_VCC}

V_{UHYS_VCC}

V_UVLO

6.5

150

2.88

250

-2

7.5

300

3.00

300

0

8.5

600

3.12

350

2

V

mV

V

V_CC=SWEEP UP

V_CC=SWEEP DOWN

V_UVLO=SWEEP UP

V_UVLO=SWEEP DOWN

V_UVLO=4.0V

Hysteresis Voltage（V_CC

）

UVLO Release Voltage

UVLO Hysteresis Voltage

UVLO Pin Leak Current

【DC/DC Block】

V_UHYS

mV

μA

I_{VUVLO_LK}

ISENSE Threshold Voltage 1

ISENSE Threshold Voltage 2

ISENSE Threshold Voltage 3

V_LED1

V_LED2

V_LED3

0.225

0.656

0.988

0.233

0.667

1.000

0.242

0.677

1.012

V

V_ADIM=0.7V

V_ADIM=2.0V

V_ADIM=3.0V

V_ADIM=3.3V

(as masking analog dimming)

RT=100kΩ

ISENSE Clamp Voltage

Oscillation Frequency

V_LED4

F_CT

0.990

142.5

-0.3

1.015

150

-

1.040

157.5

V_RT

×90%

V

kHz

V

RT Short Protection Range

V_{RT_DET}

RT=SWEEP DOWN

RT Terminal Voltage

V_RT

1.6

90

2.0

95

2.4

99

V

RT=100kΩ

GATE Pin MAX DUTY Output

D_{MAX_DUTY}

%

GATE Pin ON Resistance

(as source)

GATE Pin ON Resistance

(as sink)

SS Pin Source Current

SS Pin ON Resistance at OFF

Soft Start Ended Voltage

【DC/DC Block】

R_{ON_GSO}

2.5

2.0

5.0

4.0

10.0

8.0

Ω

R_{ON_GSI}

I_SSSO

R_{SS_L}

-3.75

-

-3.0

3.0

-2.25

5.0

μA

kΩ

V

V_SS=2.0V

V_{SS_END}

3.52

3.70

3.88

SS=SWEEP UP

V_ISENSE=0.2V, V_ADIM=3.0V,

V_FB=1.0V

V_ISENSE=2.0V, V_ADIM=3.0V,

V_FB=1.0V

FB Source Current

FB Sink Current

I_FBSO

I_FBSI

-115

85

-100

100

-85

μA

115

【DC/DC Protection Block】

OCP Detect Voltage1

OCP Detect Voltage2

OVP Detect Voltage

V_CS1

V_CS2

360

0.85

2.88

150

-2

400

1.00

3.00

200

0

440

1.15

3.12

250

2

mV

V

CS=SWEEP UP, Pulse by pulse

CS=SWEEP UP

V_OVP

V

V_OVPSWEEP UP

OVP Detect Hysteresis

OVP Pin Leak Current

V_{OVP_HYS}

I_{OVP_LK}

mV

μA

V_OVPSWEEP DOWN

V_OVP=4.0V, V_STB=3.0V

【LED Protection Block】

LED OCP Detect Voltage

Over Boost Detection Voltage

【Dimming Block】

V_LEDOCP

V_FBH

2.88

3.84

3.00

4.00

3.12

4.16

V

V_ISENSE=SWEEP UP

V_FB=SWEEP UP

ADIM Pin Leak Current

ISENSE Pin Leak Current

I_LADIM

-2

0

2

μA

V_ADIM=2.0V

I_{L_ISENSE}

V_ISENSE=4.0V

DIMOUT Source ON

Resistance

DIMOUT Sink ON Resistance

【REG90 Block】

R_{ON_DIMSO}

R_{ON_DIMSI}

5.0

4.0

10.0

8.0

20.0

16.0

Ω

REG90 Output Voltage 1

REG90 Output Voltage 2

REG90 Available Current

V_{REG90_1}

V_{REG90_2}

| I_REG90

V_{REG90_TH}

8.91

8.865

15

9.00

-

9.09

9.135

-

V

I_O=0mA

I_O=-15mA

|

mA

V_REG90=SWEEP DOWN,

V_STB=0V

STB=ON->OFF, V_REG90=8.0V,

PWM=L

REG90_UVLO Detect Voltage

REG90 Discharge Resistance

5.22

13.2

6.00

22.0

6.78

30.8

V

V_{REG90_DIS}

kΩ

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Electrical Characteristics (Unless otherwise specified V_CC=24V Tj=25°C)

Parameter

【STB Block】

Symbol

Min

Typ

Max

Unit

Conditions

STB Pin HIGH Voltage

STB Pin LOW Voltage

STB Pull Down Resistance

【PWM Block】

V_STBH

V_STBL

R_STB

2.0

-0.3

600

-

18

0.8

V

1000

1400

kΩ

V_STB=3.0V

V_PWM=3.0V

PWM Pin HIGH Voltage

PWM Pin LOW Voltage

PWM Pin Pull Down Resistance

【DUTYON Block】

V_{PWM_H}

V_{PWM_L}

R_PWM

1.5

-0.3

600

-

18

0.8

V

1000

1400

kΩ

DUTYON Pin HIGH Voltage

DUTYON Pin LOW Voltage

DUTYON Pin Pull Down

Resistance

V_{DTYON_H}

V_{DTYON_L}

R_DTYON

1.5

-

18

V

-0.3

0.8

600

1000

1400

kΩ

V_DUTYON=3.0V

【Over Duty Protection Block】

PWM ODP Protection Detect

Duty

D_ODP

-

35

-

%

F_PWM=120Hz, DUTYP=341kΩ

V_DUTYP

×90%

DUTYP Short Protection Range

V_{DTYP_DET}

V_DTYP

-0.3

1.6

-

V

DUTYP=SWEEP DOWN

DUTYP Terminal Voltage

【Filter Block】

2.0

2.4

DUTYP=100kΩ

Abnormal Detection Timer

AUTO Timer

t_CP

-

20

-

ms

F_CT=800kHz

t_AUTO

163

【FAIL Block 】

FAIL Pin LOW Voltage

V_FAILL

0.25

0.5

1.0

V

I_FAIL=1mA

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BD9411F

Typical Performance Curves (Reference data)

80

70

60

50

40

30

20

10

0

4.0

3.5

3.0

2.5

2.0

1.5

STB=0V

PWM=0V

Ta=25°C

STB=3.0V

PWM=3.0V

Ta=25°C

1.0

STB=3.0V

PWM=3.0V

Ta=25°C

0.5

0.0

10

15

20

25

V_CC[V]

30

35

10

15

20

25

V_CC[V]

30

35

Figure 5. Operating circuit current

Figure 6. Standby circuit current

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

100

80

60

40

20

0

VCC=24V

Ta=25°C

V_CC=24V

Ta=25°C

0

1

2

3

4

0

1

2

3

4

V_ADIM[V]

V_FB[V]

Figure 7. Duty cycle vs FB character

Figure 8. ISENSE feedback voltage vs ADIM character

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Pin Descriptions

○Pin 1: VCC

This is the power supply pin of the IC. Input range is from 9V to 35V.

The operation starts at more than 7.5V(Typ) and shuts down at less than 7.2V(Typ).

○Pin 2: STB

This is the ON/OFF setting terminal of the IC.

At startup, internal bias starts at high level, and then PWM DCDC boost starts after PWM rise edge inputs.

Note: IC status (IC ON/OFF) transits depending on the voltage inputted to STB terminal. Avoid the use of intermediate

level (from 0.8V to 2.0V).

○Pin 3: OVP

The OVP terminal is the input for over-voltage protection. If OVP is more than 3.0V(Typ), the over-voltage protection

(OVP) will work. At the moment of these detections, it sets GATE=L, DIMOUT=L and starts to count up the abnormal

interval. If OVP detection continued to count four GATE clocks, IC's operation will be stop. (Please refer to "OVP

Detection" Timing Chart on Page26)

The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.

Even if OVP function is not used, pin bias is still required because the open connection of this pin is not a fixed potential.

The setting example is separately described in the ”OVP Setting" section on Page16.

○Pin 4: UVLO

Under Voltage Lock Out pin is the input voltage of the power stage. , IC starts the boost operation if UVLO is more than

3.0V(Typ) and stops if lower than 2.7V(Typ).

The UVLO pin is high impedance, because the internal resistance is not connected to a certain bias.

Even if UVLO function is not used, pin bias is still required because the open connection of this pin is not a fixed

potential.

The setting example is separately described in the ”UVLO Setting" section on Page15

○Pin 5: SS

This is the pin which sets the soft start interval of DC/DC converter. It performs the constant current charge of 3.0 μA(Typ)

to external capacitance Css. The switching duty of GATE output will be limited during 0V to 3.7V(Typ) of the SS voltage.

So the soft start interval Tss can be expressed as follows

T_SS1.2310⁶C_SS[sec]ꢀ C_SS: the external capacitance of the SS pin.

The logic of SS pin asserts low is defined as the DC/DC operation stop state after protection function or PWM is not input

high level after STB reset release. When SS capacitance is under 1nF, take note if the in-rush current during startup is

too large, or if over boost detection (FBMAX) mask timing is too short.

Please refer to soft start behavior in the “Timing Chart" section on Page13.

○Pin 6: DUTYON

This is the ON/OFF setting terminal of the LED PWM Over Duty Protection (ODP). By adjusting DUTYON input voltage, it

is ON/OFF of the ODP adjusted.

State

DUTYON input voltage

DUTYON= -0.3V to +0.8V

ODP=ON

ODP=OFF

DUTYON= 1.5V to 18.0V

○Pin 7: PWM

This is the PWM dimming signal input terminal. The high / low level of PWM pins are the following.

State

PWM input voltage

PWM= 1.5V to 18.0V

PWM= ‐0.3V to +0.8V

PWM=H

PWM=L

○Pin 8: FAIL

This is FAIL signal output (OPEN DRAIN) pin. At normal operation, NMOS will be in ON (500 ohm Typ) state, during

abnormality detection NMOS will be in OPEN state (OFF).

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○Pin 9: ADIM

This is the input pin for analog dimming signal. The ISENSE feedback point is set as 1/3 of this pin bias. If more than

3.0V(Typ) is input, ISENSE feedback voltage is clamped to limit to flow LED large current. In this condition, the input

current is caused. Please refer to <ISENSE> terminal explanation.

○Pin 10: RT

This is the DC/DC switching frequency setting pin. DCDC frequency is decided by connected resistor.

○The relationship between the frequency and RT resistance value (ideal)

15000

R_RT



[k]ꢀ

f_SW[kHz]

The oscillation setting ranges from 50kHz to 1000kHz.

The setting example is separately described in the ”DCDC Oscillation Frequency Setting” section on Page15

○Pin 11: DUTYP

This is the ODP setting pin. The ODP (Over Duty Protection) is the function to limit DUTY of LED PWM frequency f_PWMby

ODP detection Duty (ODP_duty) set by resistance (R_DUTY) connected to DUTYP pin.

○Relationship between LED PWM frequency f_PWM, ODP Detection Duty and DUTYP resistance (ideal)

1172ODP [%]

duty

R_DUTYP



[k]ꢀ

f_PWM[Hz]

The R_DUTYPsetting ranges from 15kΩ to 1MΩ.

The setting example is separately described in the ”ODP Setting” section on Page16.

○Pin 12: FB

This is the output terminal of error amplifier.

FB pin rises with the same slope as the SS pin during the soft-start period.

After soft -start completion (SS>3.7V(Typ)), it operates as follows.

When PWM=H, it detects ISENSE terminal voltage and outputs error signal compared to analog dimming signal (ADIM).

When PWM=L, IC holds the OVP voltage at the edge of PWM=H to L, and operates to hold the adjacent voltage. Please

refer to “Timing Chart” section

It detects over boost (FBMAX) over FB=4.0V(Typ). After the SS completion, if FB>4.0V and PWM=H continues 4clk GATE,

the CP counter starts. After that, only the FB>4.0V is monitored, When CP counter reaches 16384clk (2¹⁴clk), IC's

operation will be stop. (Please refer to “Timing Chart” section on Page27.)

The loop compensation setting is described in section "Loop Compensation" on Page21.

○Pin 13: ISENSE

V_OUT

This is the input terminal for the current detection. Error amplifier compares

ISENSE voltage and the lower voltage between 1/3 of the ADIM (analog

dimming terminal) voltage and 1.015V(Typ) for FB voltage control.

And this terminal detects abnormal LED's over-current when ISENSE voltage

continues over 3.0V(Typ) during 4CLKs (equivalent to 40us at f_osc= 100kHz),

DC/DC operation becomes stop. (Please refer to “Timing Chart” section on Page

BD9411

DIMOUT

28.)

Error AMP

ISENSE

ADIM

-

+

1.015V

1/3

Rs

1.015V

1.0V

Gain=1/3

67mV

FB

3.0

0

0.2

ADIM[V]

Figure 9. Relationship of the feedback voltage and ADIM

Figure 10. ISENSE terminal circuit example

○Pin 14: GND

This is the GND pin of the IC.

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V_OUT

○Pin 15: DIMOUT

This is the output pin for external dimming NMOS. The table below shows the rough output

logic of each operation state, and the output H level is REG90. Please refer to “Timing

Chart” section for detailed explanations, because DIMOUT logic has an exceptional

behavior. Please insert the resistor R_DIMbetween the dimming MOS gate to improve the

over shoot of LED current, as PWM turns from low to high.

REG90

DIM

R

DIMOUT

Status

Normal

DIMOUT output

Same logic to PWM

GND Level

ISENSE

Abnormal

BD9411

Figure 11. DIMOUT terminal circuit

example

○Pin 16: GATE

This is the output terminal for driving the gate of the boost MOSFET. The high level is REG90. Frequency can be set by

the resistor connected to RT. Refer to <RT> pin description for the frequency setting.

○Pin 17: CS

The CS pin has two functions.

V_IN

1. DC / DC current mode Feedback terminal

The inductor current is converted to the CS pin voltage by the sense resistor R_CS.

This voltage compared to the voltage set by error amplifier controls the output

pulse.

BD9411

2. Inductor current limit (OCP) terminal

Id

GATE

CS

The CS terminal also has an over current protection (OCP). If the voltage is more

than 0.4V(Typ), the switching operation will be stopped compulsorily. And the

next boost pulse will be restarted to normal frequency.

In addition, the CS voltage is more than 1.0V(Typ) during 4CLKs GATE operation,

IC operation will be stop. As above OCP operation, if the current continues to flow

nevertheless GATE=L because of the destruction of the boost MOS, IC will stops

the operation completely.

C_CS

R_CS

GND

Figure 12. CS terminal circuit example

Both of the above functions are enabled after 300ns (Typ) when GATE pin

asserts high, because the Leading Edge Blanking function (LEB) is included into this IC to prevent the effect of noise.

Please refer to “OCP Setting / Calculation Method for the Current Rating of DCDC Parts” section on Page18, for detailed

explanation.

If the capacitance C_CSin the right figure is increased to a micro order, please be careful that the limited value of NMOS

drain current Id is more than the simple calculation. Because the current Id flows not only through R_CSbut also through

C_CS, as the CS pin voltage moves according to Id.

○Pin 18: REG90

10

This is the 9.0V(Typ) output pin. Available current is 15mA

(min).

The characteristic of V_CCline regulation at REG90 is shown as

figure. V_CCmust be used in more than 10.5V for stable 9V

output.

8

Please place the ceramic capacitor connected to REG90 pin

(1.0μF to 10μF) closest to REG90-GND pin.

6

4

2

0

5

10

15

20

25

30

35

V_CC[V]

Figure 13. REG90 line regulation

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BD9411F

List of The Protection Function Detection Condition (Typ Condition)

Detect condition

Detection condition

Protect

function

Detection

Release

condition

Timer

operation

Protection Type

PWM

SS

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

Immediately auto-restart

after detection

FBMAX

FB

FB > 4.0V

H(4clk) SS>3.7V

FB < 4.0V

2¹⁴clk

4clk

LED OCP

ISENSE

ISENSE > 3.0V

-

ISENSE < 3.0V

(Judge periodically

whether normal or not)

RT GND

SHORT

Release

RT=GND

RT

RT<VRT×90%

RT>5V

-

NO

Restart by release

RT HIGH

SHORT

Release

RT=HIGH

UVLO

REG90

VCC

UVLO<2.7V

REG90<6.0V

VCC<7.2V

-

UVLO>3.0V

REG90>6.5V

VCC>7.5V

NO

Restart by release

REG90UVLO

VCCUVLO

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

OVP

OCP

OVP

CS

OVP>3.0V

CS>0.4V

CS>1.0V

-

OVP<2.8V

-

4clk

NO

Pulse by pulse

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

OCP

detection2

CS

CS<1.0V

4clk

DUTYP GND

SHORT

DUTYP HIGH

SHORT

Release

DUTYP=GND

Release

DUTYP

DUTYP <VDUTYP×90%

DUTYP >5V

-

NO

Restart by release

DUTYP=HIGH

DUTYON=H

and

PWM on duty > setting

duty by DUTYP resistor

ODP(*1)

PWM

H

-

NO

Cycle by cycle

To reset the FBMAX, LED OCP, OVP and OCP detection2 protection, please set STB logic to ‘L’ once. Otherwise the detection of

VCCUVLO, REG90UVLO is required.

The clock number of timer operation corresponds to the boost pulse clock.

(*1) When PWM Duty count start, PWM=H → L is input, when PWM=L → H is input, the ODP is reset.

The GATE output, the DIMOUT output maintain L until PWM=H → L is input in PWM = 100% again when ODP works once.

List of The Protection Function Operation

Operation of the protect function

Protect function

DC/DC gate

output

Dimming transistor

(DIMOUT) logic

SS pin

FAIL pin

Stop after timer

operation

Discharge after timer

operation

High after timer

operation

FBMAX

Low after timer operation

Immediately high,

Low after timer operation

Discharge after timer

operation

High after timer

operation

LED OCP

Stop immediately

RT GND SHORT

RT HIGH SHORT

Stop immediately

Immediately low

Not discharge

Low

Low after REG90UVLO

detects

STB

Stop immediately

Discharge immediately

Low

UVLO

Stop immediately

Immediately low

Discharge immediately

Low

REG90UVLO

VCC UVLO

Discharge after timer

operation

OVP

OCP

Stop immediately

Immediately low

Normal operation

Low

Stop immediately

Not discharge

Low

Stop after timer

operation

Discharge after timer

operation

High after timer

operation

OCP detection2

Low after timer operation

DUTYP GND SHORT

DUTYP HIGH SHORT

ODP

Stop immediately

Immediately low

Not discharge

Low

Please refer to “Timing Chart” section for details.

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Application Circuit Example

Introduce an example application using the BD9411F.



Basic Application Example

V_OUT

V_CC

V_IN

VCC

UVLO

OVP

REG90

STB

RT

GATE

CS

SS

FAIL

PWM

ADIM

DIMOUT

ISENSE

FB

DUTYP

Rs

DUTYON

GND

Figure 14. Basic application example



Analog Dimming or PWM Dimming Examples

V_OUT

V_CC

V_IN

V_CC

V_IN

VCC

UVLO

VCC

UVLO

OVP

REG90

STB

RT

REG90

STB

RT

GATE

CS

GATE

CS

SS

FAIL

PWM

ADIM

FAIL

REG90

OPEN

DIMOUT

PWM

ADIM

ISENSE

FB

ISENSE

FB

DUTYP

Rs

DUTYON

GND

Figure 15. Example circuit for analog dimming

Figure 16. Example circuit for PWM dimming

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BD9411F

External Components Selection

1. Start Up Operation and Soft Start External Capacitance Setting

The below explanation is the start up sequence of this IC

1

SS

SLOPE

5V

VOUT

STB

FB

COMP

OSC

SS

GATE

CS

Css

DRIVER

OSC

SS=FB

Circuit

PWM

LED_OK

GATE

VOUT

2

DIMOUT

ISENSE

FB

3

ILED

PWM

4

LED_OK

6

5

Figure 17. Startup waveform

Figure 18. Circuit behavior at startup

○Explanation of start up sequence

1. Reference voltage REG90 starts by STB=H.

2. SS starts to charge at the time of first PWM=H. At this moment, the SS voltage of slow-start starts to equal FB

voltage,and the circuit becomes FB=SS regardless of PWM logic.

3. When FB=SS reaches the lower point of internal sawtooth waveform, GATE terminal outputs pulse and starts to boost

VOUT.

4. It boosts VOUT and VOUT reaches the voltage to be able to flow LED current.

5. If LED current flows over decided level, FB=SS circuit disconnects and startup behavior completes.

6. Then it works normal operation by feedback of ISENSE terminal. If LED current doesn't flow when SS becomes over

3.7V(Typ), SS=FF circuit completes forcibly and FBMAX protection starts.

○Method of setting SS external capacitance

According to the sequence described above, start time Tss that startup completes with FB=SS condition is the time that

FB voltage reaches the feedback point.

The capacitance of SS terminal is defined as Css and the feedback voltage of FB terminal is defined as VFB. The

equality on T_FBis as follows.

C [μF] VFBꢀ[V]

ss

T



[sec]

ss

3ꢀ[μA]

If Css is set to a very small value, rush current flows into the inductor at startup.

On the contrary, if Css is enlarged too much, LED will light up gradually.

Since Css differs in the constant set up with the characteristic searched for and differs also by factors, such as a voltage

rise ratio, an output capacitance, DCDC frequency, and LED current, please confirm with the system.

【Setting example】

When Css=0.1uF,Iss=3μA,and startup completes at VFB=3.7V, SS setting time is as follows.

6

0.1ꢀ10 [F] 3.7[V]

T



ꢀ ꢀ0.123 [sec]

ss

6

3 1ꢀ0 [A]

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2. VCC Series Resistance Setting

VIN

Here are the following effects of inserting series resistor Rvcc into V_CCline.

(i) In order to drop the voltage V_CC, it is possible to suppress the heat

generation of the IC.

RVCC

Δ V

(ii) It can limit the inflow current to V_CCline.

VCC

However, if resistance R_VCCis set bigger, V_CCvoltage becomes under minimum

operation voltage (V_CC<9V). RVCC must be set to an appropriate series

resistance.

I_IN

ICC

IC’s inflow current line I_IN has the following inflow lines.

・IC’s circuit current…I_CC

・Current of R_REGconnected to REG90…I_REG

・Current to drive FET’s Gate…I_{_GATE}

+

-

REG90

IREG

Internal

BLOCK

RREG

IDCDC

These decide the voltage ΔV at R_VCC

.

VCC terminal voltage at that time can be expressed as follows.

V_CC[V]VIN[V]



I_CC[A] I_DCDC[A] I_REG[A]



 R_VCC 9[V]

I_GATE

GATE

DCDC

DRIVER

Here, judgement is the 9V minimum operation voltage.

Please consider a sufficient margin when setting the series resistor of V_CC

.

Figure 19. VCC series resistance

circuit example

【setting example】

Above equation is translated as follows.

VIN[V]9[V]

R_VCC[]

I_CC[A] I_DCDC[A] I_REG[A]

When V_IN=24V, I_CC=2.0mA, R_REG=10kΩ and I_DCDC=2mA, R_VCC’s value is calculated as follows.

24[V]9[V]

0.002[A] 0.002[A]5.8[V]/10000[]

R_VCC[] 

 3.26[k]

(I_CCis 3.3mA(Typ)) . Please set each values with tolerance and margin.

3. LED current setting

LED current can be adjusted by setting the resistance R_S[Ω] which connects

V_OUT

to ISENSE pin and ADIM[V].

Relationship between R_Sand I_LEDcurrent

With DC dimming (ADIM<3.0V)

BD9411

1 ADIM[V]

I_LED[A]

DIMOUT

R_S 

[]

3

Error AMP

ISENSE

ADIM

Without DC dimming (ADIM>3.0V)

-

+

1.015V

1.015[V]

I_LED[A]

R_S

[]

1/3

Rs

【setting example】

FB

If I_LEDcurrent is 200mA and ADIM is 2.0V, we can calculate R_Sas below.

1 ADIM[V] 1 2.0[V]

3 0.2[A]

R_S 

 

 3.33[]

3 I_LED[A]

Figure 20. LED current setting example

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4. DCDC Oscillation Frequency Setting

R_RTwhich connects to RT pin sets the oscillation frequency f_SWof DCDC.

○Relationship between frequency f_SWand RT resistance (ideal)

15000

f_SW[kHz]

R_RT

[k]ꢀ

Frequency(fsw)

【setting example】

When DCDC frequency fsw is set to 200kHz, R_RTis as follows.

GATE

CS

15000

R_RT



 75 [k]ꢀꢀ

f_sw[kHz] 200[kHz]

RT

Rcs

R_RT

GND

Figure 21. RT terminal setting example

5. UVLO Setting

Under Voltage Lock Out pin is the input voltage of the power stage. IC starts boost operation if UVLO is more than

3.0V(Typ) and stops if lower than 2.7V(Typ).

The UVLO pin is high impedance, because the internal resistance is not connected to a certain bias.

So, the bias by the external components is required, because the open connection of this pin is not a fixed potential.

Detection voltage is set by dividing resistors R1 and R2. The resistor values can be calculated by the formula below.

○UVLO detection equation

As V_INdecreases, R1 and R2 values are set in the following formula by the VIN_DETthat UVLO detects.

(VIN

[V]  2.7[V])

2.7[V]

DET

VIN

R1 R2[kΩ]

[kΩ]ꢀ

○UVLO release equation

R1 and R2 setting is decided by the equation above. The equation of UVLO

release voltage is as follows.

R1

UVLO

(R1[kΩ]  R2[kΩ])

+

-

ON OFF

/

VIN

 3.0V 

[V]ꢀ

CAN

2.7V/3.0V

R2

R2[kΩ]

CUVLO

【setting example】

If the normal input voltage, V_INis 24V, the detect voltage of UVLO is 18V, R2 is

30kΩ, R1 is calculated as follows.

Figure 22. UVLO setting example

(VIN_DET[V] 2.7[V])

2.7[V]

(18[V] 2.7[V])

2.7[V]

R1 R2[k]

 30[k]

170.0 [k]

By using these R1 and R2, the release voltage of UVLO, VIN_CAN, can be calculated too as follows.

(R1[k] R2[k])

R2[k]

170[k]30[k]

30[k]

VIN_CAN 3.0[V]

 3.0[V]

[V]ꢀ 20.0 [V]

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6. ODP Setting

R_DUTYPwhich connects to ODP pin sets the ODP detection duty.

○Relationship between LED PWM frequency f_PWM, ODP Detection Duty and DUTYP resistance (ideal)

1172ODP [%]

duty

R_DUTYP



[k]ꢀ

f_PWM[Hz]

GATE

CS

【setting example】

DUTYP

When LED PWM frequency f_PWM, is set to 120Hz and ODP Detection Duty

(ODP_duty) is set to 35%, R_DUTYPis as follows.

R_CS

R_DUTYP

DIMOUT

ISENSE

117235[%]

R_DUTYP



 341.8[k]ꢀ

R_S

PWM

120[Hz]

GND

fPWM

Figure 23. ODP setting example

PWM

GATE

DIMOUT

ODPduty

Figure 24. The GATE and the DIMOUT waveform as PWM dimming (ODP)

7. OVP Setting

The OVP terminal is the input for over-voltage protection of output voltage.

The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.

Detection voltage of V_OUTis set by dividing resistors R1 and R2. The resistor values can be calculated by the formula

below.

○OVP detection equation

If V_OUTis boosted abnormally, VOVPDET, the detect

V_OUT

voltage of OVP, R1, R2 can be expressed by the following formula.

(VOVP_DET[V]3.0[V])

R1

OVP

R1 R2[k]

[k]ꢀ

OVP

+

-

3.0[V]

2.8V/3.0V

R2

○OVP release equation

COVP

By using R1 and R2 in the above equation, the release voltage of

OVP, VOVPCAN can be expressed as follows.

(R1[k] R2[k])

VOVP  2.8V 

[V]ꢀ

CAN

R2[k]

Figure 25. OVP setting example

【setting example】

If the normal output voltage, V_OUTis 40V, the detect voltage of OVP is 48V, R2 is 10kΩ, R1 is calculated as follows.

(VOVP_DET[V]3.0[V])

3.0[V]

(48[V]3[V])

3[V]

R1 R2[k]

10[k]

150ꢀ[k]

By using these R1 and R2, the release voltage of OVP, VOVPCAN can be calculated as follows.

(R1[k]  R2[k])

R2[k]

10[k] 150[k]

10[k]

VOVP  2.8[V]

 2.8[V]

[V]ꢀ 44.8ꢀ[V]

CAN

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8. Protection Timer (CP Counter) Setting, Auto-Restart Timer Setting

About over boost protection (FBMAX), protection timer (CP Counter) is set by counting the clock frequency which is set

at the RT pin. About the behavior from abnormal detection for use timer, please refer to the “Timing Chart” section.

The condition FB>4.0V(Typ) and PWM=H continues more than four GATE clocks, counting starts from the timing. After

that, FBMAX protection monitor only the FB voltage and DCDC operation will be stop after below time has passed.

R_RT

R_RT[k]

TIMER_TIME 2¹⁴

AUTO_TIME 2¹⁷

16384 

131072 

[s]ꢀ

1.510¹⁰

1.510⁷

R_RT[k]

R_RT

1.510¹⁰

1.510⁷

Here, TIMER_TIME= time until IC's operation stop, AUTO_TIME= auto restart timer’s time

R_RT= Resistor value connected to RT pin

【setting example】

Protection Timer time when RT=100kohm

R_RT[k]

1.510⁷

100[k]

1.510⁷

TIMER_TIME16384

16384

109.2[ms]ꢀ

R_RT[k]

1.510⁷

100[k]

1.510⁷

AUTO_TIME131072

131072

 873.8[ms]ꢀ

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BD9411F

DCDC Parts Selection

1. OCP Setting / Calculation Method for the Current Rating of DCDC Parts

OCP detection stops the switching when the CS pin voltage is more than 0.4V(Typ). The resistor value of CS pin, R_CS

needs to be considered by the coil L current. And the current rating of DCDC external parts is required more than the

peak current of the coil.

Shown below are the calculation method of the coil peak current, the selection method of R_CS(the resistor value of CS

pin) and the current rating of the external DCDC parts at Continuous Current Mode.

（the calculation method of the coil peak current, I_peakat Continuous Current Mode）

At first, since the ripple voltage at CS pin depends on the application

condition of DCDC, the following variables are used.

Vout voltage=V_OUT[V]

V_OUT

L

V_IN

LED total current=I_OUT[A]

DCDC input voltage of the power stage =V_IN[V]

Efficiency of DCDC =η[%]

IL

And then, the average input current IIN is calculated by the following

equation.

fsw

V_OUT[V] I_OUT[A]

V_IN[V][%]

I_IN



[A]ꢀ

GATE

CS

And the ripple current of the inductor L (ΔI_L[A]) can be calculated by using

R_CS

DCDC the switching frequency, f_SW, as follows.

GND

(V_OUT[V]V_IN[V])V_IN[V]

L[H]V_OUT[V] f_SW[Hz]

ΔI_L

[A]

(V)

On the other hand, the peak current of the inductor I_peakcan be expressed

as follows.

I_L[A]

… (1)

I _peak I_IN[A]

[A]

2

Therefore, the bottom of the ripple current I_minis

（A)

(t)

I_L[A]

Ipeak

or 0

ꢀ

I_min I_IN[A]

2

ΔIL

IIN

Imin

If Imin>0, the operation mode is CCM (Continuous Current Mode),

otherwise the mode is DCM (Discontinuous Current Mode).

(t)

(the selection method of Rcs at Continuous Current Mode)

Ipeak flows into R_CSand that causes the voltage signal to CS pin. (Please

refer to the timing chart at the right)

（V)

0.4V

Peak voltage VCS_peakis as follows.

VCS _peak R_CS I _peak[V]

VCSpeak

As this VCSpeak reaches 0.4V(Typ), the DCDC output stops the switching.

Therefore, R_CSvalue is necessary to meet the condition below.

(t)

R_CS I_peak[V]  0.4[V]

Figure 26. Coil current waveform

(the current rating of the external DCDC parts)

The peak current as the CS voltage reaches OCP level (0.4V (Typ)) is defined as I_{peak_det}

.

0.4[V]

I _{peak_ det}



[A]

… (2)

R_CS[]

The relationship among I_peak(equation (1)), I_{peak_det}(equation (2)) and the current rating of parts is required to meet the

following

I_peak I_{peak_det}_{The current rating of parts}

Please make the selection of the external parts such as FET, Inductor, diode meet the above condition.

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[setting example]

Output voltage = V_OUT[V] = 40V

LED total current = I_OUT[A] = 0.48V

DCDC input voltage of the power stage = V_IN[V] = 24V

Efficiency of DCDC =η[%] = 90%

Averaged input current IIN is calculated as follows.

V_OUT[V] I_OUT[A]

V_IN[V][%]

40[V]0.48[A]

24[V]90[%]

I_IN[A] 

ꢀ

 0.89 [A]

If the switching frequency, f_SW= 200kHz, and the inductor, L=100μH, the ripple current of the inductor L (ΔIL[A]) can be

calculated as follows.

(V_OUT[V]V_IN[V])V_IN[V]

(40[V] 24[V])24[V]

ΔI_L

ꢀ

 0.48[A]

L[H]V_OUT[V] f_SW[Hz] 10010^6[H]40[V]20010³[Hz]

Therefore the inductor peak current, I_peakis

IL[A]

0.48[A]

I_peak I_IN[A]

ꢀ[A]  0.89[A]

1.13[A]

…calculation result of the peak current

2

If Rcs is assumed to be 0.3Ω

VCS_peak Rcs  Ipeak  0.3[]1.13[A]  0.339 [V]0.4V

…R_CSvalue confirmation

The above condition is met.

And I_{peak_det}, the current OCP works, is

0.4[V]

I _{peak_ det}



1.33[A]

0.3[]

If the current rating of the used parts is 2A,

…current rating confirmation

I_peak I_{peak_det} _{The current rating}

1.13[A]1.33[A] 2.0[A]

of DCDC parts

This inequality meets the above relationship. The parts selection is proper.

And I_MIN, the bottom of the IL ripple current, can be calculated as follows.

I_L[A]

I_MIN I_IN[A]

[A] 1.13[A]0.48[A]  0.65[A]  0ꢀ

2

This inequality implies that the operation is continuous current mode.

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2. Inductor Selection

The inductor value affects the input ripple current, as shown the "OCP setting" on Page18.

(V_OUT[V]V_IN[V])V_IN[V]

ΔI_L

[A]

L[H]V_OUT[V] f_SW[Hz]

Δ IL

V_OUT[V] I_OUT[A]

V_IN[V][%]

I_IN



[A]ꢀ

V_IN

I_L[A]

Ipeak  I_IN[A]

[A]

I_L

2

L

Where

V_OUT

L: coil inductance [H]

V_IN: input voltage [V]

V_OUT: DCDC output voltage [V]

I_OUT: output load current (the summation of LED current) [A]

I_IN: input current [A] f_SW: oscillation frequency [Hz]

R_CS

C_OUT

Figure 27. Inductor current waveform and diagram

In continuous current mode, ⊿I_Lis set to 30% to 50% of the output load current in many cases.

In using smaller inductor, the boost is operated by the discontinuous current mode in which the coil current returns to

zero at every period.

*The current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, results in

decreasing in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not

exceed the rated current value of the inductor.

*To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be

selected

3. Output Capacitance Cout Selection

Output capacitor needs to be selected in consideration of equivalent series resistance

required to even the stable area of output voltage or ripple voltage. Be aware that set

LED current may not be flown due to decrease in LED terminal voltage if output ripple

V_IN

I_L

L

component is high.

V_OUT

Output ripple voltage ⊿V_OUTis determined by Equation (4):

R_ESR

C_OUT

ΔV_OUTΔI_L R_ESR[ꢀV]ꢀ・・・・・ꢀꢀ(4)

R_CS

When the coil current is charged to the output capacitor as MOS turns off, much output

ripple is caused. Much ripple voltage of the output capacitor may cause the LED current

ripple.

Figure 28. Output capacitor diagram

* Rating of capacitor needs to be selected to have adequate margin against output voltage.

*To use an electrolytic capacitor, adequate margin against allowable current is also necessary. Be aware that the LED

current is larger than the set value transitionally in case that LED is provided with PWM dimming especially.

4. MOSFET Selection

There is no problem if the absolute maximum rating is larger than the rated current of the inductor L, or is larger than

the sum of the tolerance voltage of C_OUTand the rectifying diode V_F. The product with small gate capacitance (injected

charge) needs to be selected to achieve high-speed switching.

* One with over current protection setting or higher is recommended.

* The selection of one with small on resistance results in high efficiency.

5. Rectifying Diode Selection

A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than the

tolerance voltage of C_OUT, and low forward voltage VF especially needs to be selected.

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Loop Compensation

A current mode DCDC converter has each one pole (phase lag) f_pdue to CR filter composed of the output capacitor and

the output resistance (= LED current) and zero (phase lead) f_Zby the output capacitor and the ESR of the capacitor.

Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) f_ZRHPwhich is unique with the boost

converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the

cross-over frequency f_c,set as follows, is suggested.

fc = f_ZRHP/5 (f_ZRHP: RHP zero frequency)

Considering the response speed, the calculated constant below is not always optimized completely. It needs to be

adequately verified with an actual device.

V_OUT

VIN

I_LED

L

VOUT

-

+

FB

gm

R_FB1

C_FB1

RESR

COUT

C_FB2

RCS

Figure 29. Output stage and error amplifier diagram

i.

Calculate the pole frequency fp and the RHP zero frequency f_ZRHPof DC/DC converter

V_OUT(1 D)²

2  L I_LED

I_LED

f_p

[ꢀHz]ꢀꢀ

f_ZRHP



[ꢀHz]ꢀꢀ

2 V_OUTC_OUT

V_OUTV_IN

Where I_LED= the summation of LED current,

(Continuous Current Mode)

ꢀꢀ

D 

V_OUT

ii.

Calculate the phase compensation of the error amp output (f_c= f_ZRHP/5)

f_ZRHP R_CS I_LED

5 f _p gmV_OUT(1 D)

R_FB1

C_FB1



[ꢀ]ꢀꢀ

1

5



[F]

2  R_FB1 f_C2  R_FB1 f_ZRHP

gm  4.010^4[S]ꢀ

Above equation is described for lighting LED without the oscillation. The value may cause much error if the quick

response for the abrupt change of dimming signal is required.

To improve the transient response, R_FB1needs to be increased, and C_FB1needs to be decreased. It needs to be

adequately verified with an actual device in consideration of variation from parts to parts since phase margin is

decreased.

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Timing Chart

1. PWM Start up 1 (Input PWM Signal After Input STB Signal)

7.5V

VCC

STB

PWM

6.5V

REG90

3.7V

SS

0.4V

GATE

FAIL ^(Note1)

(At pull-up external voltage)

OFF

STANDBY

(*6)

SS

Normal

SS

STANDBY

STATE

(*1) (*2)

(*3)

(*4)

(*5)

Figure 30. PWM Start up 1 (Input PWM Signal After Input STB Signal)

(*1)…REG90 starts up when STB is changed from Low to High. In the state where the PWM signal is not inputted, SS terminal

is not charged and DCDC doesn’t start to boost, either.

(*2)…When REG90 is more than 6.5V(Typ), the reset signal is released.

(*3)…The charge of the pin SS starts at the positive edge of PWM=L to H, and the soft start starts. And while the SS is less than

0.4V, the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level.

(*4)…The soft start interval will end if the voltage of the pin SS, V_SSreaches 3.7V(Typ). By this time, it boosts V_OUTto the voltage

where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.

(*5)…As STB=L, the boost operation is stopped instantaneously. (Discharge operation continues in the state of STB=L and

REGUVLO=L. Please refer to the "Turn Off" section on Page24)

(*6)…In this diagram, before the charge period is completed, STB is changed to High again. As STB=H again, the boost

operation restarts the next PWM=H. It is the same operation as the timing of (*2). (For capacitance setting of SS terminal,

please refer to the "Method of setting SS external capacitance" section on Page13.

(Note1) At FAIL terminal pull-up to external voltage, FAIL voltage is "H" until REG90 over 6.5V. (Initial FAIL's NMOS is "OFF"

before IC's circuit will operate).

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2. PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)

7.5V

VCC

STB

PWM

6.5V

REG90

3.7V

0.4V

SS

0.4V

GATE

FAIL ^(Note1)

(At pull-up external voltage)

STATE

OFF

SS

NORMAL

STANDBY

SS

(*3)

(*4)

(*5)

(*1) (*2)

Figure 31. PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)

(*1)…REG90 starts up when STB=H.

(*2)…When REG90UVLO releases or PWM is inputted to the edge of PWM=L→H, SS charge starts and soft start period is

started. And while the SS is less than 0.4V, the pulse does not output. The pin SS continues charging in spite of the

assertion of PWM or OVP level.

(*3)…The soft start interval will end if the voltage of the pin SS, V_SSreaches 3.7V(Typ). By this time, it boosts V_OUTto the point

where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.

(*4)…As STB=L, the boost operation is stopped instantaneously (GATE=L, SS=L). (Discharge operation works in the state of

STB=L and REG90UVLO=H. Please refer to the "Turn Off" section on Page24)

(*5)…In this diagram, before the discharge period is completed, STB is changed to High again. As STB=H again, operation will

be the same as the timing of (*1).

(Note1) At FAIL terminal pull-up to external voltage, FAIL voltage is "H" until STB change from "L" to "H". (Initial FAIL's NMOS is

"OFF" before IC's circuit will operate).

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3. Turn Off

STB

PWM

REG90

6.0V

REG90UVLO

DIMOUT

GATE

Vout

SS

FAIL ^(Note1)

(Pull-up to external voltage)

ON

STATE

Discharge

OFF

(*2)

(*1)

Figure 32. Turn Off

(*1)…As STB=H→L, boost operation stops and REG90 starts to discharge. The discharge curve is decided by REG90

discharge resistance and the capacitor of the REG90 terminal.

(*2)…While STB=L, REG90UVLO=H, DIMOUT becomes same as PWM. When REG90=9.0V is less than 6.0V(Typ), IC

becomes OFF state. V_OUTis discharged completely until this time. It should be set to avoid a sudden brightness.

(Note1) At FAIL terminal pull-up to external voltage, FAIL voltage is "H" until STB change from "L" to "H". (Initial FAIL's NMOS is

"OFF" before IC's circuit will operate).

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4. Soft Start Function

STB

PWM

UVLO

2.7V

3.0V

7.2V

VCCUVLO

7.5V

6.0V

6.5V

3.0V

REG90UVLO

OVP

2.8V

4clk

FAIL ^(Note1)

(At pull-up external voltage)

SS

(*1)

(*2)(*3)

(*4)

(*5)

(*6)

(*7)

Figure 33. Soft Start Function

(*1)…The SS pin charge does not start by just STB=H. PWM=H is required to start the soft start. In the low SS voltage, the

GATE pin duty depends on the SS voltage. And while the SS is less than 0.4V, the pulse does not output.

(*2)…By the time STB=L, the SS pin is discharged immediately.

(*3)…As the STB recovered to STB=H, The SS charge starts immediately by the logic PWM=H in this chart.

(*4)…The SS pin is discharged immediately by the UVLO=L.

(*5)…The SS pin is discharged immediately by the VCCUVLO=L.

(*6)…The SS pin is discharged immediately by the REG90UVLO=L.

(*7)…The SS pin is not discharged by the abnormal detection for use timer Type protection such as OVP until the timer finish.

(Note1) At FAIL terminal pull-up to external voltage, FAIL voltage is "H" until STB change from "L" to "H". (Initial FAIL's NMOS is

"OFF" before IC's circuit will operate).

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5. OVP Detection

STB

PWM

REG90

OVP

3.0V

2.8V

3.0V

2.8V

3.0V

Abnormal

COUNTER

Less than

Gate4count

Less than

Gate4count

AUTO COUNTER

131072count

SS

0.4V

GATE

DIMOUT

FAIL

IC's operation stop and

AUTO COUNTER

STATE NORMAL

OVP

NORMAL

OVP

NORMAL

OVP

abnormal

(*1)

(*3)

(*4) (*5)

(*6)

(*7)

(*2)

Figure 34. OVP Detection

(*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts.

(*2)…If OVP is released within 4 clocks of abnormal counter of the GATE pin frequency, the boost operation restarts.

(*3)…As the OVP is detected again, the boost operation is stopped.

(*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC's operation will be stop. After IC operation stop,

auto counter starts counting.

(*5)… Once IC operation stop, the boost operation doesn't restart even if OVP is released.

(*6)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. The auto restart interval can be calculated by the

external resistor of RT pin. (Please refer to the "Timer Latch Time setting, Auto-Restart Timer setting" section on Page17.)

(*7)…The operation of the OVP detection is not related to the logic of PWM.

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6. FBMAX Detection

STB

PWM

REG90

4.0V

FB

GATE

・・・・・

①

②

③

④

CP COUNTER

16384count

AUTO COUNTER

131072count

3.7V

SS

FAIL ^(Note1)

(At pull-up external voltage)

IC's operation stop and

AUTO COUNTER

SS

NORMAL

STANDBY

CP COUNTOR

SS

STATE

(*5)

(*6)

(*1)

(*3)

(*4)

(*2)

Figure 35. FBMAX Detection

(*2)…During the soft start, it is not judged to the abnormal state even if the FB=H(FB>4.0V(Typ)).

(*3)…When the PWM=H and FB=H, the abnormal counter doesn’t start immediately.

(*4)…The CP counter will start if the PWM=H and the FB=H detection continues up to 4 clocks of the GATE frequency. Once the

count starts, only FB level is monitored.

(*5)…When the FBMAX detection continues till the CP counter reaches 16384clk (2¹⁴clk), IC's operation will be stop. The

operation stop interval can be calculated by the external resistor of RT pin. (Please refer to the "Timer Latch Time setting,

Auto-Restart Timer setting" section on Page17.)

(*6)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. The auto restart interval can be calculated by the

external resistor of RT pin. (Please refer to the "Timer Latch Time setting, Auto-Restart Timer setting" section on Page17.)

(Note1) At FAIL terminal pull-up to external voltage, FAIL voltage is "H" until STB change from "L" to "H". (Initial FAIL's NMOS is

"OFF" before IC's circuit will operate).

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7. LED OCP Detection

STB

PWM

REG90

ISENSE

3.0V

Abnormal

COUNTER

4count

Less than

4count

Less than

4count

AUTO COUNTER

131072count

SS

0.4V

GATE

DIMOUT

FAIL

IC's operation stop and

AUTO COUNTER

STATE NORMAL

LEDOCP

abnormal

NORMAL

LEDOCP

abnormal

NORMAL

LEDOCP

abnormal

NORMAL

(*1)

(*3)

(*4) (*5)

(*6)

(*7)

(*2)

Figure 36. LED OCP Detection

(*1)…If ISENSE>3.0V(Typ), LEDOCP is detected, and GATE becomes L. To detect LEDOCP continuously, The DIMOUT is

compulsorily high, regardless of the PWM dimming signal.

(*2)…When the LEDOCP releases within 4 counts of the GATE frequency, the boost operation restarts.

(*3) …As the LEDOCP is detected again, the boost operation is stopped.

(*4)…If the LEDOCP detection continues up to 4 counts of GATE frequency. IC's operation will be stop. After IC operation stop,

auto counter starts counting.

(*5)…Once IC's operation stop, the boost operation doesn't restart even if the LEDOCP releases.

(*6)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. The auto restart interval can be calculated by the

external resistor of RT pin. (Please refer to the "Timer Latch Time setting, Auto-Restart Timer setting" section on Page17.)

(*7)…The operation of the LEDOCP detection is not related to the logic of the PWM.

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I/O Equivalent Circuits

OVP

UVLO

SS

UVLO

OVP

100k

5V

SS

50k

5V

3k

5V

RT

PWM

DUTYON

PWM

100k

RT

100k

5V

1M

ADIM

FB

DIMOUT / REG90

REG90

ADIM

20k

DIMOUT

GND

FB

5V

100k

VCC

GATE / REG90 / CS

STB

ISENSE

REG90

GATE

STB

ISENSE

100k

20k

5V

100k

1M

GND

CS

VCC

DUTYP

FAIL

DUTYP

FAIL

500

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

Thermal Consideration

Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may

result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the

board size and copper area to prevent exceeding the maximum junction temperature rating.

6.

7.

Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately

obtained. The electrical characteristics are guaranteed under the conditions of each parameter.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may

flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,

and routing of connections.

8.

9.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)

and unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

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Operational Notes – continued

12. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should

be avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 37. Example of monolithic IC structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all

within the Area of Safe Operation (ASO).

15. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls

below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

16. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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Ordering Information

B D 9 4 1 1 F

-

E 2

Part Number

Package

F:SOP18

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagrams

SOP18(TOP VIEW)

Part Number Marking

LOT Number

B D 9 4 1 1 F

1PIN MARK

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Physical Dimension, Tape and Reel Information

Package Name

SOP18

(Max 11.55 (include.BURR))

(UNIT : mm)

PKG : SOP18

Drawing No. : EX115-5001

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Revision History

Date

Revision

001

Changes

20.Feb. 2017

New Release

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.003


型号：	BD9411F
厂家：	ROHM
描述：	BD9411F是白色LED用高效率驱动器，适用于大屏幕液晶驱动器。BD9411F内置了可向光源（LED串联连接的阵列）提供适当电压的DC/DC转换器。BD9411F中内置了应对异常状态的几种保护功能。过电压保护(OVP: over voltage protection), 过电流检测(OCP: over current limit protection of DCDC), LED 过电流保护(LEDOCP: LED over current protection), 过升压保护(FBMAX: over boost protection)等。因此，可在更宽的输出电压条件及负载条件下使用。驱动 CD 过电流保护驱动器转换器
文件：	总37页 (文件大小：1931K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9411F [ROHM]

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