BD9D300MUV_技术文档

Datasheet

4.0 V to 17 V Input, 3 A Integrated MOSFET

Single Synchronous Buck DC/DC Converter

BD9D300MUV

General Description

Key Specifications

BD9D300MUV is a synchronous buck switching regulator

with built-in low on-resistance power MOSFETs. This

integrated circuit (IC) is capable of providing current up to

3 A. It operates high oscillating frequency with low

inductance. It has original on-time control system which

can operate low power consumption in light load condition.

This IC is ideal for reducing standby power consumption

of equipment.

◼

Input Voltage Range:

4 V to 17 V

0.9 V to 5.25 V

3 A (Max)

1.25 MHz (Typ)

110 mΩ (Typ)

50 mΩ (Typ)

3 μA (Typ)

Output Voltage Range:

Output Current:

Switching Frequency:

High-Side FET ON Resistance:

Low-Side FET ON Resistance:

Shutdown Current:

Operating Quiescent Current:

20 µA (Typ)

Features

Package

VQFN016V3030

W (Typ) x D (Typ) x H (Max)

3.00 mm x 3.00 mm x 1.00 mm

◼

Single Synchronous Buck DC/DC Converter

On-time Control

Light Load Mode Control

Over Current Protection (OCP)

Short Circuit Protection (SCP)

Thermal Shutdown Protection (TSD)

Under Voltage Lockout Protection (UVLO)

Adjustable Soft Start

Power Good Output

Over Voltage Protection (OVP)

VQFN016V3030 Package

Backside Heat Dissipation

Applications

◼ Step-down Power Supply for SoC, FPGA,

VQFN016V3030

Microprocessor

◼ Laptop PC / Tablet PC / Server

◼ LCD TV

◼ Storage Device (HDD / SSD)

◼ 2-series Cell Li-Ion Batteries Equipment

◼ Printer, OA Equipment

◼ Distributed Power Supply, Secondary Power Supply

Typical Application Circuit

V_IN

BD9D300MUV

PVIN

PGD

V_PGD

AVIN

C_IN

R₃

V_EN

EN

L₁

RESERVE

MODE

SS

SW

VOUTS

FB

V_OUT

C_OUT

R₁

R₂

PGND

AGND

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.

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BD9D300MUV

Pin Configuration

(TOP VIEW)

16

15

14

13

1

2

3

4

12

11

10

9

SW

PVIN

AVIN

SS

EXP-PAD

SW

PGD

5

6

7

8

Pin Descriptions

Pin No.

Pin Name

Function

Switch pin. These pins are connected to the drain of the High-Side and Low-Side FET. In

addition, connect an inductor considering the direct current superimposition characteristic.

1, 2, 3

SW

Power Good pin. This pin is an open drain output that requires a pull-up resistor (to the VOUTS

pin). See page 15 for setting the resistance. If not used, this pin can be left floating or connected

to Ground.

4

PGD

Output voltage feedback pin. See page 32 for how to calculate the resistances of the output

voltage setting.

5

6

7

FB

AGND

Ground pin for the control circuit.

RESERVE Reserve pin. Connect to Ground.

Pin for setting switching control mode. Connecting this pin to the VOUTS pin forces the device

to operate in the Pulse Width Modulation (PWM) mode control. Connecting to Ground, the

mode is automatically switched between the Light Load mode control and PWM mode control.

Fix this pin to the VOUTS pin or Ground. Do not change the mode control during operation.

8

9

MODE

SS

Pin for setting the soft start time of output voltage. The soft start time is 1 ms (Typ) when the

SS pin is open. A ceramic capacitor connected to the SS pin makes the soft start time 1 ms or

more. See page 32 for how to calculate the capacitance.

Pin for supplying power to the control circuit. Connecting 0.1 µF (Typ) ceramic capacitor is

recommended. This pin is connected to PVIN.

10

AVIN

PVIN

Power supply pins for the output MOSFETs. Connecting 10 µF (Typ) ceramic capacitor is

recommended.

11, 12

Enable pin. The device starts up when V_ENis set to 0.9 V (Min) or more. The device enters the

shutdown mode with setting V_ENto 0.3 V (Max) or less. This pin must be properly terminated.

13

EN

14

15, 16

-

VOUTS

PGND

Pin for discharging output and detecting output voltage. Connect to output voltage node.

Ground pins for the output stage of the switching regulator.

A backside heat dissipation pad. Connecting to the internal PCB Ground plane by using via

provides excellent heat dissipation characteristics.

EXP-PAD

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BD9D300MUV

Block Diagram

AVIN

PVIN

10

11

12

REG

EN

UVLO

EN

HOCP

＋

13

SCP

OVP

－

VOUTS

14

High-Side

Main Comparator

FET

Control

Logic

+

＋

Soft Start

VREF

1

2

3

On Time

＋

－

SW

SS

＋

－

DRV

9

Low-Side

FET

Error

FB

Amplifier

5

LOCP

＋

PGND

AGND

－

TSD

PGOOD

15

16

ZXCMP

＋

－

6

7

8

4

PGD

MODE

RESERVE

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BD9D300MUV

Description of Blocks

1. REG

This block generates the internal power supply.

2. EN

This is the enable block. When EN voltage (V_EN) is set to 0.9 V (Min) or more, the internal circuit is activated and the

device starts operation. Shutdown is forced if V_ENis set to 0.3 V (Max) or less.

3. UVLO

This block is for under voltage lockout protection. The device shuts down when input voltage falls to 3.6 V (Typ) or less.

The threshold voltage has a hysteresis of 200 mV (Typ).

4. VREF

This block generates the internal reference voltage.

5. TSD

This block is for thermal protection. The device is shut down when the junction temperature (Tj) reaches to 175 °C (Typ)

or more. The device is automatically restored to normal operation with a hysteresis of 25 °C (Typ) when the Tj goes down.

6. Soft Start

This block slows down the rise of output voltage during start-up and controls the current, which allows the prevention of

output voltage overshoot and inrush current. The internal soft start time is 1 ms (Typ) when the SS pin is open. Acapacitor

connected to the SS pin makes the rising time 1 ms or more.

7. PGOOD

This block is for power good function. When the FB voltage (V_FB) is more than or equal to 95 % (Typ) of 0.8 V, the built-

in open drain Nch MOSFET connected to the PGD pin is off, and the PGD pin becomes High impedance. When V_FBis

less than or equal to 90 % (Typ) of 0.8 V, it turns on the built-in open drain Nch MOSFET and the PGD pin is pulled down

with 100 Ω (Typ).

8. Control Logic + DRV

This block controls switching operation and various protection functions.

9. OVP

This block is for output over voltage protection. When V_FBis more than or equal to 120 % (Typ) of 0.8 V, the output

MOSFETs are off. After V_FBis less than or equal to 115 % (Typ) of 0.8 V, the output MOSFETs are returned to normal

operation condition. In addition, when VOUTS voltage (V_VOUTS) reaches 5.95 V (Typ) or more, the output MOSFETs are

off. After V_VOUTSfalls 5.65 V (Typ) or less, the output MOSFETs are returned to normal operation condition. If the condition

of the over voltage protection is continued for 20 µs (Typ), the output MOSFETs are latched to off.

10. HOCP

This block is for over current protection of the High-Side FET. When the current that flows through the High-Side FET

reaches the value of over current limit, it turns off the High-Side FET and turns on the Low-Side FET.

11. LOCP

This block is for over current protection of the Low-Side FET. While the current that flows through the Low-Side FET over

the value of over current limit, the condition that being turned on the Low-Side FET is continued.

12. SCP

This block is for short circuit protection. After soft start is completed and in condition where V_FBis less than or equal to

90 % (Typ) of 0.8 V, this block counts the number of times of which current flowing in the High-Side FET or the Low-Side

FET reaches over current limit. When 256 times is counted, the device is shut down for 15 ms (Typ) and re-operates.

Counting is reset when V_FBis more than or equal to 95 % (Typ) of 0.8V, or IC re-operates by EN, UVLO and SCP function.

13. Error Amplifier

The Error Amplifier adjusts Main Comparator input voltage to make the internal reference voltage equal to V_FB.

14. Main Comparator

The Main Comparator compares the Error Amplifier output voltage and V_FB. When V_FBbecomes lower than the Error

Amplifier output voltage, the output turns High and reports to the On Time block that the output voltage has dropped

below the control voltage.

15. On Time

This block generates On Time. The designed On Time is generated after the Main Comparator output turns High. The

On Time is adjusted to control the frequency to be fixed even with I/O voltage is changed.

16. ZXCMP

The ZXCMP is a comparator that monitors the inductor current. When inductor current falls below 0 A (Typ) while the

Low-Side FET is on, it turns the FET off.

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BD9D300MUV

Absolute Maximum Ratings (Ta = 25 °C)

Parameter

Symbol

Rating

Unit

-0.3 to +20

-0.3 to V_PVIN+ 0.3

-0.3 to +7

V

Input Voltage

V_PVIN, V_AVIN

V_EN

EN Voltage

V

MODE Voltage

RESERVE Voltage

SS Voltage

V_MODE

V_RESERVE

V_SS

-0.3 to +7

V

-0.3 to +20

-0.3 to +7

V

PGD Voltage

V_PGD

-0.3 to +7

V

FB Voltage

V_FB

-0.3 to +7

V

VOUTS Voltage

SW Voltage

V_VOUTS

V_SW

-0.3 to V_PVIN+ 0.3

3.5

V

A

Output Current

Maximum Junction Temperature

Storage Temperature Range

I_OUT

150

°C

Tjmax

-55 to +150

°C

Tstg

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing

board size and copper area so as not to exceed the maximum junction temperature rating.

Thermal Resistance ^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s ^{(Note 3)}

2s2p ^{(Note 4)}

VQFN016V3030

Junction to Ambient

Junction to Top Characterization Parameter ^{(Note 2)}

θ_JA

189.0

23

57.5

10

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A (Still-Air).

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface

of the component package.

(Note 3) Using a PCB board based on JESD51-3.

(Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

70 μm

Footprints and Traces

Layer Number of

Measurement Board

Thermal Via ^{(Note 5)}

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

70 μm

Copper Pattern

Thickness

35 μm

Copper Pattern

Thickness

70 μm

Footprints and Traces

74.2 mm x 74.2 mm

(Note 5) This thermal via connects with the copper pattern of all layers.

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BD9D300MUV

Recommended Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

Input Voltage

V_PVIN, V_AVIN

Ta

4.0

-40

-

17

+85 ^{(Note 1)}

3

V

°C

A

Operating Temperature

Output Current

I_OUT

0

V_OUT

0.9 ^{(Note 2)}

5.25

V

Output Voltage Setting

(Note 1) Tj must be lower than 150C under actual operating environment. Life time is derated at junction temperature greater than 125 °C.

(Note 2) Use under the condition of the output voltage (V_OUT) ≥ input voltage (V_IN) × 0.125.

Electrical Characteristics (Unless otherwise specified Ta = 25 °C, V_PVIN= V_AVIN= 12 V, V_EN= 5 V, V_MODE= GND)

Parameter

Power Supply (AVIN)

Symbol

Min

Typ

Max

Unit

Conditions

Shutdown Current

I_SDN

I_CC

-

3

10

40

µA

V_EN= 0 V

I_OUT= 0 mA

No switching

Operating Quiescent Current

20

UVLO Detection Threshold Voltage

UVLO Hysteresis Voltage

Enable

V_UVLO

3.4

-

3.6

3.8

-

V

V_INfalling

V_UVLOHYS

200

mV

EN Input High Level Voltage

EN Input Low Level Voltage

EN Input Current

V_ENH

V_ENL

I_EN

0.9

GND

-

V_AVIN

0.3

V

10

µA

Reference Voltage, Error Amplifier, Soft Start

FB threshold Voltage

FB Input Current

V_FBTH

0.792

-

0.800

1

0.808

100

2.7

V

I_FB

I_SS

t_SS

nA

µA

ms

V_FB= 0.8 V

Soft Start Charge Current

Internal Soft Start Time

Control

2.3

0.4

2.5

1

1.8

MODE Input High Level Voltage

MODE Input Low Level Voltage

On Time

V_MODEH

V_MODEL

t_ONT

0.9

GND

-

V_VOUTS

V

0.3

-

333

ns

V_OUT= 5.0 V

Power Good

V_FBrising,

V_PGDR= V_FB/ V_FBTHx 100

V_FBfalling,

Power Good Rising

Threshold Voltage

Power Good Falling

Threshold Voltage

V_PGDR

92

87

95

90

98

93

%

V_PGDF

I_LKPGD

R_PGD

V_PGDF= V_FB/ V_FBTHx 100

PGD Output Leakage Current

PGD MOSFET ON Resistance

PGD Low Level Voltage

-

0

800

200

0.4

nA

Ω

V_PGD= 5 V

100

0.2

V_PGDL

V

I_PGD= 2 mA

SW (MOSFET)

High-Side FET ON Resistance

Low-Side FET ON Resistance

High-Side Output Leakage Current

Low-Side Output Leakage Current

Protection

R_ONH

R_ONL

I_LKH

-

110

50

0

220

100

10

mΩ

µA

No switching

I_LKL

0

10

µA

V_FBrising,

V_OVPH= V_FB/ V_FBTHx 100

V_FBfalling,

Output OVP Detection Voltage

V_OVPH

V_OVPL

I_LOCP

115

110

3.1

120

115

3.8

125

120

-

%

A

Output OVP Release Voltage

Low-Side FET Over Current

Detection Current ^{(Note 3)}

V_OVPL= V_FB/ V_FBTHx 100

(Note 3) No tested on outgoing inspection.

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BD9D300MUV

Typical Performance Curves

30

10

9

8

7

6

5

4

3

2

1

0

V

IN

= 12 V

V

IN

= 12 V

25

20

15

10

5

0

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 1. Operating Quiescent Current vs Temperature

Figure 2. Shutdown Supply Current vs Temperature

100

90

80

70

60

50

40

30

100

90

80

70

60

50

40

30

20

10

0

= 7.4 V

= 12 V

= 15 V

= 7.4 V

= 12 V

= 15 V

V

IN

20

10

0

V

IN

V

IN

V

IN

V

IN

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Output Current : I_OUT[A]

Figure 3. Efficiency vs Output Current

(V_OUT= 5 V, L = 2.2 μH, MODE = Low)

Figure 4. Efficiency vs Output Current

(V_OUT= 5 V, L = 2.2 μH, MODE = High)

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BD9D300MUV

Typical Performance Curves – continued

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

V

= 7.4 V

= 12 V

V

= 7.4 V

= 12 V

IN

10

V

IN

V

IN

0

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Output Current : I_OUT[A]

Figure 5. Efficiency vs Output Current

(V_OUT= 3.3 V, L = 2.2 μH, MODE = Low)

Figure 6. Efficiency vs Output Current

(V_OUT= 3.3 V, L = 2.2 μH, MODE = High)

4

3.9

3.8

3.7

3.6

3.5

3.4

3.3

3.2

0.815

0.81

V

IN

= 12 V

Release

0.805

0.8

Detection

0.795

0.79

0.785

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 7. FB Threshold Voltage vs Temperature

Figure 8. UVLO Threshold Voltage vs Temperature

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BD9D300MUV

Typical Performance Curves – continued

1

10

9

8

7

6

5

4

3

2

1

0

V

IN

= 12 V

V

IN

= 12 V

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V_ENH(High Level)

V_ENL(Low Level)

V_EN= 0.5 V

V_EN= 5.0 V

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 9. EN Threshold Voltage vs Temperature

Figure 10. EN Input Current vs Temperature

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1

V

IN

= 12 V

V

IN

= 12 V

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V_MODEH(High Level)

V_MODEL(Low Level)

V_MODE= 5 V

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 11. MODE Threshold Voltage vs Temperature

Figure 12. MODE Input Current vs Temperature

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BD9D300MUV

Typical Performance Curves – continued

140

80

70

60

50

40

30

20

10

0

V

IN

= 12 V

V

IN

= 12 V

120

100

80

60

40

20

0

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 13. High-Side FET ON Resistance vs Temperature

Figure 14. Low-Side FET ON Resistance vs Temperature

100

200

V

IN

= 12 V

V

= 12 V

IN

180

160

140

120

100

80

98

96

94

92

90

88

86

84

I_PGD= 2 mA

V_PGDR(Rising)

V_PGDF(Falling)

60

40

20

0

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 15. Power Good Threshold Voltage vs Temperature

Figure 16. PGD MOSFET ON Resistance vs Temperature

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BD9D300MUV

Typical Performance Curves – continued

5

4.5

4

2

V

IN

= 12 V

V

IN

= 12 V

1.8

1.6

1.4

1.2

1

3.5

3

2.5

2

0.8

0.6

0.4

0.2

0

1.5

1

0.5

0

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Temperature : Ta [°C]

Figure 17. Internal Soft Start Time vs Temperature

Figure 18. Soft Start Charge Current vs Temperature

2

1.8

1.6

1.4

1.2

1

2

V

IN

= 12 V

V

IN

= 12 V

1.8

1.6

1.4

1.2

1

MODE = High

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

MODE = Low

5

6

7

8

9

10 11 12 13 14 15 16 17

0

0.5

1

1.5

2

2.5

3

Input Voltage : V_IN[V]

Output Current : I_OUT[A]

Figure 19. Switching Frequency vs Output Current

(V_IN= 12 V, V_OUT= 5 V)

Figure 20. Switching Frequency vs Input Voltage

(V_OUT= 5.0 V, I_OUT= 1 A, MODE = High)

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Typical Performance Curves – continued

Time: 500 µs/div

V_EN: 5 V/div

V_OUT: 2 V/div

V_SW: 10 V/div

V_PGD: 5 V/div

Figure 21. EN Start-up Waveform

Figure 22. EN Shutdown Waveform

(V_IN= 12 V, V_OUT= 5 V, R_LOAD= 5 Ω, MODE = Low)

Time: 500 µs/div

V_IN: 10 V/div

Time: 500 µs/div

V_IN: 10 V/div

V_OUT: 2 V/div

V_SW: 10 V/div

V_PGD: 5 V/div

V_OUT: 2 V/div

V_SW: 10 V/div

V_PGD: 5 V/div

Figure 23. VIN Start-up Waveform

Figure 24. VIN Shutdown Waveform

(V_OUT= 5 V, R_LOAD= 5 Ω, MODE = Low, V_PVIN= V_AVIN= V_EN

)

(V_OUT= 5 V, R_LOAD= 5 Ω, MODE = Low, V_PVIN= V_AVIN= V_EN)

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Typical Performance Curves – continued

Time: 1 µs/div

V_OUT: 100 mV/div

V_SW: 5 V/div

Figure 25. Switching Waveform

(V_IN= 12 V, V_OUT= 5 V, I_OUT= 0.1 A, L = 2.2 μH, C_OUT= 47 μF,

MODE = Low)

Figure 26. Switching Waveform

(V_IN= 12 V, V_OUT= 5 V, I_OUT= 3.0 A, L = 2.2 μH, C_OUT= 47 μF,

MODE = Low)

2

V

IN

= 12 V

V

IN

= 12 V

1.5

1

1.5

1

0.5

0

0.5

0

MODE = Low

MODE = High

-0.5

-1

-0.5

-1

-1.5

-2

-1.5

-2

6

7

8

9

10 11 12 13 14 15 16 17

0

0.5

1

1.5

2

2.5

3

Input Voltage : V_IN[V]

Output Current : I_OUT[A]

Figure 27. Line Regulation

Figure 28. Load Regulation

(V_OUT= 5 V, L = 2.2 μH, I_OUT= 3.0 A)

(V_IN= 12 V, V_OUT= 5 V, L = 2.2 μH)

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BD9D300MUV

Function Explanations

1. Basic Operation

(1) DC/DC Converter Operation

BD9D300MUV is a synchronous rectifying step-down switching regulator that has original on-time control method.

When the MODE pin is connected to Ground, it utilizes switching operation in Pulse Width Modulation (PWM) mode

control for heavier load, and it operates in Light Load mode control at lighter load to improve efficiency. When the MODE

pin is connected to the VOUTS pin, the device operates in PWM mode control regardless of the load.

MODE = Low

PWM mode

Light Load mode

control

PWM mode

control

MODE = High

Output Current [A]

Figure 29. Efficiency Image between Light Load Mode Control and PWM Mode Control

(2) Enable Control

The start-up and shutdown can be controlled by the EN voltage (V_EN). When V_ENbecomes 0.9 V (Min) or more, the

internal circuit is activated and the device starts up. When V_ENbecomes 0.3 V (Max) or less, the device is shut down.

The start-up with V_ENmust be at the same time of the input voltage (V_IN=V_EN) or after supplying V_IN.

V_IN

0 V

V_EN

V_ENH

V_ENL

0 V

V_OUT

0 V

Start-up

Shutdown

Figure 30. Start-up and Shutdown with Enable Control Timing Chart

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BD9D300MUV

1. Basic Operation – continued

(3) Soft Start

When V_ENgoes high, soft start function operates and output voltage gradually rises. This soft start function can prevent

overshoot of the output voltage and excessive inrush current. The soft start time (t_SS) is 1 ms (Typ) when the SS pin is

left floating. A capacitor connected to the SS pin makes t_SSmore than 1 ms. See page 32 for how to set the soft start

time. When Short Circuit Protection (SCP) is released, t_SSis 1 ms (Typ) regardless of a capacitor connected to the SS

pin.

V_IN

0 V

V_EN

0 V

V_OUT

0 V

V_FBTHx 95 %

0.8 V

(Typ)

V_FB

0 V

V_PGD

0 V

t_SS

Figure 31. Soft Start Timing Chart

(4) Power Good

When the FB voltage (V_FB) is more than or equal to 95 % (Typ) of 0.8 V, the built-in open drain Nch MOSFET connected

to the PGD pin is off, and the PGD pin becomes Hi-Z (High impedance). When V_FBis less than or equal to 90 % (Typ)

of 0.8V, it turns on the built-in open drain Nch MOSFET turns on and the PGD pin is pulled down with 100 Ω (Typ). It is

recommended to connect a pull-up resistor of 10 kΩ to 100 kΩ to the VOUTS pin.

Table 1. PGD Output

State

Before Supply Input Voltage

Shutdown

Condition

V_IN< 1.6 V (Typ)

PGD Output

Hi-Z

V_EN≤ 0.3 V (Max)

Low (Pull-down)

Hi-Z

95 % (Typ) ≤ V_FB/ V_FBTH

V_FB/ V_FBTH≤ 90 % (Typ)

1.6 V (Typ) < V_IN≤ 3.6 V (Typ)

Tj ≥ 175 °C (Typ)

Enable

V_EN≥ 0.9 V (Min)

Low (Pull-down)

UVLO

TSD

OVP

120 % (Typ) ≤ V_FB/ V_FBTH, 5.95 V (Typ) ≤ V_VOUTS

Complete Soft Start

V_FB/ V_FBTH≤ 90 % (Typ)

OCP 256 counts

SCP

Low (Pull-down)

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(4) Power Good – continued

V_IN

0 V

V_EN

0 V

5.95 V (Typ)

5.65 V (Typ)

V_OUT

0 V

V_FBTHx 120 % (Typ)

V_FBTHx 90 % (Typ)

V_FBTHx 115 % (Typ)

V_FBTHx 95 % (Typ)

V_FB

0 V

t_SS

V_PGD

< 20 μs (Typ)

0 V

Figure 32. Power Good Timing Chart

(Connecting a pull-up resistor to the PGD pin)

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BD9D300MUV

Function Explanations – continued

2. Protection

The protection circuits are intended for prevention of damage caused by unexpected accidents. Do not use the

continuous protection.

(1) Over Current Protection (OCP) / Short Circuit Protection (SCP)

Over Current Protection (OCP) restricts the flowing current through the Low-Side FET or High-Side FET for every

switching period. If the inductor current exceeds the Low-Side OCP I_LOCP= 3.8 A (Typ) while the Low-Side FET is on,

the Low-Side FET remains on even with FB voltage (V_FB) falls to V_FBTH= 0.8 V (Typ) or less. If the inductor current

becomes lower than I_LOCP, the High-Side FET is able to be turned on. When the inductor current is the High-Side OCP

I_HOCP= 4.8 A (Typ) or more while the High-Side FET is on, it is turned off. Output voltage may decrease by changing

frequency and duty due to OCP operation.

Short Circuit Protection (SCP) function is a Hiccup mode. When OCP operates 256 cycles while V_FBis less than or

equal to 90 % (Typ) of 0.8V (V_PGD= Low), the device stops the switching operation for 15 ms (Typ). After 15 ms (Typ),

the device restarts. SCP does not operate during the soft start even if the device is in the SCP condition. Do not exceed

the maximum junction temperature (Tjmax = 150 °C) during OCP and SCP operation.

Table 2. The Operating Condition of OCP and SCP

V_EN

V_FB

Start-up

OCP

SCP

≤ V_FBTHx 90 % (Typ)

> V_FBTHx 95 % (Typ)

≤ V_FBTHx 90 % (Typ)

-

During Soft Start

Enable

Disable

Enable

Disable

≥ 0.9 V (Typ)

≤ 0.3 V (Typ)

Complete Soft Start

Shutdown

V_OUT

V_FBTHx 95 % (Typ)

V_FBTHx 90 % (Typ)

V_FB

V_PGD

V_SW

High-Side FET

Internal Gate Signal

Low-Side FET

Internal Gate Signal

I_HOCP

I_LOCP

Inductor Current

High-Side OCP

Internal Signal

Low-Side OCP

Internal Signal

OCP 256 counts

Less than

OCP 256 counts

SCP

Internal Signal

15 ms (Typ)

Figure 33. OCP and SCP Timing Chart

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2. Protection – continued

(2) Under Voltage Lockout Protection (UVLO)

When input voltage (V_IN) falls to 3.6 V (Typ) or less, the device is shut down. When V_INbecomes 3.8 V (Typ) or more,

the device starts up. The hysteresis is 200 mV (Typ).

V_IN

(=V_EN

)

Hysteresis

V_UVLOHYS= 200 mV (Typ)

V_OUT

3.8 V (Typ)

UVLO Detect

V_UVLO= 3.6 V (Typ)

0 V

V_OUT

0 V

t_SS

Figure 34. UVLO Timing Chart

(3) Thermal Shutdown Protection (TSD)

Thermal shutdown circuit prevents heat damage to the IC. Normal operation should always be within the IC’s maximum

junction temperature rating (Tjmax = 150 °C). However, if it continues exceeding the rating and the junction temperature

Tj rises to 175 °C (Typ), the TSD circuit is activated and it turns the output MOSFETs off. When the Tj falls below the

TSD threshold, the circuits are automatically restored to normal operation. The TSD threshold has a hysteresis of 25 °C

(Typ). Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings. Therefore, under

no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

(4) Over Voltage Protection (OVP)

When V_FBis more than or equal to 120 % (Typ) of 0.8 V, the output MOSFETs are off. After V_FBis less than or equal to

115 % (Typ) of 0.8 V, the output MOSFETs are returned to normal operation condition. In addition, when VOUTS voltage

(V_VOUTS) reaches 5.95 V (Typ) or more, the output MOSFETs are off. After V_VOUTSfalls 5.65 V (Typ) or less, the output

MOSFETs are returned to normal operation condition. If the condition of the over voltage protection is continued for 20

µs (Typ), the output MOSFETs are latched to off, and it re-operates by Enable control or UVLO function.

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BD9D300MUV

Application Examples

1. V_IN= 12 V / V_OUT= 5.0 V

Table 3. Specification of Application (V_IN= 12 V / V_OUT= 5.0 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

12 V

5.0 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 35. Application Circuit

Table 4. Recommended Component Values ^{(Note 1)}(V_IN= 12 V / V_OUT= 5.0 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

2.2 μH

FDSD0518-H-2R2M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

270 kΩ (1 %, 1/16 W)

51 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF2703

MCR01MZPF5102

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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BD9D300MUV

1. V_IN= 12 V / V_OUT= 5.0 V – continued

100

90

80

70

60

50

40

30

20

80

60

40

20

0

240

180

120

60

Gain

Phase

0

-20

-40

-60

MODE = Low

10

MODE = High

0

-120

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 36. Efficiency vs Output Current

Figure 37. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

I_OUT: 1 A/div

V_SW: 5 V/div

Figure 38. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 39. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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Application Examples – continued

2. V_IN= 7.4 V / V_OUT= 5.0 V

Table 5. Specification of Application (V_IN= 7.4 V / V_OUT= 5.0 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

7.4 V

5.0 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 40. Application Circuit

Table 6. Recommended Component Values ^{(Note 1)}(V_IN= 7.4 V / V_OUT= 5.0 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

2.2 μH

FDSD0518-H-2R2M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

270 kΩ (1 %, 1/16 W)

51 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF2703

MCR01MZPF5102

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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2. V_IN= 7.4 V / V_OUT= 5.0 V – continued

100

90

80

70

60

50

40

30

20

80

60

40

20

0

240

180

120

60

Gain

Phase

0

-20

-40

-60

MODE = Low

10

MODE = High

0

-120

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 41. Efficiency vs Output Current

Figure 42. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

I_OUT: 1 A/div

V_SW: 5 V/div

Figure 43. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 44. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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BD9D300MUV

Application Examples – continued

3. V_IN= 12 V / V_OUT= 3.3 V

Table 7. Specification of Application (V_IN= 12 V / V_OUT= 3.3 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

12 V

3.3 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 45. Application Circuit

Table 8. Recommended Component Values ^{(Note 1)}(V_IN= 12 V / V_OUT= 3.3 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

2.2 μH

FDSD0518-H-2R2M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

160 kΩ (1 %, 1/16 W)

51 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF1603

MCR01MZPF5102

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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3. V_IN= 12 V / V_OUT= 3.3 V – continued

80

60

40

20

0

240

180

120

60

100

90

80

70

60

50

40

30

20

Gain

Phase

0

-20

-40

-60

-120

MODE = Low

10

0

MODE = High

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 46. Efficiency vs Output Current

Figure 47. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

V_SW: 5 V/div

I_OUT: 1 A/div

Figure 48. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 49. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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BD9D300MUV

Application Examples – continued

4. V_IN= 7.4 V / V_OUT= 3.3 V

Table 9. Specification of Application (V_IN= 7.4 V / V_OUT= 3.3 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

7.4 V

3.3 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 50. Application Circuit

Table 10. Recommended Component Values ^{(Note 1)}(V_IN= 7.4 V / V_OUT= 3.3 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

2.2 μH

FDSD0518-H-2R2M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

160 kΩ (1 %, 1/16 W)

51 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF1603

MCR01MZPF5102

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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BD9D300MUV

4. V_IN= 7.4 V / V_OUT= 3.3 V – continued

100

90

80

70

60

50

40

30

20

80

60

40

20

0

240

180

120

60

Gain

Phase

0

-20

-40

-60

MODE = Low

10

MODE = High

0

-120

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 51. Efficiency vs Output Current

Figure 52. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

I_OUT: 1 A/div

V_SW: 5 V/div

Figure 53. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 54. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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Application Examples – continued

5. V_IN= 7.4 V / V_OUT= 1.8 V

Table 11. Specification of Application (V_IN= 7.4 V / V_OUT= 1.8 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

7.4 V

1.8 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 55. Application Circuit

Table 12. Recommended Component Values ^{(Note 1)}(V_IN= 7.4 V / V_OUT= 1.8 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

1.5 μH

FDSD0518-H-1R5M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

150 kΩ (1 %, 1/16 W)

120 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF1503

MCR01MZPF1203

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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5. V_IN= 7.4 V / V_OUT= 1.8 V – continued

100

90

80

70

60

50

40

30

20

80

60

40

20

0

240

180

120

60

Gain

Phase

0

-20

-40

-60

MODE = Low

10

MODE = High

0

-120

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 56. Efficiency vs Output Current

Figure 57. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

I_OUT: 1 A/div

V_SW: 5 V/div

Figure 58. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 59. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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Application Examples – continued

6. V_IN= 7.4 V / V_OUT= 1.2 V

Table 13. Specification of Application (V_IN= 7.4 V / V_OUT= 1.2 V)

Parameter

Input Voltage

Symbol

V_IN

Specification Value

7.4 V

1.2 V

Output Voltage

V_OUT

f_OSC

I_OUTMAX

Ta

Switching Frequency

Maximum Output Current

Operating Temperature

1.25 MHz (Typ)

3 A

25 °C

BD9D300MUV

VIN

PGD

PVIN

AVIN

PGD

SW

R₃

L₁

VOUT

C₃

C₂

C₇

C₁

EN

R₀

C₄C₅C₆

VOUTS

PGND

SS

R₁

C₈

RESERVE

MODE

FB

C₉

AGND

R₂

Figure 60. Application Circuit

Table 14. Recommended Component Values ^{(Note 1)}(V_IN= 7.4 V / V_OUT= 1.2 V)

Part No.

L₁

Value

Part Name

Size (mm)

Manufacturer

1.0 μH

FDSD0518-H-1R0M

5249

Murata

(Note 2)

C₁

10 μF (35 V / X5R)

GRM21BR6YA106ME43

2012

Murata

C₂

C₃

-

(Note 3)

C₄

47 μF (16 V / X5R)

GRM31CR61C476ME44

3216

Murata

C₅

C₆

-

0603

-

(Note 4)

C₇

0.1 μF (35 V / X5R)

GRM033R6YA104ME14

Murata

C₈

C₉

R₁

R₂

R₃

-

150 kΩ (1 %, 1/16 W)

300 kΩ (1 %, 1/16 W)

100 kΩ (1 %, 1/16 W)

Short

MCR01MZPF1503

MCR01MZPF3003

MCR01MZPF1003

-

1005

-

ROHM

-

(Note 5)

R₀

(Note 1) You agree that this is presented only as guidance for products use. Confirm on the actual equipment considering variations of the characteristics

of the product and external components.

(Note 2) For the capacitance of input capacitor, take temperature characteristics, DC bias characteristics, etc. into consideration to set to a minimum

value of no less than 2 μF.

(Note 3) In case capacitance value fluctuates due to temperature characteristics, DC bias characteristics, etc. of the output capacitor, loop response

characteristics may change. Confirm on the actual equipment. When selecting a capacitor, confirm the characteristics of the capacitor in its

datasheet.

(Note 4) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor as close as possible to the PVIN pin and the PGND

pin if needed.

(Note 5) R₀is an option used for feedback’s frequency response measurement. By inserting a resistor at R₀, it is possible to measure the frequency

response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit mode.

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6. V_IN= 7.4 V / V_OUT= 1.2 V – continued

100

90

80

70

60

50

40

30

20

80

60

40

20

0

240

180

120

60

Gain

Phase

0

-20

-40

-60

-120

MODE = Low

10

MODE = High

0

0.001

0.01

0.1

1 10

1

10

100

1000

Output Current : I_OUT[A]

Frequency [kHz]

Figure 61. Efficiency vs Output Current

Figure 62. Frequency Characteristics I_OUT= 2.0 A

Time: 1 µs/div

Time: 1 ms/div

V_OUT: 100 mV/div

I_OUT: 1 A/div

V_SW: 5 V/div

Figure 63. Load Transient Response I_OUT= 0.1 A – 2.0 A

(MODE = Low)

Figure 64. V_OUTRipple I_OUT= 3.0 A

(MODE = High)

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Selection of Components Externally Connected

Contact us if not use the recommended component values in Application Examples.

1. Output LC Filter

In order to supply a continuous current to the load, the DC/DC converter requires an LC filter for smoothing the output

voltage.

V_IN

I_L

Inductor saturation current > I_OUTMAX+ ΔI_L/2

V_OUT

L₁

ΔI_L

Driver

Maximum output current I_OUTMAX

C_OUT

t

Figure 65. Waveform of current through inductor

Figure 66. Output LC filter circuit

For example, given that V_IN= 12 V, V_OUT= 5.0 V, L₁= 2.2 μH, and the switching frequency f_OSC= 1.25 MHz, the inductor

ripple current ΔI_Lcan be calculated as below.

1

(

)

×

∆퐼_퐿= 푉_푂푈푇× 푉 − 푉_푂푈푇

= ꢆ06ꢆ mA

ꢅ

ꢀ푁

ꢁ

ꢂꢃ

× 푓

× 퐿

ꢄ푆퐶

The inductance value of L₁is recommended in the range between 1.0 μH and 3.3 μH. However, ΔI_Lshould be set 400 mA

or more when using Light Load mode control by the MODE pin connecting to Ground.

The rated current of the inductor (Inductor saturation current) must be larger than the sum of the maximum output current

I_OUTMAXand 1/2 of the inductor ripple current ΔI_L.

The output capacitor C_OUTaffects the output ripple voltage characteristics. The capacitance value of C_OUTis recommended

in the range between 22 μF and 47 μF for stability of the control loop. C_OUTmust satisfy the required ripple voltage

characteristics.

The output ripple voltage ΔV_RPLcan be estimated by the following equation.

1

∆푉_푅푃퐿= ∆퐼_퐿× ꢇꢈ_퐸ꢉ푅

+

ꢍ [V]

ꢄ푆퐶

8 × ꢊ

× 푓

ꢄꢋꢌ

Where:

ꢈ_퐸ꢉ푅is the Equivalent Series Resistance of the output capacitor.

For example, given that C_OUT= 47 μF, and R_ESR= 3 mΩ, ΔV_RPLcan be calculated as below.

1

∆푉_푅푃퐿= ꢆ06ꢆ 푚퐴 × ꢇ3 푚훺 + _{8 × 47 휇퐹 × 1.25 푀퐻푧}ꢍ = ꢎ.ꢏ [mV]

The total capacitance C_OUTMAXconnected to V_OUTneeds to satisfy the value obtained by the following equation.

푡

∆ꢀ

ꢓ

푆푆ꢒꢂꢃ

ꢐ_{푂푈푇푀ꢑ푋}

<

× (3.ꢆ +

− 퐼_{푂푈푇ꢉꢉ}) [F]

ꢁ

2

ꢄꢋꢌ

where:

ꢔ_{ꢉꢉ푀ꢀ푁}is the minimum soft start time.

푉_푂푈푇is the output voltage.

∆I_Lis the inductor current.

I_OUTSSis the maximum output current during soft start.

For example, given that V_IN= 12 V, V_OUT= 5.0 V, L₁= 2.2 µH, f_OSC= 1.25 MHz (Typ), t_SSMIN= 0.4 ms (C_SS= OPEN), and

I_OUTSS= 3 A, C_OUTMAXcan be calculated as below.

ꢕ.4 ꢖ푠

5.ꢕ ꢁ

1ꢕꢗ1 ꢖꢑ

− 3.0 퐴ꢍ = ꢎ0.ꢏ [μF]

2

ꢐ_{푂푈푇푀ꢑ푋}

<

× ꢇ3.ꢆ +

If the total capacitance connected to V_OUTis larger than C_OUTMAX, over current protection may be activated by the inrush

current at start-up and prevented to turn on the output. In addition, C_OUTaffects the load transient response and stability

of the control loop. Confirm it on the actual application.

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Selection of Components Externally Connected – continued

2. Output Voltage Setting

The output voltage value can be set by the feedback resistance ratio.

For stable operation, use feedback resistance R₁of value from 100 kΩ to 300 kΩ.

V_OUT

푅 ꢘ 푅

ꢅ

ꢙ

푉_푂푈푇

=

× 푉_퐹퐵[V]

× ꢈ₁[Ω]

ꢜ ꢁ

ꢚꢛ

푅

ꢙ

R₁

ꢁ

Error Amplifier

ꢚꢛ

ꢈ₂=

ꢁ

ꢄꢋꢌ

FB

R₂

0.8 V

(Typ)

Figure 67. Feedback Resistor Circuit

3. Soft Start Capacitor (Soft Start Time Setting)

The soft start time t_SSdepends on the value of the capacitor connected to the SS pin. t_SSis 1 ms (Typ) when the SS pin is

left floating. The capacitor connected to the SS pin makes t_SSmore than 1 ms. The t_SSand C_SScan be calculated using

below equation. The C_SSshould be set in the range between 3300 pF and 0.1 μF.

(ꢊ × ꢁ

)

푆푆

ꢔ_ꢉꢉ

=

ꢀ

푆푆

Where:

ꢔ_ꢉꢉis the soft start time.

ꢐ_ꢉꢉis the capacitor connected to the SS pin.

푉

ꢉꢉ

is the SS voltage finished soft start function.

1.2 V (Typ) x 0.95 (Typ)

퐼_ꢉꢉis the soft start current.

2.5 μA (Typ)

With C_SS= 0.01 µF, t_SScan be calculated as below.

(ꢕ.ꢕ1 μF × 1.2 V ×ꢕ.95)

ꢔ_ꢉꢉ=

= ꢏ.ꢎ6 ms

2.5 μA

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PCB Layout Design

PCB layout design for DC/DC converter power supply IC is as important as the circuit design. Appropriate layout can avoid

various problems caused by power supply circuit. Figure 68-a to Figure 68-c show the current path in a buck converter circuit.

The Loop1 in Figure 68-a is a current path when H-side switch is ON and L-side switch is OFF and the Loop2 in Figure 68-b

is when H-side switch is OFF and L-side switch is ON. The thick line in Figure 68-c shows the difference between Loop1 and

Loop2. The current in thick line changes sharply each time the switching element H-side and L-side switch change from OFF

to ON, and vice versa. These sharp changes induce several harmonics in the waveform. Therefore, the loop area of thick line

that is consisted by input capacitor and IC should be as small as possible to minimize noise. For more detail, refer to

application note of switching regulator series “PCB Layout Techniques of Buck Converter”.

Loop1

V_IN

V_OUT

L

H-side switch

C_IN

C_OUT

L-side switch

GND

Figure 68-a. Current Path when H-side Switch = ON, L-side Switch = OFF

V_IN

V_OUT

L

H-side switch

C_IN

C_OUT

Loop2

L-side switch

GND

Figure 68-b. Current Path when H-side Switch = OFF, L-side Switch = ON

V_IN

V_OUT

L

C_IN

C_OUT

H-side FET

L-side FET

GND

Figure 68-c. Difference of Current and Critical Area in Layout

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I/O Equivalence Circuits

1.2.3. SW

4. PGD

PVIN

PGD

SW

500 kΩ

300 kΩ

Internal

Circuit

50 Ω

167 kΩ

5. FB

Internal REG

8. MODE

Internal REG

20 kΩ

10 kΩ

MODE

FB

9. SS

13. EN

Internal REG

20 kΩ

EN

25 kΩ

10 kΩ

SS

380 kΩ

14. VOUTS

35 kΩ

VOUTS

500 kΩ

10 kΩ

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the

digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog

block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and

aging on the capacitance value when using electrolytic capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. However,

pins that drive inductive loads (e.g. motor driver outputs, DC-DC converter outputs) may inevitably go below ground

due to back EMF or electromotive force. In such cases, the user should make sure that such voltages going below

ground will not cause the IC and the system to malfunction by examining carefully all relevant factors and conditions

such as motor characteristics, supply voltage, operating frequency and PCB wiring to name a few.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

8.

9.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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Operation Notes – continued

10. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 69. Example of Monolithic IC Structure

11. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

12. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be

within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj

falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

13. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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Ordering Information

B D 9 D 3 0 0 M U V -

E 2

Package

VQFN016V3030

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagram

VQFN016V3030 (TOP VIEW)

Part Number Marking

D 9 D

3 0 0

LOT Number

Pin 1 Mark

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Physical Dimension and Packing Information

Package Name

VQFN016V3030

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Revision History

Date

Revision

001

Changes

18.Mar.2019

New Release

P4 Consist Soft Start block explanation with Japanese version.

P6 Correct of Output Voltage Setting symbol error in Recommended Operating Condition

P6 Correct of Output OVP Release Voltage symbol error in Electrical Characteristics

P7 Correct of Figure 3 MODE setting error in Typical Performance Curves

16.Sep.2021

002

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.004


型号：	BD9D300MUV
厂家：	ROHM
描述：	BD9D300MUV是一款同步整流降压型开关稳压器，内置了低导通电阻的功率MOSFET。可以输出高达3A的电流。因为振荡频率高，所以可以使用小型电感。采用独有的导通时间控制方法，可在轻负载条件下实现低功耗，适用于需要降低待机功耗的设备。开关稳压器
文件：	总42页 (文件大小：1645K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9D300MUV [ROHM]

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